DEMO MANUAL DC955A
LTC2483
16-Bit Delta Sigma ADC with
Easy Drive™ Input Current Cancellation
and I
2
C Interface
DC590 USB Serial Controller board and supplied software
to measure performance. The exposed ground planes allow
proper grounding to prototype circuitry. After evaluating
with Linear Technology’s software, the digital signals can
be connected to the end application’s processor/controller
for development of the serial interface.
Design files for this circuit board are available at
http://www.linear.com/demo
L,
LT, LTC, LTM, Linear Technology and the Linear logo are registered trademarks and
Easy Drive and QuikEval are trademarks of Linear Technology Corporation. All other trademarks
are the property of their respective owners.
Description
Demonstration circuit 955A features the
LTC
®
2483,
a
16-bit high performance
ΔΣ
analog-to-digital converter
(ADC). The LTC2483 features 2ppm linearity, 0.5μV offset,
and 600nV
RMS
noise. The input is fully differential, with
input common mode rejection of 140dB. The LTC2483
is available in a 10-pin DFN package and has an easy to
use I
2
C interface.
DC955A is a member of Linear Technology’s QuikEval™
family of demonstration boards. It is designed to allow easy
evaluation of the LTC2483 and may be connected directly
to the target application’s analog signals while using the
BoarD photo
MONITOR REFERENCE OR
EXTERNAL REFERENCE SOURCE
(SEE HARDWARE SET-UP)
RIBBON CABLE TO
DC590 CONTROLLER
DIFFERENTIAL
INPUT
Figure 1. Proper Measurement Equipment Setup
dc955af
1
DEMO MANUAL DC955A
Quick start proceDure
Connect DC955A to a DC590 USB Serial Controller using
the supplied 14-conductor ribbon cable. Connect DC590
to host PC with a standard USB A/B cable. Run the evalu-
ation software supplied with DC590 or downloaded from
http://www.linear.com/software. The correct program will
be loaded automatically. Click the COLLECT button to start
reading the input voltage. Details on software features are
documented in the control panel’s help menu.
Tools are available for logging data, changing reference
voltage, changing the number of points in the strip chart
and histogram, and changing the number of points aver-
aged for the DVM display.
Figure 2. Software Screenshot
2
dc955af
DEMO MANUAL DC955A
harDware setup
Connection to DC590 Serial Controller
J1 is the power and digital interface connector. Connect
to DC590 serial controller with supplied 14-conductor
ribbon cable.
Jumpers
JP1:
Select the source for REF
+
, either an LT1790-5, or
externally supplied.
JP4:
Select the source for REF
–
, either Ground (GND) or
externally supplied.
JP2, JP3:
I
2
C Address Selection. These pins are connected
to CA0/f
0
and CA1, respectively. Refer to the LTC2483
data sheet for address mapping.
Analog Connections
Analog signal connections are made via the row of turret
posts along the edge of the board. Also, when connecting
the board to an existing circuit the exposed ground planes
along the edges of the board may be used to form a solid
connection between grounds.
GND:
Three ground turrets are connected directly to the
internal ground planes.
V
CC
:
This is the supply for the ADC. Do not draw any
power from this point.
REF
+
:
Connected to the LTC2483 REF
+
pin. If the onboard
reference is being used, the reference voltage may be
monitored from this point. An external reference may be
connected to these terminals if JP1 is removed.
REF
–
:
Connected to the LTC2483 REF
–
pin. Normally at
ground when JP4 is set to GND.
IN
+
, IN
–
:
These are the differential inputs to the LTC2483.
CA0/f
0
:
IMPORTANT—Remove JP2 before applying signals
to this turret. An external conversion clock may be applied
to the CA0/f
0
turret to modify the frequency rejection
characteristics or data output rate of the LTC2483. This
should be a square wave with a low level equal to ground
and a high level equal to V
CC
. While up to a 2MHz clock
can be used, performance may be compromised. Refer
to the LTC2483 data sheet.
experiments
Input Noise
One of the characteristics of the LTC2483 is that the 600nV
input noise floor is far below the quantization level of 38µV
when a 5V reference is used. This means that the output
will be stable if the input noise level is significantly below
38µV. In this sense, the LTC2483 is a true 17 effective bit
part, whereas many 16-bit SAR converters have several
LSBs of noise.
Solder a short wire from the IN
–
turret post to the IN
+
turret post. Noise should be below the quantization level
of the LTC2483. This will result in a noise reading of zero
on the control software, unless the offset is such that the
display flickers between two codes in which case the RMS
noise reading will be incorrect.
Select EXT for the source for V
REF
on JP1 and apply a
100mV source between a GND turret post and the V
REF
turret post. A precision, adjustable voltage source such
as a Data Precision 8200 or Fluke 332A is ideal. Another
option for this experiment is a 50k/1k divider from the
LT1790A-5 output to ground, giving a 98mV output. The
resulting LSB size is 0.1/217, or 763nV. This is small
enough to see the noise floor of the LTC2483 inputs, and
the RMS noise display should read approximately 6 to
7ppm (of the 100mV reference).
Common Mode Rejection
Tie the two inputs (still connected together) to ground
through a short wire and note the indicated voltage. Tie
the inputs to REF
+
; the difference should be less than
0.5μV due to the 140dB minimum CMRR of the LTC2483.
dc955af
3
DEMO MANUAL DC955A
experiments
Bipolar Symmetry
To demonstrate the symmetry of the ADCs transfer func-
tion, connect a stable, low noise, floating voltage source
(with a voltage less than V
REF/2
) from IN
+
to IN
–
and note
the indicated voltage. Reverse the polarity; the indicated
voltage will typically be within one LSB of the first reading
multiplied by –1.
One convenient voltage source for this experiment is a
single alkaline battery. While a battery has fairly low noise,
it is sensitive to temperature drift. It is best to use a large
(D-size) battery that is insulated from air currents. A bet-
ter source is a battery powered series reference such as
the LT1790. This part is available with output voltages of
1.25V, 2.048V, 2.5V, 3V, 3.3V, 4.096V and 5V.
Input Normal Mode Rejection
The LTC2483’s SINC4 digital filter is trimmed to reject
50Hz and 60Hz line noise when operated with the internal
conversion clock. To measure input normal mode rejection,
connect IN
–
to a 2.5V source such as an LT1790-2.5 refer-
ence or 1k – 1k divider from the onboard 5V reference to
ground. Apply a 10Hz, 2V peak-to-peak sine wave to IN
+
through a 1µF capacitor. No DC bias is required because
the 2M to 3M input impedance of the LTC2483 tends to
self-bias the input to mid-reference (see data sheet ap-
plications information for details.)
Start taking data. The input noise will be quite large, and
the graph of output vs. time should show large variations.
Next, slowly increase the frequency to 55Hz. The noise
should be almost undetectable in the graph. Note that
the indicated noise in ppm may still be above that of the
data sheet specification because IN
+
is not connected to
a DC source.
parts List
ITEM
1
2
3
4
5
6
7
8
9
10
11
12
QTY
2
1
1
1
9
4
4
1
3
1
1
1
REFERENCE
C1, C2
C3
C4
C5
E1 to E9
JP1, JP2, JP3, JP4
SHUNTS FOR JP1 to JP4 PIN 1 & 2
J1
R1, R2, R3
U1
U2
U3
PART DESCRIPTION
CAP., X7R, 0.1µF, 16V, 20%, 0402
CAP., X5R, 4.7µF, 6.3V, 20%, 0603
CAP., X5R, 1µF, 6.3V, 20%, 0402
CAP., X7R, 0.01µF, 25V, 10%, 0402
TESTPOINT, TURRET, .064"
JMP, 3-PIN, 1 ROW .079CC
SHUNT, .079" CENTER
HEADER, 2
×
7 PIN, 0.079CC
RES., CHIP 4.99k, 1/16W, 1%, 0402
I.C., LTC2483CDD, DFN10DD
I.C., LT1790ACS6-5, SOT23-6
I.C., 24LC025, TSSOP8
MANUFACTURER/PART NUMBER
TDK, C1005X7R1C104M
TDK, C1608X5R0J475M
TDK, C1005X5R0J105M
AVX, 04023C103KAT1A
MILL-MAX, 2308-2
SAMTEC, TMM-103-02-L-S
SAMTEC, 2SN-BK-G
MOLEX, 87831-1420
VISHAY, CRCW04024991FM
LINEAR TECH., LTC2483CDD
LINEAR TECH., LT1790ACS6-5
MICROCHIP, 24LC025-I/ST
4
dc955af
5
4
3
2
1
JP1
REF+
U2
LT1790ACS6-5
6
5
4
C1
0.1UF,16V
D
EXT
LT1790
NC
C3
4.7UF,6.3V
0603
VIN
D
GND1 VOUT
GND2
NC
E7
E8
GND
CA0/FO
1
2
schematic Diagram
GND
VCC
JP2
CA0/FO
1
0
VIN
VCC
1
0
SCL
SDA
C2
0.1UF,16V
SCL
SDA
U3
24LC025
1 A0
2 A1
VCC
R2
4.99K
1%
8
E1
VCC
C4
1UF,6.3V
0402
U1
LTC2483CDD
REF+
1
2
REF-
3
4
GND
5
IN-
11
SCL
IN+
6
SDA
REF-
7
GND
8
IN+
IN-
VCC
CA1
REF+
9
CA1
CA0/FO
10
CA0/FO
VCC
JP3
CA1
C5
0.01UF
0402
E2
VCC
C
3
J1
C
REF+
E9
1 1
2 2
3 3
4 4
5 5
6 6
7 7
8 8
REF-
E3
IN+
E4
IN-
E5
GND
E6
EXT
GND
JP4
REF-
9 9
10 10
11 11
3 A2
4 VSS
WP 7
SCL 6
SDA
5
R1
4.99K
1%
R3
4.99K
1%
12 12
13 13
14 14
HD2X7-079-MOLEX
B
Information furnished by Linear Technology Corporation is believed to be accurate and reliable.
However, no responsibility is assumed for its use. Linear Technology Corporation makes no representa-
tion that the interconnection of its circuits as described herein will not infringe on existing patent rights.
B
NOTES: UNLESS OTHERWISE SPECIFIED
CUSTOMER NOTICE
CONTRACT NO.
APPROVALS
DRAWN:
CHECKED:
APPROVED:
ENGINEER: MARK T.
DESIGNER:
THIS CIRCUIT IS PROPRIETARY TO LINEAR TECHNOLOGY AND
SUPPLIED FOR USE WITH LINEAR TECHNOLOGY PARTS.
KIM T.
A
TECHNOLOGY
TITLE: SCHEMATIC
1. ALL RESISTORS ARE IN OHMS, 0402.
ALL CAPACITORS ARE 0402.
1630 McCarthy Blvd.
Milpitas, CA 95035
Phone: (408)432-1900
Fax: (408)434-0507
LTC Confidential-For Customer Use Only
A
2. INSTALL SHUNT ON JP1-JP4 PIN 1 AND 2.
16-BIT DELTA SIGMA ADC WITH I2C INTERFACE
SIZE
DWG NO.
REV
LINEAR TECHNOLOGY HAS MADE A BEST EFFORT TO DESIGN A
CIRCUIT THAT MEETS CUSTOMER-SUPPLIED SPECIFICATIONS;
HOWEVER, IT REMAINS THE CUSTOMER'S RESPONSIBILITY TO
VERIFY PROPER AND RELIABLE OPERATION IN THE ACTUAL
APPLICATION. COMPONENT SUBSTITUTION AND PRINTED
CIRUIT BOARD LAYOUT MAY SIGNIFICANTLY AFFECT CIRCUIT
PERFORMANCE OR RELIABILITY. CONTACT LINEAR
TECHNOLOGY APPLICATIONS ENGINEERING FOR ASSISTANCE.
A
DATE:
3
2
DC955A * LTC2483CDD
Monday, December 05, 2005
1
A
SHEET
1 OF 1
5
4
DEMO MANUAL DC955A
dc955af
5
微控制器 MCU
京公网安备 11010802033920号
Copyright © 2005-2026 EEWORLD.com.cn, Inc. All rights reserved
电子工程世界
