LT3710
Secondary Side
Synchronous Post Regulator
FEATURES
s
s
s
s
s
s
s
s
DESCRIPTIO
Generates a Regulated Auxiliary Output in Isolated
DC/DC Converters
0.8V
±1.5%
Accurate Voltage Reference
Dual N-Channel MOSFET Synchronous Drivers
High Switching Frequency: Up to 500kHz
Programmable Current Limit Protection
Programmable Soft-Start
Automatic Frequency Synchronization
Small 16-Pin Thermally Enhanced TSSOP Package
The LT
®
3710 is a high efficiency step-down switching
regulator intended for auxiliary outputs in single second-
ary winding, multiple output power supplies.
The LT3710 drives dual synchronous N-channel MOSFETs
and achieves high efficiency. With leading edge modula-
tion, it operates well with either primary side peak current
or voltage mode control. It is synchronized to the falling
edge of the transformer secondary winding and can be
used in both single-ended and double-ended isolated
power converter topologies. A high speed operational
amplifier is incorporated to achieve optimum compensa-
tion and fast transient response. A user selectable discon-
tinuous conduction mode improves light load efficiency.
The LT3710 is available in a thermally enhanced TSSOP-16
exposed pad power package.
, LTC and LT are registered trademarks of Linear Technology Corporation.
APPLICATIO S
s
s
s
48V Isolated DC/DC Converters
Multiple Output Supplies
Offline Converters
TYPICAL APPLICATIO
V
IN
36V
TO 72V
L1
V
CC
BIAS
10k
V
DD
V
CC
BOOST
SYNC GBIAS
10pF
LT3710
V
FB
FG
I
SNS
LTC1698
10k
180pF
TG BG
LT3781
SG
0.01µF
C
S
680pF
CSET
TG
0.1µF
SW
ILCOMP BG
SS
BGS
V
FB
PGND
CL
–
CL
+
VA
OUT
3.3k
33nF
2.32k
3.01k
220Ω
Q2
B340A
4700pF
Q1
L2
1.8µH
0.006Ω
4.7µF
CMDSH-3
V
COMP
CG
•
•
•
•
SYNC
OPTODRV
V
C
+
–
V
REF
V
FB
GND
ISOLATION
BOUNDARY
C
OUT2
: POSCAP, 680µF/4V
L2: SUMIDA CEP125-IR8MC-H
Q1, Q2: SILICONIX Si7440DP
PLEASE REFER TO FIGURE 3
IN THE APPLICATIONS SECTION
FOR THE COMPLETE SCHEMATIC
Figure 1. Simplified Single Secondary Winding 3.3V and 1.8V Output Isolated DC/DC Converter
3710f
U
V
OUT1
3.3V
AT 10A
U
U
+
V
OUT2
1.8V
AT 10A
C
OUT2
3710 F01
1
LT3710
ABSOLUTE
(Note 1)
AXI U RATI GS
PACKAGE/ORDER I FOR ATIO
TOP VIEW
BOOST
TGATE
SW
CSET
SYNC
ILCOMP
SS
V
FB
1
2
3
4
5
6
7
8
17
16 GBIAS
15 BGATE
14 PGND
13 V
CC
12 CL
–
11 CL
+
10 VA
OUT
9
BGS
V
CC
Supply Voltage .................................................. 26V
BOOST Pin Voltage With Respect to SW pin ........... 10V
BOOST Pin Voltage With Respect to GND pin .......... 35V
SYNC Pin Voltage .................................................... 30V
Operating Junction Temperature Range
(Notes 2, 3) ...................................... – 40°C to 125°C
Storage Temperature Range ................. – 65°C to 150°C
Lead Temperature (Soldering, 10 sec).................. 300°C
Note: If higher than 30V on SYNC pin is needed, add a 10k resistor in series with the pin.
ORDER PART
NUMBER
LT3710EFE
FE PART
MARKING
3710EFE
FE PACKAGE
16-LEAD PLASTIC TSSOP
T
JMAX
= 125°C,
θ
JA
= 38°C/W
EXPOSED PAD IS SGND (PIN 17) MUST BE
CONNECTED TO PGND AND SOLDERED TO PCB
Consult LTC Marketing for parts specified with wider operating temperature ranges.
The
q
denotes the specifications which apply over the full operating
temperature range, otherwise specifications are at T
A
= 25°C. V
CC
= 11V, operating maximum V
CC
= 24V, no load on any outputs
unless otherwise noted.
PARAMETER
Overall
Supply Voltage (V
CC
)
Supply Current (I
VCC
)
Boost Pin Current
VA
OUT
≤
1.2V (Switching Off)
V
BOOST
= V
SW
+ 8V, 0V
≤
V
SW
≤
24V
TGATE High
TGATE Low
0.788
0.780
q
ELECTRICAL CHARACTERISTICS
CONDITIONS
MIN
8
TYP
MAX
24
UNITS
V
mA
mA
mA
V
V
µA
V
V
7
2
2
0.8
0.2
4.5
0.8
q
12
3
3
0.812
0.820
0.5
Voltage Amplifier VA
Reference Voltage (V
REF
)
q
FB Pin Input Current
VA
OUT
High
VA
OUT
Low
VA
OUT
Source Current
Open-Loop Gain
Gain Bandwidth Product
Soft-Start Current
Current Limit Amplifier CA1
Current Limit Threshold at (V
CL+
– V
CL–
)
BGATE Off Threshold at (V
CL+
– V
CL–
), BGS Pin Float
Switching Off Threshold at ILCOMP
Input Current (CL
+
, CL
–
)
V
FB
= V
REF
100
100
10
5
12
70
8
100
300
18
85
15
0.15
Common Mode Voltage from 0V to V
CC
– 2.5V
Common Mode Voltage from 0V to V
CC
– 2.5V
V
ILCOMP
V
CL+
= V
CL–
q
50
0
2
U
µA
dB
MHz
µA
mV
mV
V
µA
3710f
W
U
U
W W
W
LT3710
The
q
denotes the specifications which apply over the full operating
temperature range, otherwise specifications are at T
A
= 25°C. V
CC
= 11V, operating maximum V
CC
= 24V, no load on any outputs
unless otherwise noted.
PARAMETER
Oscillator
Switching Frequency
Synchronization Frequency Range
CSET Ramp Valley Voltage
CSET Peak-to-Peak Voltage
Synchronization Pulse Threshold on SYNC Pin
Maximum Duty Cycle
Gate Drivers (TGATE, BGATE)
V
GBIAS
V
TGATE
High (V
TGATE
– V
SW
)
V
BGATE
High
V
TGATE
Low (V
TGATE
– V
SW
)
V
BGATE
Low
Peak Gate Drive Current
Gate Drive Rise and Fall Time
I
GBIAS
< 25mA
I
TGATE
< 50mA, V
BOOST
= V
GBIAS
– 0.5V
I
BGATE
< 50mA
I
TGATE
< – 50mA
I
BGATE
< – 50mA
10nF Load
1nF Load
q
q
q
q
q
ELECTRICAL CHARACTERISTICS
CONDITIONS
C
S
= 500pF (No SYNC)
C
S
= 333pF (No SYNC)
C
S
= 500pF
C
S
= 333pF
C
S
= 1000pF (No SYNC)
C
S
= 1000pF (No SYNC)
Falling Edge V
SYNC
V
FB
= V
REF
– 5mV, C
S
> 500pF
q
q
q
q
q
MIN
170
240
245
345
0.90
TYP
200
280
MAX
240
340
400
500
UNITS
kHz
kHz
kHz
kHz
V
V
V
%
1.15
2.4
2.5
1.4
85
7.5
5
5
90
8.0
6
6
8.5
7
7.5
0.5
0.5
1
25
V
V
V
V
V
A
ns
Note 1:
Absolute Maximum Ratings are those values beyond which the life
of a device may be impaired.
Note 2:
The LT3710E is guaranteed to meet performance specifications
from 0°C to 125°C. Specifications over the – 40°C to 125°C operating
temperature range are assured by design, characterization and correlation
with statistical process controls.
Note 3:
This IC includes overtemperature protection that is intended to
protect the device during momentary overload conditions. Junction
temperature will exceed 125°C when overtemperature protection is active.
Continuous operation above the specified maximum operating junction
temperature may impair device reliability.
TYPICAL PERFOR A CE CHARACTERISTICS
V
GBIAS
vs I
GBIAS
over Junction
Temperature
8.1
–40°C
12
8.0
V
GBIAS
(V)
25°C
I
CC
(mA)
GAIN (dB)
7.9
7.8
125°C
7.7
0
10
I
GBIAS
(mA)
20
26
3710 G01
U W
I
CC
vs V
CC
(Switching Off)
13
T
A
= 25°C
120
Voltage Amplifier VA Gain and
Phase
T
A
= 25°C
GAIN
(–111°)
PHASE
40
–100
–0
11
10
9
8
7
6
5
8
10
12
14
16 18
V
CC
(V)
20
22
24
80
–50
PHASE (DEG)
0
0dB, 10MHz
–20
10
100
1k
10k 100k 1M
FREQUENCY (Hz)
–150
–180
10M 100M
3710 G03
3710 G02
3710f
3
LT3710
TYPICAL PERFOR A CE CHARACTERISTICS
∆V
REF
vs V
CC
,
∆FREQ
vs V
CC
CSET = 500pF
3 T
A
= 25°C
∆V
REF
(mV)
2
1
0
–1
∆FREQ
1
0
–1
10
15
V
CC
(V)
20
25
3710 G04
V
REF
(V)
∆V
REF
Frequency vs Temperature
195
SWITCHING FREQUENCY (kHz)
CSET = 500pF
500
200
FREQUENCY (kHz)
205
210
215
–40
–20
0
25
50
75
JUNCTION TEMPERATURE (°C)
G
BIAS
vs I
GBIAS
(Charging 2.2µF)
8
C
GBIAS
= 2.2µF
300
250
200
150
I
GBIAS
(mA)
VA
OUT
(V)
100
50
0
0
500µs
TIME
I
GBIAS
4
U W
V
REF
vs Temperature
0.801
CSET = 500pF
0.800
∆FREQ
(kHz)
0.799
0.798
–40
–20
0
25
50
75
JUNCTION TEMPERATURE (°C)
125
3710 G05
CSET vs Switching Frequency
T
A
= 25°C
1.00
CSET
400
0.95
MAXIMUM DUTY CYCLE
0.90
300
0.85
0.80
200
0.75
0.70
125
3710 G06
MAXIMUM DUTY CYCLE
100
200
400
600
CSET (pF)
800
1000
3710 G07
Current Limit Amplifier CA1 Gain
at V
CC
= 11V, V
CL–
= 5V
12
V
CC
= 11V
V
CLN
= 5V
7
T
A
= 25°C
6
5
4
3
2
CSET VALLEY
0
1ms
1
0
50
60
70
80
V
CL+
– V
CL–
(mV)
90
3710 G09
V
GBIAS
10
8
V
GBIAS
(V)
6
4
2
CSET PEAK
3710 G08
3710f
LT3710
PI FU CTIO S
BOOST (Pin 1):
Topside (Boosted) Driver Supply. This pin
is used to bootstrap and supply the topside power switch
gate drive circuitry. In normal operation V
BOOST
is powered
from the internally generated 8V GBIAS, V
BOOST
= V
SW
+
8.2V when TGATE is on.
TGATE (Pin 2):
Topside (Boosted) N-Channel MOSFET
Driver. When TGATE is on, the voltage is equal to V
SW
+ 6V.
SW (Pin 3):
Switch Node Connection to Inductor.
CSET (Pin 4):
Oscillator Timing Pin. The capacitor on this
pin sets the PWM switching frequency.
SYNC (Pin 5):
Synchronization Input. This pin should be
connected to the secondary side output of the power
transformer with a series resistor. A filtering capacitor of
10pF is recommended.
ILCOMP (Pin 6):
Current Limit Amplifier Compensation
Node. At current limit, CA1 pulls down on this pin to
regulate the output current.
SS (Pin 7):
Soft-Start. A capacitor on this pin sets the
output ramp up rate. The typical time for SS to reach the
programmed level is (C • 0.8V)/10µA.
V
FB
(Pin 8):
Voltage Amplifier Inverting Input. A resistor
divider to this pin sets the output voltage. Nominal voltage
at this pin is 0.8V.
BGS (Pin 9):
Bottom Gate Switching Control. CA2 moni-
tors the inductor current and prohibits BGATE from turn-
ing on when the inductor current is low (below 8mV across
the current sense resistor RS1) to allow discontinous
mode operation. Grounding this pin disables comparator
CA2.
VA
OUT
(Pin 10):
Voltage Amplifier Output.
CL
+
(Pin 11):
Current Limit Amplifier Positive Input. The
threshold is set at 70mV.
CL
–
(Pin 12):
Current Limit Amplifier Negative Input.
When used, CL
–
is connected to the output capacitor side
of the current + sense resistor and CL
+
is connected to the
inductor side of the current sense resistor.
V
CC
(Pin 13):
Supply of the IC. For proper bypassing, a low
ESR capacitor is required.
PGND (Pin 14):
Ground of the Bottom Side N-Channel
MOSFET Driver.
BGATE (Pin 15):
Bottom Side N-Channel MOSFET Driver.
GBIAS (Pin 16):
8V Regulator Output for Boostrapping
V
BOOST .
A bypass capacitor of at least 2µF is needed.
Exposed Pad (Pin 17):
Connect to PGND (Pin 14).
U
U
U
3710f
5
模拟与混合信号
京公网安备 11010802033920号
Copyright © 2005-2026 EEWORLD.com.cn, Inc. All rights reserved
电子工程世界
