Si87xx
5
K
V LED E
MULATOR
I
N PU T
, O
PEN
C
OLLECTOR
O
UTPUT
I
SOLA TORS
Features
Pin-compatible, drop-in upgrades for
popular high-speed digital
optocouplers
Performance and reliability
advantages vs. optocouplers
Resistant to temperature, age and
forward current effects
10x lower FIT rate for longer
service life
Higher common-mode transient
immunity: >50 kV/µs typical
Lower power and forward input
diode current
PCB footprint compatible with
optocoupler packaging
Wide range of product options
1 channel diode emulator input
3 to 30 V open collector output
Propagation delay 30 ns
Data rates dc to 15 Mbps
Up to 5000 V
RMS
isolation and 10 kV
surge protection
AEC-Q100 qualified
Wide operating temperature range
–40 to +125 °C
RoHS-compliant packages
SOIC-8 (Narrow body)
DIP8 (Gull-wing)
SDIP6 (Stretched SO-6)
LGA8
Pin Assignments:
See page 20
SOIC-8, DIP8, LGA8
Open Collector Output
Applications
Industrial automation
Isolated data acquisition
Motor controls and drives
Test and measurement equipment
Isolated switch mode power supplies
SDIP6
Open Collector Output
Safety Regulatory Approvals
UL 1577 recognized
Up
VDE certification conformity
IEC60747-5-2/VDE0884
CSA component notice 5A
approval
IEC
to 5000 Vrms for 1 minute
CQC certification approval
GB4943.1
Part 10
(basic/reinforced insulation)
60950-1, 61010-1, 60601-1
(reinforced insulation)
Description
The Si87xx isolators are pin-compatible, one-channel, drop-in
replacements for popular optocouplers with data rates up to 15 Mbps.
These devices isolate high-speed digital signals and offer performance,
reliability, and flexibility advantages not available with optocoupler
solutions. The Si87xx series is based on Silicon Labs' proprietary CMOS
isolation technology for low-power and high-speed operation and are
resistant to the wear-out effects found in optocouplers that degrade
performance with increasing temperature, forward current, and device
age. As a result, the Si87xx series offer longer service life and
dramatically higher reliability compared to optocouplers. Ordering options
include open collector output with and without integrated pull-up resistor
and output enable options.
SOIC-8, DIP8, LGA8
Open Collector Output
with 20 k Pull-up Resistor
SOIC-8, DIP8, LGA8
Open Collector Output
with Output Enable
Patent pending
Si87xx
Rev. 1.1 4/14
Copyright © 2014 by Silicon Laboratories
Si87xx
Functional Block Diagram
Diode
Emulator
VDD
A1
XMIT
I
F
REC
Output
Stage
(Open-Collector)
OUT
C1
GND
2
Rev. 1.1
Si87xx
T
ABLE
Section
OF
C
ONTENTS
Page
1. Electrical Specifications . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .4
2. Functional Description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14
2.1. Theory of Operation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14
3. Technical Description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .15
3.1. Device Behavior . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .15
3.2. Device Startup . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .15
4. Applications . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16
4.1. Input Circuit Design . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16
4.2. Output Circuit Design and Power Supply Connections . . . . . . . . . . . . . . . . . . . . . . . 17
5. Pin Descriptions (SOIC-8, DIP8, LGA8) Open Collector . . . . . . . . . . . . . . . . . . . . . . . . . 18
6. Pin Descriptions (SOIC-8, DIP8, LGA8) Output Enable . . . . . . . . . . . . . . . . . . . . . . . . . 19
7. Pin Descriptions (SDIP6) Open Collector . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20
8. Pin Descriptions (SOIC-8, DIP8, LGA8) 20 kW Pull-Up Resistor . . . . . . . . . . . . . . . . . . 21
9. Ordering Guide . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 22
10. Package Outline: 8-Pin Narrow Body SOIC . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 25
11. Land Pattern: 8-Pin Narrow Body SOIC . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 26
12. Package Outline: DIP8 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .27
13. Land Pattern: DIP8 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 28
14. Package Outline: SDIP6 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 29
15. Land Pattern: SDIP6 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 31
16. Package Outline: LGA8 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 32
17. Land Pattern: LGA8 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 33
18. Top Markings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 34
18.1. Top Marking (8-Pin Narrow Body SOIC) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 34
18.2. Top Marking Explanation (8-Pin Narrow Body SOIC) . . . . . . . . . . . . . . . . . . . . . . . 34
18.3. Top Marking (DIP8) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .35
18.4. Top Marking Explanation (DIP8) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 35
18.5. Top Marking (SDIP6) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 36
18.6. Top Marking Explanation (SDIP6) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 36
18.7. Top Marking (LGA8) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 37
18.8. Top Marking Explanation (LGA8) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .37
Document Change List . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .38
Contact Information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .39
Rev. 1.1
3
Si87xx
1. Electrical Specifications
Table 1. Recommended Operating Conditions
Parameter
V
DD
Supply Voltage
Input Current
Si87xxA Devices
Si87xxB Devices
Si87xxC Devices
Operating Temperature (Ambient)
Symbol
V
DD
I
F(ON)
(see Figure 1)
Min
3
3
6
3
–40
Typ
—
—
—
—
—
Max
30
15
30
15
125
Unit
V
mA
mA
mA
°C
T
A
Table 2. Electrical Characteristics
Parameter
DC Parameters
Supply Voltage
Supply Current
Input Current Threshold
V
DD
I
F(TH)
I
DD
Symbol
V
DD
= 5 V; GND = 0 V; T
A
= –40 to +125 °C; typical specs at 25 °C
Test Condition
(V
DD
–GND)
Min
3
—
—
—
—
—
—
—
—
1.6
Typ
—
—
—
—
—
0.17
0.34
0.17
—
—
Max
30
1.7
1.8
3.6
1.8
—
—
—
1
2.8
Unit
V
mA
mA
mA
mA
mA
mA
mA
V
V
Output high or low (V
DD
= 5 to 30 V)
Si87xxA devices
Si87xxB devices
Si87xxC devices
Si87xxA devices
Si87xxB devices
Si87xxC devices
Input Current Hystere-
sis
Input Forward Voltage
(OFF)
Input Forward Voltage
(ON)
Input Capacitance
I
HYS
V
F(OFF)
Measured at ANODE with respect to
CATHODE.
V
F(ON)
C
I
Measured at ANODE with respect to
CATHODE.
f = 100 kHz
V
F
= 0 V,
V
F
= 2 V
—
—
—
—
—
—
—
—
—
2
—
15
15
—
—
—
—
50
—
20
—
—
20
–10
—
—
0.4
0.7
0.5
1
—
54
—
30
0.8
—
0
pF
pF
V
V
µA
µA
mA
k
V
V
µA
µA
Logic Low Output
Voltage
Logic High Output
Current
Peak Output Current
Output Low Impedance
Pull-up Resistor
Enable High Min
Enable Low Max
Enable High Current
Draw
Enable Low Current
Draw
V
OL
I
OH
I
OPK
R
OL
I
OL
=3 mA, V
DD
= 3.3 or 5 V
I
OL
=13 mA, V
DD
= 5.5 V
V
DD
= V
OUT
= 5.5 V
V
DD
= V
OUT
= 24 V
Peak DC collector current drive
(V
DD
= 5 V)
Using internal pull-up
R
PU
V
EH
V
EL
I
EH
I
EL
V
DD
= V
EH
= 5 V
V
DD
=5 V, V
EL
= 0 V
—
—
4
Rev. 1.1
Si87xx
Table 2. Electrical Characteristics (Continued)
Parameter
Maximum Data Rate
Symbol
F
DATA
V
DD
= 5 V; GND = 0 V; T
A
= –40 to +125 °C; typical specs at 25 °C
Test Condition
Si87xxA devices
Si87xxB devices
Si87xxC devices
Si87xxA devices
Si87xxB devices
Si87xxC devices
C
L
= 15 pF using 350
pull-up
C
L
= 15 pF using 350
pull-up
| t
PLH
– t
PHL
|
Min
DC
DC
DC
66
66
1
—
—
—
—
Typ
—
—
—
—
—
—
—
—
—
—
Max
15
15
1
—
—
—
60
60
20
20
Unit
M
BPS
M
BPS
M
BPS
ns
ns
µs
ns
ns
ns
ns
AC Switching Parameters (V
DD
=5 V, R
L
= 350
,
C
L
= 15 pF)
Minimum Pulse Width
MPW
Propagation Delay
(Low-to-High)
Propagation Delay
(High-to-Low)
Pulse Width Distortion
Propagation Delay
Skew
t
PLH
t
PHL
PWD
t
PSK(p-p)
t
PSK(P-P)
is the magnitude of the dif-
ference in prop delays between dif-
ferent units operating at same supply
voltage, load, and ambient temp.
t
R
t
START
CMTI
t
F
C
L
= 15 pF using 350
pull-up
C
L
= 15 pF using 350
pull-up
Output = low or high
V
CM
=1500 V (See Figure 2)
I
F
= 3 mA for Si87xxA devices
I
F
= 6 mA for Si87xxB devices
I
F
= 3 mA for Si87xxC devices
Rise Time
Fall Time
Device Startup Time
Common Mode
Transient Immunity
—
—
—
15
5
—
—
—
40
ns
ns
µs
20
35
20
35
50
35
—
—
—
kV/µs
kV/µs
kV/µs
Rev. 1.1
5
聊聊、笑笑、闹闹
京公网安备 11010802033920号
Copyright © 2005-2026 EEWORLD.com.cn, Inc. All rights reserved
电子工程世界
