FMS6243 — Low-Cost, 3-Channel, SD Video Filter Drivers with External Delay Control
March 2007
FMS6243
Low-Cost, 3-Channel, SD Video Filter Drivers with
External Delay Control
Features
■
Three Fourth-Order 8MHz (SD) Filters
■
External Delay Control
■
Transparent Input Clamping
■
Dual-Video Load Drive (2Vpp, 75Ω)
■
AC- or DC-Coupled Inputs
■
AC- or DC-Coupled Outputs
■
DC-Coupled Outputs Eliminate AC-Coupling
Description
The FMS6243 Low-Cost Video Filter (LCVF) is intended
to replace passive LC filters and drivers with a low-cost
integrated device. Three fourth-order filters provide
improved image quality compared to typical second- or
third-order passive solutions.
The FMS6243 can be directly driven by a DC-coupled
DAC output or an AC-coupled signal. Internal diode
clamps and bias circuitry can be used if AC-coupled
inputs are required (see the
Applications
section for
details).
Delay for each channel can be independently controlled
with an external capacitor.
The outputs can drive AC- or DC-coupled single (150Ω)
or dual (75Ω) loads. DC coupling the outputs removes
the need for output coupling capacitors. The input DC
levels are offset approximately +280mV at the output
(see the
Applications
section for details).
Capacitors
■
5V Only
■
Lead-Free Package: TSSOP-14
Applications
■
Cable Set-Top Boxes
■
Satellite Set-Top Boxes
■
DVD Players
■
HDTV
■
Personal Video Recorders (PVR)
■
Video On Demand (VOD)
Ordering Information
Pb-
Free
Yes
Yes
Part Number
FMS6243MTC14
Package
14-Lead TSSOP, JEDEC MO-153, 4.4mm Wide
Operating
Temperature
Range
Packing Method
-40°C to 85°C
-40°C to 85°C
Tube
Tape and Reel
FMS6243MTC14X 14-Lead TSSOP, JEDEC MO-153, 4.4mm Wide
IN1
Del1
IN2
Del2
IN3
Del3
Transparent Clamp
2X
OUT1
Transparent Clamp
2X
OUT2
Transparent Clamp
2X
OUT3
8MHz, 4th-order
Figure 1. Functional Block Diagram
© 2007 Fairchild Semiconductor Corporation
FMS6243 Rev. 1.0.0
www.fairchildsemi.com
FMS6243 — Low-Cost, 3-Channel, SD Video Filter Drivers with External Delay Control
Pin Assignments
DCap1
GND
IN1
IN2
IN3
GND
DCap2
1
2
3
4
5
6
7
14
13
12
11
10
9
8
V
CC
GND
OUT1
OUT2
OUT3
DCap3
GND
Figure 2. Pin Configuration
Pin Definitions
Pin #
1
2
3
4
5
6
7
8
9
10
11
12
13
14
Name
DCap1
GND
IN1
IN2
IN3
GND
DCap2
GND
DCap3
OUT3
OUT2
OUT1
GND
V
CC
Type
INPUT
INPUT
INPUT
INPUT
INPUT
INPUT
INPUT
INPUT
INPUT
OUTPUT
OUTPUT
OUTPUT
INPUT
INPUT
Description
External Group Delay and Chroma/Luma Delay Adjustment for Channel 1
Must be tied to ground, do not float
Video input channel 1
Video input channel 2
Video input channel 3
Must be tied to ground, do not float
External Group Delay and Chroma/Luma Delay Adjustment for Channel 2
Must be tied to ground, do not float
External Group Delay and Chroma/Luma Delay Adjustment for Channel 3
Filtered output for channel 3
Filtered output for channel 2
Filtered output for channel 1
Must be tied to ground, do not float
+5V supply, do not float
© 2007 Fairchild Semiconductor Corporation
FMS6243 Rev. 1.0.0
2
www.fairchildsemi.com
FMS6243 — Low-Cost, 3-Channel, SD Video Filter Drivers with External Delay Control
Absolute Maximum Ratings
Stresses exceeding the absolute maximum ratings may damage the device. The device may not function or be opera-
ble above the recommended operating conditions and stressing the parts to these levels is not recommended. In addi-
tion, extended exposure to stresses above the recommended operating conditions may affect device reliability. The
absolute maximum ratings are stress ratings only.
Symbol
V
CC
V
I/O
I
OUT
DC Supply Voltage
Analog and Digital I/O
Parameter
Min.
-0.3
-0.3
Max.
6.0
V
CC
+0.3
50
Units
V
V
mA
Output Current Any One Channel, Do Not Exceed
Recommended Operating Conditions
The Recommended Operating Conditions table defines the conditions for actual device operation. Recommended
operating conditions are specified to ensure optimal performance to the datasheet specifications. Fairchild does not
recommend exceeding them or designing to absolute maximum ratings.
Symbols
T
A
V
CC
Parameter
Operating Temperature Range
V
CC
Range
Min.
-40
4.75
Typ.
Max.
85
Units
°C
V
5.00
5.25
Electrostatic Discharge Conditions
Symbols
HBM
CDM
Human Body Model
Charged Device Model
Parameter
Value
8
2
Units
kV
kV
Reliability Information
Symbol
T
J
T
STG
T
L
Θ
JA
Parameter
Junction Temperature
Storage Temperature Range
Reflow Temperature (Soldering)
Thermal Resistance, Still Air
JEDEC Standard Multi-Layer Test Boards,
Min.
Typ.
Max.
150
Units
°C
°C
°C
°C/W
-65
150
260
100
© 2007 Fairchild Semiconductor Corporation
FMS6243 Rev. 1.0.0
3
www.fairchildsemi.com
FMS6243 — Low-Cost, 3-Channel, SD Video Filter Drivers with External Delay Control
DC Specifications
T
A
= 25°C, V
CC
= 5.0V, R
S
= 37.5Ω; all inputs are AC coupled with 0.1μF; all outputs are AC coupled with 220μF into
150Ω loads; unless otherwise noted.
Symbol
I
CC
V
IN
PSRR
Parameter
Supply Current
(1)
Video Input Voltage Range
No Load
Conditions
Min.
Typ. Max. Units
24
1.4
48
34
mA
Vpp
dB
Referenced to GND if DC-coupled
Power Supply Rejection Ratio DC
(All Channels)
Note:
1. 100% tested at 25°C.
AC Electrical Specifications
T
A
= 25°C, V
IN
= 1V
PP
, V
CC
= 5.0V, R
S
= 37.5Ω; all inputs are AC coupled with 0.1µF; all outputs are AC coupled with
220µF into 150Ω loads; unless otherwise noted.
Symbol
AV
f
1dB
f
C
f
SB
DG
DP
THD
X
TALK
SNR
Parameter
Channel Gain
(1)
-1dB Bandwidth
(1)
-3dB Bandwidth
Attenuation (Stopband Reject)
Differential Gain
Differential Phase
All Channels
All Channels
All Channels
Conditions
Min.
5.6
5.5
Typ. Max. Units
6.0
6.5
8.0
44
0.3
0.6
0.4
-70
75
6.6
dB
MHz
MHz
dB
%
°
%
dB
dB
All Channels at f = 27MHz
All Channels
All Channels
Output Distortion (All Channels) V
OUT
= 1.8V
pp
, 1MHz
Crosstalk (Channel-to-Channel) f = 1MHz
Signal-to-Noise Ratio
All Channels, Chroma Weighting;
5MHz Low Pass
Note:
1. 100% tested at 25°C.
© 2007 Fairchild Semiconductor Corporation
FMS6243 Rev. 1.0.0
4
www.fairchildsemi.com
FMS6243 — Low-Cost, 3-Channel, SD Video Filter Drivers with External Delay Control
Application Information
The FMS6243 Low-Cost Video Filter (LCVF) provides
6dB gain from input to output. In addition, the input is
slightly offset to optimize the output driver performance.
The offset is held to the minimum required value to
decrease the standing DC current into the load. Typical
voltage levels are shown in the diagram below:
I/O Configurations
For DC-coupled DAC drive with DC-coupled outputs, use
this configuration:
Figure 5. DC-Coupled Inputs and Outputs
Alternatively, if the DAC’s average DC output level
causes the signal to exceed the range of 0V to 1.4V, it
can be AC-coupled as follows:
Figure 6. AC-Coupled Inputs, DC-Coupled Outputs
Figure 3. Typical Voltage Levels
The FMS6243 provides an internal diode clamp to sup-
port AC-coupled input signals. If the input signal does not
go below ground, the input clamp does not operate. This
allows DAC outputs to directly drive the FMS6243 without
an AC coupling capacitor. When the input is AC-coupled,
the diode clamp sets the sync tip (or lowest voltage) just
below ground. The worst-case sync tip compression due
to the clamp can not exceed 7mV. The input level set by
the clamp combined with the internal DC offset keeps the
output within its acceptable range.
For symmetric signals like Chroma, U, V, Pb, and Pr, the
average DC bias is fairly constant and the inputs can be
AC-coupled with the addition of a pull-up resistor to set
the DC input voltage. DAC outputs can also drive these
signals without the AC-coupling capacitor. A conceptual
illustration of the input clamp circuit is shown below:
When driven by an unknown external source or a
SCART switch with its own clamping circuitry, the inputs
should be AC-coupled like this:
Figure 7. SCART with DC-Coupled Outputs
The same method can be used for biased signals with
the addition of a pull-up resistor to make sure the clamp
never operates. The internal pull-down resistance is
800kΩ ±20% so the external resistance should be
7.5MΩ to set the DC level to 500mV.
Figure 4. Input Clamp Circuit
© 2007 Fairchild Semiconductor Corporation
FMS6243 Rev. 1.0.0
5
Figure 8. Biased SCART with DC-Coupled Outputs
www.fairchildsemi.com
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