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74AUP1T98GW-Q100H

产品描述IC LP CONFIG GATE V-XLATR
产品类别逻辑    逻辑   
文件大小716KB,共16页
制造商Nexperia
官网地址https://www.nexperia.com
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74AUP1T98GW-Q100H概述

IC LP CONFIG GATE V-XLATR

74AUP1T98GW-Q100H规格参数

参数名称属性值
Brand NameNexperia
厂商名称Nexperia
零件包装代码TSSOP
包装说明SC-88, 6 PIN
针数6
制造商包装代码SOT363
Reach Compliance Codecompliant
Samacsys Description74AUP1T98-Q100 - Low-power configurable gate with voltage-level translator@en-us

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74AUP1T98-Q100
Low-power configurable gate with voltage-level translator
Rev. 1 — 19 May 2014
Product data sheet
1. General description
The 74AUP1T98-Q100 provides low-power, low-voltage configurable logic gate functions.
Eight patterns of 3-bit input determine the output state. The user can choose the logic
functions MUX, AND, OR, NAND, NOR, inverter and buffer. All inputs can be connected to
V
CC
or GND.
This device ensures a very low static and dynamic power consumption across the entire
V
CC
range from 2.3 V to 3.6 V.
The 74AUP1T98-Q100 is designed for logic-level translation applications. The input
switching levels accept 1.8 V low-voltage CMOS signals, while operating from either a
single 2.5 V or 3.3 V supply voltage.
The wide supply voltage range ensures normal operation as battery voltage drops from
3.6 V to 2.3 V.
This device is fully specified for partial power-down applications using I
OFF
.
The I
OFF
circuitry disables the output, preventing the damaging backflow current through
the device when it is powered down.
Schmitt trigger inputs make the circuit tolerant to slower input rise and fall times across
the entire V
CC
range.
This product has been qualified to the Automotive Electronics Council (AEC) standard
Q100 (Grade 1) and is suitable for use in automotive applications.
2. Features and benefits
Automotive product qualification in accordance with AEC-Q100 (Grade 1)
Specified from
40 C
to +85
C
and from
40 C
to +125
C
Wide supply voltage range from 2.3 V to 3.6 V
High noise immunity
ESD protection:
MIL-STD-883, method 3015 Class 3A. Exceeds 5000 V
HBM JESD22-A114F Class 3A. Exceeds 5000 V
MM JESD22-A115-A exceeds 200 V (C = 200 pF, R = 0
)
Low static power consumption; I
CC
= 1.5
A
(maximum)
Latch-up performance exceeds 100 mA per JESD 78 Class II
Inputs accept voltages up to 3.6 V
Low noise overshoot and undershoot < 10 % of V
CC
I
OFF
circuitry provides partial power-down mode operation

 
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