Appendix A: Data Sheet Revision History ........................................................................................................................................... 91
The Microchip Web Site ...................................................................................................................................................................... 93
Customer Change Notification Service ............................................................................................................................................... 93
Customer Support ............................................................................................................................................................................... 93
Product Identification System ............................................................................................................................................................. 94
2013-2015 Microchip Technology Inc.
DS00001566B-page 3
CAP1293
1.0
1.1
INTRODUCTION
Block Diagram
FIGURE 1-1:
CAP1293 BLOCK DIAGRAM
VDD
GND
SMCLK
CS2 /
SG
Capacitive Touch
Sensing
Algorithm
SMBus
Protocol
SMDATA
ALERT#
CS1
CS3
1.2
Pin Diagrams
FIGURE 1-2:
CAP1293 8-PIN SOIC
ALERT# 1
CAP1293
SMDAT 2
SMCLK 3
VDD 4
8
7
6
5
CS1
CS2/SG
CS3
GND
1.3
Pin Description
FIGURE 1-3:
CAP1293 PIN DIAGRAM (8-PIN 2MM X 3MM TDFN)
ALERT#
SMDATA
SMCLK
VDD
1
2
Exposed pad
3
4
8
7
6
5
CS1
CS2 / SG
CS3
GND
DS00001566B-page 4
2013-2015 Microchip Technology Inc.
CAP1293
TABLE 1-1:
QFN Pin
#
1
2
3
4
5
6
PIN DESCRIPTION FOR CAP1293
SOIC Pin
#
1
2
3
4
5
6
7
Pin
Name
ALERT#
SMDATA
SMCLK
VDD
GND
CS3
Pin Function
ALERT# - Active low alert / interrupt output
for SMBus alert
SMDATA - Bi-directional, open-drain SMBus
or I
2
C data - requires pull-up resistor
SMCLK - SMBus or I
2
C clock input - requires
pull-up resistor
Positive Power supply
Ground
Capacitive Touch Sensor Input 3
CS2 - Capacitive Touch Sensor Input 2
CS2 / SG
7
SG - Signal Guard output
CS1
Exposed
pad
Capacitive Touch Sensor Input 1
Not internally connected, but recommend
grounding
AIO
AIO
-
Pin Type
Unused
Connection
Connect to
Ground
n/a
n/a
n/a
n/a
Connect to
Ground
Connect to
Ground
Leave open
Connect to
Ground
-
OD
DIOD
DI
Power
Power
AIO
AIO
7
8
Bottom
pad
8
-
APPLICATION NOTE:
All digital pins are 5V tolerant pins.
The pin types are described in
Table 1-2, "Pin Types".
TABLE 1-2:
Pin Type
Power
DI
AIO
DIOD
OD
PIN TYPES
Description
This pin is used to supply power or ground to the device.
Digital Input - This pin is used as a digital input. This pin is 5V tolerant.
Analog Input / Output - This pin is used as an I/O for analog signals.
Digital Input / Open Drain Output - This pin is used as a digital I/O. When it is used as an
output, it is open drain and requires a pull-up resistor. This pin is 5V tolerant.
Open Drain Digital Output - This pin is used as a digital output. It is open drain and requires