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74AUP1T97GW,125: 产品描述IC GATE CONFIG VOLT XLATR 6TSSOP; 产品类别逻辑逻辑; 文件大小261KB，共23页; 制造商Nexperia; 官网地址https://www.nexperia.com

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74AUP1T97GW,125概述

IC GATE CONFIG VOLT XLATR 6TSSOP

74AUP1T97GW,125规格参数

参数名称	属性值
Brand Name	Nexperia
厂商名称	Nexperia
Objectid	1815869621
零件包装代码	TSSOP
包装说明	PLASTIC, SOT-363, SC-88, PACKAGE-6
针数	6
制造商包装代码	SOT363
Reach Compliance Code	compliant
compound_id	229139770
Samacsys Description	74AUP1T97 - Low-power configurable gate with voltage-level translator@en-us
系列	AUP/ULP/V
JESD-30 代码	R-PDSO-G6
JESD-609代码	e3
长度	2 mm
负载电容（CL）	30 pF
逻辑集成电路类型	LOGIC CIRCUIT
最大I（ol）	0.0027 A
湿度敏感等级	1
功能数量	1
端子数量	6
最高工作温度	125 °C
最低工作温度	-40 °C
封装主体材料	PLASTIC/EPOXY
封装代码	TSSOP
封装等效代码	TSSOP6,.08
封装形状	RECTANGULAR
封装形式	SMALL OUTLINE, THIN PROFILE, SHRINK PITCH
包装方法	TAPE AND REEL
峰值回流温度（摄氏度）	260
电源	2.5/3.3 V
Prop。Delay @ Nom-Sup	11.9 ns
认证状态	Not Qualified
施密特触发器	YES
座面最大高度	1.1 mm
最大供电电压 (Vsup)	3.6 V
最小供电电压 (Vsup)	2.3 V
标称供电电压 (Vsup)	2.5 V
表面贴装	YES
技术	CMOS
温度等级	AUTOMOTIVE
端子面层	Tin (Sn)
端子形式	GULL WING
端子节距	0.65 mm
端子位置	DUAL
处于峰值回流温度下的最长时间	30
宽度	1.25 mm

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74AUP1T97

Rev. 6 — 28 March 2017

Low-power configurable gate with voltage-level translator

Product data sheet

General description

The 74AUP1T97 provides low-power, low-voltage configurable logic gate functions. The

output state is determined by eight patterns of 3-bit input. The user can choose the logic

functions MUX, AND, OR, NAND, NOR, inverter and buffer. All inputs can be connected

to V

or GND.

This device ensures a very low static and dynamic power consumption across the entire

range from 2.3 V to 3.6 V.

The 74AUP1T97 is designed for logic-level translation applications with input switching

levels that accept 1.8 V low-voltage CMOS signals, while operating from either a single

2.5 V or 3.3 V supply voltage.

The wide supply voltage range ensures normal operation as battery voltage drops from

3.6 V to 2.3 V.

This device is fully specified for partial power-down applications using I

OFF

. The I

OFF

circuitry disables the output, preventing the damaging backflow current through the

device when it is powered down.

Schmitt trigger inputs make the circuit tolerant to slower input rise and fall times across

the entire V

range.

Features and benefits

•

Wide supply voltage range from 2.3 V to 3.6 V

•

High noise immunity

•

ESD protection:

–

HBM JESD22-A114F Class 3A exceeds 5 000 V

–

MM JESD22-A115-A exceeds 200 V

–

CDM JESD22-C101E exceeds 1 000 V

•

Low static power consumption; I

= 1.5 μA (maximum)

•

Latch-up performance exceeds 100 mA per JESD 78 Class II

•

Inputs accept voltages up to 3.6 V

•

Low noise overshoot and undershoot < 10 % of V

•

OFF

circuitry provides partial power-down mode operation

•

Multiple package options

•

Specified from -40 °C to +85 °C and -40 °C to +125 °C

74AUP1T97GW,125相似产品对比

	74AUP1T97GW,125	74AUP1T97GXZ	74AUP1T97GN,132	74AUP1T97GM,115	74AUP1T97GS,132	74AUP1T97GM,132	935292881132
描述	IC GATE CONFIG VOLT XLATR 6TSSOP	IC GATE CONFIG MULTI-FUNC X2SON6	IC GATE CONFIG VOLT XLATR 6XSON	IC GATE CONFIG VOLT XLATR 6XSON	IC LP CONFIG GATE V-XLATR 6XSON	74AUP1T97 - Low-power configurable gate with voltage-level translator SON 6-Pin	Logic Circuit
Brand Name	Nexperia	-	Nexperia	Nexperia	Nexperia	Nexperia	-
厂商名称	Nexperia	-	Nexperia	Nexperia	Nexperia	Nexperia	-
Objectid	1815869621	-	-	1815869625	-	1815869623	8299187874
零件包装代码	TSSOP	-	SON	SON	-	SON	-
包装说明	PLASTIC, SOT-363, SC-88, PACKAGE-6	-	0.90 X 1.00 MM, 0.35 MM HEIGHT, SOT-1115, XSON-6	1 X 1.45 MM, 0.50 MM HEIGHT, PLASTIC, MO-252, SOT-886, XSON-6	1 X 1 MM, 0.35 MM HEIGHT, SOT-1202, XSON-6	1 X 1.45 MM, 0.50 MM HEIGHT, PLASTIC, MO-252, SOT-886, XSON-6	VSON,
针数	6	-	6	6	-	6	-
制造商包装代码	SOT363	-	SOT1115	SOT886	SOT1202	SOT886	-
Reach Compliance Code	compliant	-	compliant	compliant	compliant	compliant	compliant
Samacsys Description	74AUP1T97 - Low-power configurable gate with voltage-level translator@en-us	-	-	74AUP1T97 - Low-power configurable gate with voltage-level translator@en-us	74AUP1T97 - Low-power configurable gate with voltage-level translator@en-us	74AUP1T97 - Low-power configurable gate with voltage-level translator@en-us	-
系列	AUP/ULP/V	-	-	AUP/ULP/V	-	AUP/ULP/V	AUP/ULP/V
JESD-30 代码	R-PDSO-G6	-	-	S-PDSO-N6	-	S-PDSO-N6	S-PDSO-N6
JESD-609代码	e3	-	-	e3	-	e3	e3
长度	2 mm	-	-	1.45 mm	-	1.45 mm	1 mm
逻辑集成电路类型	LOGIC CIRCUIT	-	-	LOGIC CIRCUIT	-	LOGIC CIRCUIT	LOGIC CIRCUIT
湿度敏感等级	1	-	-	1	-	1	1
功能数量	1	-	-	1	-	1	1
端子数量	6	-	-	6	-	6	6
最高工作温度	125 °C	-	-	125 °C	-	125 °C	125 °C
最低工作温度	-40 °C	-	-	-40 °C	-	-40 °C	-40 °C
封装主体材料	PLASTIC/EPOXY	-	-	PLASTIC/EPOXY	-	PLASTIC/EPOXY	PLASTIC/EPOXY
封装代码	TSSOP	-	-	VSON	-	VSON	VSON
封装形状	RECTANGULAR	-	-	SQUARE	-	SQUARE	SQUARE
封装形式	SMALL OUTLINE, THIN PROFILE, SHRINK PITCH	-	-	SMALL OUTLINE, VERY THIN PROFILE	-	SMALL OUTLINE, VERY THIN PROFILE	SMALL OUTLINE, VERY THIN PROFILE
座面最大高度	1.1 mm	-	-	0.5 mm	-	0.5 mm	0.35 mm
最大供电电压 (Vsup)	3.6 V	-	-	3.6 V	-	3.6 V	3.6 V
最小供电电压 (Vsup)	2.3 V	-	-	2.3 V	-	2.3 V	2.3 V
标称供电电压 (Vsup)	2.5 V	-	-	2.5 V	-	2.5 V	3 V
表面贴装	YES	-	-	YES	-	YES	YES
技术	CMOS	-	-	CMOS	-	CMOS	CMOS
温度等级	AUTOMOTIVE	-	-	AUTOMOTIVE	-	AUTOMOTIVE	AUTOMOTIVE
端子面层	Tin (Sn)	-	-	Tin (Sn)	-	Tin (Sn)	Tin (Sn)
端子形式	GULL WING	-	-	NO LEAD	-	NO LEAD	NO LEAD
端子节距	0.65 mm	-	-	0.5 mm	-	0.5 mm	0.35 mm
端子位置	DUAL	-	-	DUAL	-	DUAL	DUAL
宽度	1.25 mm	-	-	1 mm	-	1 mm	1 mm

74AUP1T97GW,125

74AUP1T97GW,125概述

74AUP1T97GW,125规格参数

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