NCV8161
450 mA, Ultra-Low Noise
and High PSRR LDO
Regulator for RF and
Analog Circuits
The NCV8161 is a linear regulator capable of supplying 450 mA
output current. Designed to meet the requirements of RF and analog
circuits, the NCV8161 device provides low noise, high PSRR, low
quiescent current, and very good load/line transients. The device is
designed to work with a 1
mF
input and a 1
mF
output ceramic capacitor.
It is available in TSOP−5 and XDFN4 packages.
5
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MARKING
DIAGRAM
5
TSOP−5
CASE 483
1
1
XXXAYWG
G
Features
•
•
•
•
•
•
•
•
•
•
•
Operating Input Voltage Range: 1.9 V to 5.5 V
Available in Fixed Voltage Option: 1.8 V to 5.14 V
±2%
Accuracy Over Temperature
Ultra Low Quiescent Current Typ. 18
mA
Standby Current: Typ. 0.1
mA
Very Low Dropout: 225 mV at 450 mA
Ultra High PSRR: Typ. 98 dB at 20 mA, f = 1 kHz
Ultra Low Noise: 10
mV
RMS
Stable with a 1
mF
Small Case Size Ceramic Capacitors
Available in TSOP−5 and XDFN4 Packages
NCV Prefix for Automotive and Other Applications Requiring
Unique Site and Control Change Requirements; AEC−Q100
Qualified and PPAP Capable; Device Temperature Grade 1: −40°C to
+125°C Ambient Operating Temperature Range
•
These Devices are Pb−Free, Halogen Free/BFR Free and are RoHS
Compliant
Typical Applications
XXX = Specific Device Code
A
= Assembly Location
Y
= Year
W = Work Week
G
= Pb−Free Package
(Note: Microdot may be in either location)
1
XDFN4
CASE 711AJ
1
XX M
XX = Specific Device Code
M = Date Code
PIN CONNECTIONS
IN
GND
EN
1
2
3
4
(Top View)
IN
4
EN
3
NC/ADJ
5
OUT
•
•
•
•
Parking Camera Modules
Wireless Handsets, Wireless LAN, Bluetooth
®
, Zigbee
®
Automotive Infotainment Systems
Other Battery Powered Applications
V
OUT
IN
NCV8161
C
IN
1
mF
Ceramic
EN
ON
OFF
GND
C
OUT
1
mF
Ceramic
OUT
V
IN
EPAD
1
2
GND
(Top View)
Figure 1. Typical Application Schematic
OUT
ORDERING INFORMATION
See detailed ordering and shipping information on page 14 of
this data sheet.
©
Semiconductor Components Industries, LLC, 2016
1
November, 2016 − Rev. 1
Publication Order Number:
NCV8161/D
NCV8161
IN
ENABLE
LOGIC
THERMAL
SHUTDOWN
EN
BANDGAP
REFERENCE
MOSFET
INTEGRATED
SOFT−START
DRIVER WITH
CURRENT LIMIT
OUT
* ACTIVE DISCHARGE
Version A only
EN
GND
Figure 2. Simplified Schematic Block Diagram
PIN FUNCTION DESCRIPTION
Pin No.
TSOP−5
1
5
3
2
4
−
Pin No.
XDFN4
4
1
3
2
−
EP
Pin
Name
IN
OUT
EN
GND
N/C
EPAD
Input voltage supply pin
Regulated output voltage. The output should be bypassed with small 1
mF
ceramic capacitor.
Chip enable: Applying V
EN
< 0.4 V disables the regulator, Pulling V
EN
> 1.2 V enables the LDO.
Common ground connection
Not connected. This pin can be tied to ground to improve thermal dissipation.
Exposed Pad. Exposed pad can be tied to ground plane for better power dissipation.
Description
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2
NCV8161
ABSOLUTE MAXIMUM RATINGS
Rating
Input Voltage (Note 1)
Output Voltage
Chip Enable Input
Output Short Circuit Duration
Operating Ambient Temperature Range
Maximum Junction Temperature
Storage Temperature Range
ESD Capability, Human Body Model (Note 2)
ESD Capability, Machine Model (Note 2)
Symbol
V
IN
V
OUT
V
CE
t
SC
T
A
T
J
T
STG
ESD
HBM
ESD
MM
Value
−0.3 V to
6
−0.3 to V
IN
+ 0.3, max. 6 V
−0.3 to V
IN
+ 0.3, max. 6 V
unlimited
−40 to +125
150
−55 to 150
2000
200
Unit
V
V
V
s
°C
°C
°C
V
V
Stresses exceeding Maximum Ratings may damage the device. Maximum Ratings are stress ratings only. Functional operation above the
Recommended Operating Conditions is not implied. Extended exposure to stresses above the Recommended Operating Conditions may affect
device reliability.
1. Refer to ELECTRICAL CHARACTERISTICS and APPLICATION INFORMATION for Safe Operating Area.
2. This device series incorporates ESD protection and is tested by the following methods:
ESD Human Body Model tested per EIA/JESD22−A114
ESD Machine Model tested per EIA/JESD22−A115
Latchup Current Maximum Rating tested per JEDEC standard: JESD78.
THERMAL CHARACTERISTICS
Rating
Thermal Characteristics, TSOP−5 (Note 3)
Thermal Resistance, Junction−to−Air
Thermal Characteristics, XDFN4 (Note 3)
Thermal Resistance, Junction−to−Air
Symbol
R
qJA
R
qJA
Value
218
198
Unit
°C/W
°C/W
3. Measured according to JEDEC board specification. Detailed description of the board can be found in JESD51−7
RECOMMENDED OPERATING CONDITIONS
Parameter
Input Voltage
Junction Temperature
Symbol
V
IN
T
J
Min
1.9
−40
Max
5.5
125
Unit
V
°C
Functional operation above the stresses listed in the Recommended Operating Ranges is not implied. Extended exposure to stresses beyond
the Recommended Operating Ranges limits may affect device reliability.
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3
NCV8161
ELECTRICAL CHARACTERISTICS
−40°C
≤
T
J
≤
125°C; V
IN
= V
OUT(NOM)
+ 1 V; I
OUT
= 1 mA, C
IN
= C
OUT
= 1
mF,
unless otherwise
noted. V
EN
= 1.2 V. Typical values are at T
J
= +25°C (Note 4).
Parameter
Operating Input Voltage
Output Voltage Accuracy
Line Regulation
Load Regulation
−40°C
≤
T
J
≤
125°C
V
OUT(NOM)
+ 1 V
≤
V
IN
≤
5.5 V
I
OUT
= 1 mA to 450 mA
XDFN4
TSOP−5
Dropout Voltage (Note 5)
I
OUT
= 450 mA
(XDFN4)
V
OUT(NOM)
= 1.8 V
V
OUT(NOM)
= 2.8 V
V
OUT(NOM)
= 3.0 V
V
OUT(NOM)
= 3.3 V
Dropout Voltage (Note 5)
I
OUT
= 450 mA
(TSOP−5)
V
OUT(NOM)
= 1.8 V
V
OUT(NOM)
= 2.8 V
V
OUT(NOM)
= 3.0 V
V
OUT(NOM)
= 3.3 V
Output Current Limit
Short Circuit Current
Quiescent Current
Shutdown Current
EN Pin Threshold Voltage
V
OUT
= 90% V
OUT(NOM)
V
OUT
= 0 V
I
OUT
= 0 mA
V
EN
≤
0.4 V, V
IN
= 4.8 V
EN Input Voltage “H”
EN Input Voltage “L”
EN Pull Down Current
Turn−On Time
Power Supply Rejection Ratio
V
EN
= 4.8 V
C
OUT
= 1
mF,
From assertion of V
EN
to
V
OUT
= 95% V
OUT(NOM)
I
OUT
= 20 mA
f = 100 Hz
f = 1 kHz
f = 10 kHz
f = 100 kHz
I
OUT
= 1 mA
I
OUT
= 250 mA
I
CL
I
SC
I
Q
I
DIS
V
ENH
V
ENL
I
EN
0.2
120
91
98
82
48
14
10
160
140
280
−1
Tran
LINE
+1
−40
Tran
LOAD
+40
mV
mV
1.2
0.4
0.5
V
mA
ms
450
V
DO
V
DO
Test Conditions
Symbol
V
IN
V
OUT
Line
Reg
Load
Reg
Min
1.9
−2
0.02
0.001
0.005
325
195
185
175
365
260
240
225
700
690
18
0.01
23
1
mA
mA
mA
0.005
0.008
450
290
275
260
480
345
330
305
mV
mV
Typ
Max
5.5
+2
Unit
V
%
%/V
%/mA
PSRR
dB
Output Voltage Noise
Thermal Shutdown Threshold
f = 10 Hz to 100 kHz
V
N
T
SDH
T
SDL
R
DIS
mV
RMS
°C
°C
W
Temperature rising
Temperature falling
Active output discharge resistance
Line transient (Note 6)
V
EN
< 0.4 V, Version A only
V
IN
= (V
OUT(NOM)
+ 1 V) to (V
OUT(NOM)
+
1.6 V) in 30
ms,
I
OUT
= 1 mA
V
IN
= (V
OUT(NOM)
+ 1.6 V) to (V
OUT(NOM)
+
1 V) in 30
ms,
I
OUT
= 1 mA
Load transient (Note 6)
I
OUT
= 1 mA to 450 mA in 10
ms
I
OUT
= 450 mA to 1mA in 10
ms
Product parametric performance is indicated in the Electrical Characteristics for the listed test conditions, unless otherwise noted. Product
performance may not be indicated by the Electrical Characteristics if operated under different conditions.
4. Performance guaranteed over the indicated operating temperature range by design and/or characterization. Production tested at T
A
= 25°C.
Low duty cycle pulse techniques are used during the testing to maintain the junction temperature as close to ambient as possible.
5. Dropout voltage is characterized when V
OUT
falls 100 mV below V
OUT(NOM)
.
6. Guaranteed by design.
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4
NCV8161
TYPICAL CHARACTERISTICS
1.820
V
OUT
, OUTPUT VOLTAGE (V)
V
OUT
, OUTPUT VOLTAGE (V)
1.815
1.810
1.805
I
OUT
= 450 mA
1.800
1.795
V
IN
= 2.8 V
V
OUT
= 1.8 V
C
IN
= 1
mF
C
OUT
= 1
mF
0
20
40
60
80
100
120
140
I
OUT
= 10 mA
2.520
2.515
2.510
2.505
2.500
2.495
2.490
2.485
2.480
−40 −20
0
20
40
60
80
V
IN
= 3.5 V
V
OUT
= 2.5 V
C
IN
= 1
mF
C
OUT
= 1
mF
100
120 140
I
OUT
= 450 mA
I
OUT
= 10 mA
1.790
1.785
1.780
−40 −20
T
J
, JUNCTION TEMPERATURE (°C)
T
J
, JUNCTION TEMPERATURE (°C)
Figure 3. Output Voltage vs. Temperature −
V
OUT
= 1.8 V − XDFN Package
3.33
REG
LINE
, LINE REGULATION (%/V)
V
OUT
, OUTPUT VOLTAGE (V)
3.32
3.31
3.30
3.29
3.28
3.27
3.26
3.25
−40 −20
0
20
40
60
80
I
OUT
= 450 mA
V
IN
= 4.3 V
V
OUT
= 3.3 V
C
IN
= 1
mF
C
OUT
= 1
mF
100
120
140
I
OUT
= 10 mA
0.010
0.009
0.008
0.007
0.006
0.005
0.004
0.003
0.002
Figure 4. Output Voltage vs. Temperature −
V
OUT
= 2.5 V − XDFN Package
0.001
0
−40 −20
V
IN
= 2.8 V
V
OUT
= 1.8 V
C
IN
= 1
mF
C
OUT
= 1
mF
0
20
40
60
80
100
120 140
T
J
, JUNCTION TEMPERATURE (°C)
T
J
, JUNCTION TEMPERATURE (°C)
Figure 5. Output Voltage vs. Temperature −
V
OUT
= 3.3 V − XDFN Package
REG
LOAD
, LOAD REGULATION (%/mA)
0.010
REG
LINE
, LINE REGULATION (%/V)
0.009
0.008
0.007
0.006
0.005
0.004
0.003
0.002
0.001
0
−40 −20
V
IN
= 4.3 V
V
OUT
= 3.3 V
C
IN
= 1
mF
C
OUT
= 1
mF
0.0020
0.0018
0.0016
0.0014
0.0012
0.0010
0.0008
0.0006
0.0004
0.0002
Figure 6. Line Regulation vs. Temperature −
V
OUT
= 1.8 V
V
IN
= 2.8 V
V
OUT
= 1.8 V
C
IN
= 1
mF
C
OUT
= 1
mF
0
20
40
60
80
100
120 140
0
20
40
60
80
100
120
140
0
−40 −20
T
J
, JUNCTION TEMPERATURE (°C)
T
J
, JUNCTION TEMPERATURE (°C)
Figure 7. Line Regulation vs. Temperature −
V
OUT
= 3.3 V
Figure 8. Load Regulation vs. Temperature −
V
OUT
= 1.8 V
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