NOT RECOMMENDED FOR NEW
DESIGNS. REPLACE WITH IR3088A
Data Sheet No. PD94712
IR3088
XPHASE
TM
PHASE IC WITH FAULT AND OVERTEMP DETECT
DESCRIPTION
The IR3088 Phase IC combined with an IR
XPhase
TM
Control IC provides a full featured and flexible way to
implement power solutions for the latest high performance CPUs and ASICs. The “Control” IC provides
overall system control and interfaces with any number of “Phase” ICs which each drive and monitor a single
phase of a multiphase converter. The
XPhase
TM
architecture results in a power supply that is smaller, less
expensive, and easier to design while providing higher efficiency than conventional approaches.
The IR3088 is intended for the following application conditions:
•
Excessive impedance between converter and load
•
Output voltage exceeding the control IC reference/VID voltage
FEATURES
•
2.5A Average Gate Drive Current
•
Loss-Less Inductor Current Sense
•
Internal Inductor DCR Temperature Compensation
•
Programmable Phase Delay
•
Programmable Feed-Forward Voltage Mode PWM Ramp
•
Sub 100ns Minimum Pulse Width supports 1MHz per-phase operation
•
Current Sense Amplifier drives a single wire Average Current Share Bus
•
Current Share Amplifier reduces PWM Ramp slope to ensure sharing between phases
•
Body Braking
TM
disables Synchronous MOSFET for improved transient response and prevents negative
output voltage at converter turn-off
•
Phase Fault Detection
•
Programmable Phase Over-Temperature Detection
•
Control FET driver’s 25V input voltage capability simplifies boot-strap supply design
•
Small thermally enhanced 20L MLPQ package
PACKAGE PINOUT
18
20
19
17
CSIN-
PHSFLT
BIASIN
DACIN
CSIN+
16
1
RMPIN+
VCCH
15
14
2
RMPIN-
3
HOTSET
4
VRHOT
IR3088
PHASE
IC
PWMRMP
SCOMP
GATEH
PGND
13
GATEL
12
5
ISHARE
EAIN
VCCL
LGND
11
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8
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7
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VCC
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IR3088
ORDERING INFORAMATION
Device
IR3088MTR
* IR3088M
* Samples only
Order Quantity
3000 per reel
100 piece strips
ABSOLUTE MAXIMUM RATINGS
Operating Junction Temperature……………..150
o
C
Storage Temperature Range………………….-65
o
C to 150
o
C
ESD Rating………………………………………HBM Class 1C JEDEC standard
PIN #
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
PIN NAME
RMPIN+
RMPIN-
HOTSET
VRHOT
ISHARE
SCOMP
EAIN
PWMRMP
LGND
VCC
VCCL
GATEL
PGND
GATEH
VCCH
CSIN+
CSIN-
PHSFLT
DACIN
BIASIN
V
MAX
20V
20V
20V
20V
20V
20V
20V
20V
n/a
24V
27V
27V
0.3V
27V
27V
20V
20V
20V
20V
20V
V
MIN
-0.3V
-0.3V
-0.3V
-0.3V
-0.3V
-0.3V
-0.3V
-0.3V
n/a
-0.3V
-0.3V
-0.3V DC, -2V for
100ns
-0.3V
-0.3V DC, -2V for
100ns
-0.3V
-0.3V
-0.3V
-0.3V
-0.3V
-0.3V
I
SOURCE
1mA
1mA
1mA
1mA
5mA
1mA
1mA
1mA
50mA
n/a
n/a
3A for 100ns,
200mA DC
3A for 100ns,
200mA DC
3A for 100ns,
200mA DC
n/a
1mA
1mA
1mA
1mA
1mA
I
SINK
1mA
1mA
1mA
30mA
5mA
1mA
1mA
20mA
n/a
50mA
3A for 100ns,
200mA DC
3A for 100ns,
200mA DC
n/a
3A for 100ns,
200mA DC
3A for 100ns,
200mA DC
1mA
1mA
20mA
1mA
1mA
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IR3088
ELECTRICAL SPECIFICATIONS
Unless otherwise specified, these specifications apply over: 8.4V
≤
V
CC
≤
14V, 6V
≤
V
CCH
≤
25V, 6V
≤
V
CCL
≤
14V, 0
o
C
≤
T
J
≤
125
o
C, C
GATEH
= 3.3nF, C
GATEL
= 6.8nF
PARAMETER
Gate Drivers
GATEH Rise Time
GATEH Fall Time
GATEL Rise Time
GATEL Fall Time
GATEL low to GATEH high
delay
GATEH low to GATEL high
delay
Disable Pull-Down Current
Current Sense Amplifier
CSIN+ Bias Current
CSIN- Bias Current
Input Offset Voltage
Gain at T
J
= 25
o
C
Gain at T
J
= 125
o
C
Slew Rate
TEST CONDITION
VCCH = 12V, Measure 2V to 9V
transition time
VCCH = 12V, Measure 9V to 2V
transition time
VCCL = 12V, Measure 2V to 9V
transition time
VCCL = 12V, Measure 9V to 2V
transition time
VCCH = VCCL = 12V, Measure the time
from GATEL falling to 1V to GATEH
rising to 1V
VCCH = VCCL = 12V, Measure the time
from GATEH falling to 1V to GATEL
rising to 1V
Force GATEH or GATEL = 2V with
BIASIN = 0V
MIN
TYP
22
22
50
50
MAX
50
50
75
75
50
UNIT
ns
ns
ns
ns
ns
10
25
10
25
50
ns
15
25
40
µA
CSIN+ = CSIN- = DACIN. Measure input
referred offset from DACIN
-0.5
-0.5
-3
32
27
-0.25
-0.25
0.5
34
29
12.5
0
0
5
36
31
µA
µA
mV
V/V
V/V
V/µs
Current Sense Amplifier output is an
internal node. Slew rate at the ISHARE
pin will be set by the internal 10kΩ
resistor and any stray external
capacitance
-20
0
7.9
9.3
Force I(PWMRMP) = 500µA. Measure
V(PWMRMP) – V(DACIN)
-10
4
Differential Input Range
Common Mode Input Range
Rout at T
J
= 25
o
C
Rout at T
J
= 125
o
C
Ramp Discharge Clamp
Clamp Voltage
Clamp Discharge Current
10.5
12.4
5
8
100
4
13.1
15.5
20
mV
V
kΩ
kΩ
mV
mA
Page 3 of
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IR3088
PARAMETER
TEST CONDITION
MIN
TYP
MAX
Ramp Comparator
Input Offset Voltage
20
40
80
Hysteresis
Note 1
-10
0
10
RMPIN+, RMPIN- Bias Current
-1
-0.5
1
Propagation Delay
VCCH = 12V. Measure time from RMPIN
100
150
240
input (50mV overdrive) to GATEL
transition to <11V.
PWM Comparator
PWM Comparator Input Offset
-5
5
15
Voltage
EAIN & PWMRMP Bias
Clamp and Current Share Adjust OFF
-1
-0.4
1
Current
Propagation Delay
VCCH = 12V. Measure time from
70
150
PWMRMP input (50mV overdrive) to
GATEH transition to < 11V.
Common Mode Input Range
Exceeding the Common Mode input
5
range results in 100% duty cycle
Share Adjust Error Amplifier
Input Offset Voltage
10
20
30
Input Voltage Range
EAIN – PWMRMP, Note 1
-3.5
3.5
PWMRMP Adjust Current
4
8
Transconductance
I(PWMRMP) = 3.5mA, Note 1
0.9
1.6
2.3
SCOMP Source/Sink Current
Note 1
20
30
40
SCOMP Activation Voltage
Amount SCOMP must increase from its
60
150
300
minimum voltage until the Ramp Slope
Adjust current equals = 10µA
PWMRMP Min Voltage
150
225
350
I(PWMRMP) = 500µA
0% Duty Cycle Comparator
Threshold Voltage
Compare to V(DACIN)
88
91
94
Propagation Delay
VCCL = 12V. Measure time from EAIN <
100
150
0.9 x V(DACIN) (200mV overdrive) to
GATEL transition to < 11V. Note 1.
Phase Fault Comparator
Threshold Voltage
Compare to V(DACIN)
88
91
94
Output Voltage
I(PHSFLT) = 4mA
300
400
PHSFLT Leakage Current
V(PHSFLT) = 5.5V
0
10
VRHOT Comparator
HOTSET Bias Current
-2
-0.5
1
Output Voltage
I(VRHOT) = 29mA
150
400
VRHOT Leakage Current
V(VRHOT) = 5.5V
0
10
o
Threshold Hysteresis
T
J
≥
85 C
3.0
7.0
9.0
MIN
TYP
MAX
o
o
o
Threshold Voltage
T
J
≥
85 C
4.73mV/ C x T
J
+ 4.73mV/ C x T
J
+ 4.73mV/
o
C x T
J
+
1.176V
1.241V
1.356V
UNIT
mV
mV
µA
ns
mV
µA
ns
V
mV
V
mA
A/V
µA
mV
mV
%
ns
%
mV
µA
µA
mV
µA
o
C
V
Page 4 of
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IR3088
PARAMETER
General
VCC Supply Current
VCCL Supply Current
VCCH Supply Current
BIASIN Bias Current
DACIN Bias Current
Note 1:
Guaranteed by design, but not tested in production
TEST CONDITION
MIN
TYP
10
2.5
5.5
6.5
-2.5
-0.5
MAX
14
5
8
10
2
1
UNIT
mA
mA
mA
mA
µA
µA
6V
≤
V
CCH
≤
14V
14V
≤
V
CCH
≤
25V
-5
-2
PIN DESCRIPTION
PIN#
1
2
3
PIN SYMBOL
RMPIN+
RMPIN-
HOTSET
PIN DESCRIPTION
Non-inverting input to Ramp Comparator
Inverting input to Ramp Comparator
Inverting input to VRHOT comparator. Connect resistor divider from VBIAS to LGND
to program VRHOT threshold. Diode or thermistor may be substituted for lower
resistor for enhanced/remote temperature sensing.
Open Collector output of the VRHOT comparator which drives low if IC junction
temperature exceeds the user programmable limit. Connect external pull-up.
Output of the Current Sense Amplifier and input to the Share Adjust Error Amplifier.
Voltage on this pin is equal to V(DACIN) + 34 * [V(CSIN+) – V(CSIN-)]. Connecting
ISHARE pins together creates a Share Bus enabling current sharing between Phase
ICs. The Share bus is also used by the Control IC for voltage positioning and Over-
Current protection.
Compensation for the Current Share control loop. Connect a capacitor to ground to se
the control loop’s bandwidth.
PWM comparator input from the error amplifier output of Control IC. Both Gate Driver
outputs drive low if the voltage on this pin is less than 91% of V(DACIN).
PWM comparator ramp input. Connect a resistor from this pin to the converter input
voltage and a capacitor to LGND to program the PWM ramp.
Signal ground and IC substrate connection
Power for internal circuitry
Power for Low-Side Gate Driver
Low-Side Gate Driver Output and input to GATEH non-overlap comparator
Return for Gate Drivers
High-Side Gate Driver Output and input to GATEL non-overlap comparator
Power for High-Side Gate Driver
Non-inverting input to the Current Sense Amplifier
Inverting input to the Current Sense
Open Collector output of the Phase Fault comparator. Drives low if Phase current is
unable to match the level of the SHARE bus due to an external fault. Connect externa
pull-up.
Reference voltage input from the Control IC. Current sensing and PWM operation
referenced to this pin.
System reference voltage for internal circuitry
4
5
VRHOT
ISHARE
6
7
8
9
10
11
12
13
14
15
16
17
18
SCOMP
EAIN
PWMRMP
LGND
VCC
VCCL
GATEL
PGND
GATEH
VCCH
CSIN+
CSIN-
PHSFLT
19
20
DACIN
BIASIN
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