Advanced Power MOSFET
FEATURES
Avalanche Rugged Technology
Rugged Gate Oxide Technology
Lower Input Capacitance
Improved Gate Charge
Extended Safe Operating Area
Lower Leakage Current : 10
µ
A (Max.) @ V
DS
= 100V
Lower R
DS(ON)
: 0.155
Ω
(Typ.)
IRFR/U120A
BV
DSS
= 100 V
R
DS(on)
= 0.2
Ω
I
D
= 8.4 A
D-PAK
2
1
3
1
I-PAK
2
3
1. Gate 2. Drain 3. Source
Absolute Maximum Ratings
Symbol
V
DSS
I
D
I
DM
V
GS
E
AS
I
AR
E
AR
dv/dt
P
D
Characteristic
Drain-to-Source Voltage
Continuous Drain Current (T
C
=25
C
)
Continuous Drain Current (T
C
=100
C
)
Drain Current-Pulsed
Gate-to-Source Voltage
Single Pulsed Avalanche Energy
Avalanche Current
Repetitive Avalanche Energy
Peak Diode Recovery dv/dt
Total Power Dissipation (T
A
=25
C
) *
Ο
Ο
Ο
Value
100
8.4
5.3
1
O
2
O
1
O
1
O
3
O
Units
V
A
A
V
mJ
A
mJ
V/ns
W
W
W/
C
Ο
34
+
20
_
141
8.4
3.2
6.5
2.5
32
0.26
- 55 to +150
Total Power Dissipation (T
C
=25
C
)
Linear Derating Factor
Operating Junction and
Storage Temperature Range
Maximum Lead Temp. for Soldering
Purposes, 1/8” from case for 5-seconds
Ο
T
J
, T
STG
T
L
Ο
C
300
Thermal Resistance
Symbol
R
θ
JC
R
θ
JA
R
θ
JA
Characteristic
Junction-to-Case
Junction-to-Ambient *
Junction-to-Ambient
Typ.
--
--
--
Max.
3.9
50
110
Ο
Units
C
/W
*
When mounted on the minimum pad size recommended (PCB Mount).
Rev. B
©1999 Fairchild Semiconductor Corporation
IRFR/U120A
Ο
N-CHANNEL
POWER MOSFET
Electrical Characteristics
(T
C
=25
C
unless otherwise specified)
C
Symbol
BV
DSS
∆
BV/
∆
T
J
V
GS(th)
I
GSS
I
DSS
R
DS(on)
g
fs
C
iss
C
oss
C
rss
t
d(on)
t
r
t
d(off)
t
f
Q
g
Q
gs
Q
gd
Characteristic
Drain-Source Breakdown Voltage
Breakdown Voltage Temp. Coeff.
Gate Threshold Voltage
Gate-Source Leakage , Forward
Gate-Source Leakage , Reverse
Drain-to-Source Leakage Current
Static Drain-Source
On-State Resistance
Forward Transconductance
Input Capacitance
Output Capacitance
Reverse Transfer Capacitance
Turn-On Delay Time
Rise Time
Turn-Off Delay Time
Fall Time
Total Gate Charge
Gate-Source Charge
Gate-Drain(“Miller”) Charge
Min. Typ. Max. Units
100
--
2.0
--
--
--
--
--
--
--
--
--
--
--
--
--
--
--
--
--
0.12
--
--
--
--
--
--
6.29
370
95
38
14
14
36
28
16
2.7
7.8
--
--
4.0
100
-100
10
100
0.2
--
480
110
45
40
40
90
70
22
--
--
nC
ns
pF
µ
A
Ω
Ω
V
Test Condition
V
GS
=0V,I
D
=250
µ
A
See Fig 7
V/
C
I
D
=250
µ
A
V
DS
=5V,I
D
=250
µ
A
V
Ο
nA
V
GS
=20V
V
GS
=-20V
V
DS
=100V
V
DS
=80V,T
C
=125
C
V
GS
=10V,I
D
=4.2A
V
DS
=40V,I
D
=4.2A
4
O
4
O
Ο
V
GS
=0V,V
DS
=25V,f =1MHz
See Fig 5
V
DD
=50V,I
D
=9.2A,
R
G
=18
Ω
See Fig 13
V
DS
=80V,V
GS
=10V,
I
D
=9.2A
See Fig 6 & Fig 12
4
5
OO
4
5
OO
Source-Drain Diode Ratings and Characteristics
Symbol
I
S
I
SM
V
SD
t
rr
Q
rr
Characteristic
Continuous Source Current
Pulsed-Source Current
Diode Forward Voltage
Reverse Recovery Time
Reverse Recovery Charge
1
O
4
O
Min. Typ. Max. Units
--
--
--
--
--
--
--
--
98
0.34
8.4
34
1.5
--
--
A
V
ns
µ
C
Test Condition
Integral reverse pn-diode
in the MOSFET
T
J
=25
C
,I
S
=8.4A,V
GS
=0V
T
J
=25
C
,I
F
=9.2A
di
F
/dt=100A/
µ
s
4
O
Ο
Ο
Notes ;
1
O
Repetitive Rating : Pulse Width Limited by Maximum Junction Temperature
2
O
L=3mH, I
AS
=8.4A, V
DD
=25V, R
G
=27
Ω
, Starting T
J
=25
o
C
o
3
<
_
_
O
I
SD
<
9.2A,
di/dt
_
300A/
µ
s, V
DD
<
BV
DSS
, Starting T
J
=25 C
_
s,
4
Pulse Test : Pulse Width = 250
µ
Duty Cycle
<
2%
O
5
O
Essentially Independent of Operating Temperature
N-CHANNEL
POWER MOSFET
Fig 1. Output Characteristics
V
GS
15V
10 V
8.0 V
7.0 V
6.0 V
5.5 V
5.0 V
Bottom : 4.5 V
IRFR/U120A
Fig 2. Transfer Characteristics
[A]
10
1
[A]
I
D
, Drain Current
10
1
Top :
I
D
, Drain Current
150
o
C
10
0
25
o
C
@ Notes :
1. V = 0 V
GS
2. V = 40 V
DS
- 55
o
C
3. 250
µ
s Pulse Test
6
8
10
10
0
@ Notes :
1. 250
µ
s Pulse Test
2. T = 25
o
C
C
10
-1
10
0
10
1
10
-1
2
4
V
DS
, Drain-Source Voltage [V]
[A]
V
GS
, Gate-Source Voltage [V]
Fig 3. On-Resistance vs. Drain Current
R
DS(on)
, [ ]
Ω
Drain-Source On-Resistance
04
.
Fig 4. Source-Drain Diode Forward Voltage
I
DR
, Reverse Drain Current
03
.
0
V
GS
= 1 V
1
1
0
02
.
1
0
0
01
.
V = 20 V
GS
1 0
o
C
5
2
o
C
5
1
-1
0
04
.
06
.
08
.
10
.
12
.
14
.
@ N t : T
J
= 2
o
C
oe
5
00
.
0
10
20
30
4
0
@Nts:
oe
1 V
GS
= 0 V
.
2 2 0
µ
s P l e T s
. 5
us et
16
.
18
.
20
.
22
.
I
D
, Drain Current [A]
V
SD
, Source-Drain Voltage [V]
Fig 5. Capacitance vs. Drain-Source Voltage
60
0
C
iss
= C
gs
+ C ( C
ds
= s o t d )
hre
gd
Fig 6. Gate Charge vs. Gate-Source Voltage
[V]
V
DS
= 2 V
0
1
0
V =5 V
0
DS
V =8 V
0
DS
[pF]
C
iss
Capacitance
40
0
C
oss
V
GS
, Gate-Source Voltage
C
oss
= C
ds
+ C
gd
C
rss
= C
gd
20
0
C
rss
@Nts:
oe
1 V
GS
= 0 V
.
2 f=1Mz
.
H
5
@Nts:I =92A
oe
.
D
0
0
5
1
0
1
5
2
0
0
0
1
0
1
10
V
DS
, Drain-Source Voltage [V]
Q
G
, Total Gate Charge [nC]
IRFR/U120A
BV
DSS
, (Normalized)
Drain-Source Breakdown Voltage
N-CHANNEL
POWER MOSFET
Fig 8. On-Resistance vs. Temperature
R
DS(on)
, (Normalized)
Drain-Source On-Resistance
3.0
Fig 7. Breakdown Voltage vs. Temperature
1.2
2.5
1.1
2.0
1.0
1.5
1.0
@ Notes :
1. V = 10 V
GS
2. I = 4.6 A
D
0.9
@ Notes :
1. V = 0 V
GS
2. I = 250
µ
A
D
0.5
0.8
-75
-50
-25
0
25
50
75
100
o
125
150
175
0.0
-75
-50
-25
0
25
50
75
100
o
125
150
175
T
J
, Junction Temperature [ C]
T
J
, Junction Temperature [ C]
Fig 9. Max. Safe Operating Area
[A]
2
10
Fig 10. Max. Drain Current vs. Case Temperature
10
Operation in This Area
is Limited by R
DS(on)
10
µ
s
100
µ
s
[A]
I
D
, Drain Current
8
1 ms
10 ms
6
4
2
10
2
0
25
I
D
, Drain Current
1
10
DC
0
10
@ Notes :
1. T = 25
o
C
C
2. T = 150
o
C
J
3. Single Pulse
10
-1
0
10
1
10
50
75
100
125
150
V
DS
, Drain-Source Voltage [V]
T
c
, Case Temperature [
o
C]
Fig 11. Thermal Response
Thermal Response
D=0.5
10
0
0.2
0.1
0.05
0.02
0.01
@ Notes :
1. Z
θ
J C
(t)=3.9
o
C/W
Max.
2. Duty Factor, D=t /t
2
1
3. T
J M
-T
C
=P
D M
*Z
θ
J C
(t)
Z
JC
(t) ,
10
- 1
P
DM
single pulse
t
1
t
2
θ
10
- 5
10
- 4
10
- 3
10
- 2
10
- 1
10
0
10
1
t
1
, Square Wave Pulse Duration
[sec]
N-CHANNEL
POWER MOSFET
IRFR/U120A
Fig 12. Gate Charge Test Circuit & Waveform
“ Current Regulator ”
50K
Ω
12V
200nF
300nF
Same Type
as DUT
V
GS
Q
g
10V
V
DS
V
GS
DUT
3mA
Q
gs
Q
gd
R
1
Current Sampling (I
G
)
Resistor
R
2
Current Sampling (I
D
)
Resistor
Charge
Fig 13. Resistive Switching Test Circuit & Waveforms
R
L
V
out
V
in
R
G
DUT
10V
V
in
10%
V
out
V
DD
( 0.5 rated V
DS
)
90%
t
d(on)
t
on
t
r
t
d(off)
t
off
t
f
Fig 14. Unclamped Inductive Switching Test Circuit & Waveforms
L
L
V
DS
Vary t
p
to obtain
required peak I
D
BV
DSS
1
2
--------------------
E
AS
= ---- L
L
I
AS
2
BV
DSS
-- V
DD
BV
DSS
I
AS
C
V
DD
V
DD
t
p
I
D
R
G
DUT
10V
t
p
I
D
(t)
V
DS
(t)
Time
嵌入式系统
京公网安备 11010802033920号
Copyright © 2005-2026 EEWORLD.com.cn, Inc. All rights reserved
电子工程世界
