Si4322
Si4322 U
NIVERSAL
ISM B
AND
F SK R
ECEIVER
Features
Fully integrated
(low BOM, easy design-in)
No alignment required in production
Fast settling, programmable, high-
resolution PLL
Fast frequency hopping capability
High bit rate (up to 115.2 kbps in
digital mode and 256 kbps in analog
mode)
Direct differential antenna input
Programmable baseband
bandwidth (135 to 400 kHz)
Analog and digital RSSI
Automatic frequency control (AFC)
Data quality detection (DQD)
Internal data filtering and clock
recovery
RX pattern recognition
SPI compatible serial control
interface
Clock and reset signals for
microcontroller
64-bit RX data FIFO
Autonomous low duty-cycle
mode down to 0.006%
Standard 10 MHz crystal
reference
Wake-up timer
Low battery detector
2.2 to 3.8 V supply voltage
Low power consumption
Low standby current
(typical 0.3 µA)
Pin Assignments
SDI
SCK
nSEL
SDO/FFIT
nIRQ
DATA/nFFS
DCLK/FFIT/CFIL
CLK
1
2
3
4
5
6
7
8
16
15
14
VDI
ARSSI
VDD
IN1
IN2
VSS
nRES
XTL/REF
Si4322
13
12
11
10
9
Patents pending
This data sheet refers to version A1
Applications
Remote control
Home security and alarm
Wireless keyboard/mouse and other
PC peripherals
Toy control
Remote keyless entry
Tire pressure monitoring
Telemetry
Personal/patient data logging
Remote automatic meter reading
Description
Silicon Labs’ Si4322 is a single chip, low power, multi-channel FSK receiver
designed for use in applications requiring FCC or ETSI conformance for
unlicensed use in the 433, 868, and 915 MHz bands. Used in conjunction with
Silicon Labs' FSK transmitters, the Si4322 is a flexible, low cost, and highly
integrated solution that does not require production alignments. All required RF
functions are integrated. Only an external crystal and bypass filtering capacitors
are needed for operation.
The Si4322 is a complete analog RF and baseband receiver including a multi-
band PLL synthesizer with an LNA, I/Q down converter mixers, baseband filters
and amplifiers, and I/Q demodulator. The receiver employs zero-IF approach with
I/Q demodulation, therefore no external components (except crystal and
decoupling) are needed in a typical application. The Si4322 has a completely
integrated PLL for easy RF design, and its rapid settling time allows for fast
frequency hopping, bypassing multipath fading, and interference to achieve robust
wireless links. The PLL's high resolution allows the usage of multiple channels in
any of the bands. The baseband bandwidth (BW) is programmable to
accommodate various deviation, data rate, and crystal tolerance requirements.
The chip dramatically reduces the load on the microcontroller with integrated
digital data processing: data filtering, clock recovery, data pattern recognition and
integrated FIFO. The automatic frequency control (AFC) feature allows using a
low accuracy (low cost) crystal. To minimize the system cost, the chip can provide
a clock signal for the microcontroller, avoiding the need for two crystals.
Rev. 1.2 3/09
Copyright © 2009 by Silicon Laboratories
Si4322
Si4322
Functional Block Diagram
MIX
IN1 13
LNA
IN2 12
MIX
I
AMP
OC
clk
Self cal.
I/Q
Demod.
Data Filt
CLK Rec
data
7 DCLK
6 DATA
Q
AMP
OC
FIFO
PLL & I/Q VCO
with cal.
RF Parts
BB Amp/Filt./Limiter
RSSI
COMP
DQD
AFC
Data processing units
CLK div
Xosc
WTM
with cal.
LBD
Low Power parts
Controller
Bias
8
CLK
9
XTL/REF
15
ARSSI
1
2
3
4
5
16
10
11
14
SDI SCK nSEL SDO nIRQ VDI nRES
VSS VDD
2
Rev. 1.2
Si4322
T
ABLE
Section
OF
C
ONTENTS
Page
1. Electrical Specifications . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .5
2. Typical Application Schematic . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .9
2.1. Recommended Supply Decoupling Capacitor Values . . . . . . . . . . . . . . . . . . . . . . . .9
3. Internal Pin Connections . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .10
4. Functional Description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11
4.1. PLL . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11
4.2. LNA . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11
4.3. Baseband Filters . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11
4.4. Data Filtering and Clock Recovery . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .11
4.5. Data Validity Blocks . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12
4.6. Crystal Oscillator and Microcontroller Clock Output . . . . . . . . . . . . . . . . . . . . . . . . . 12
4.7. Low Battery Voltage Detector . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .13
4.8. Wake-Up Timer . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13
4.9. Event Handling . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13
4.10. Interface and Controller . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13
5. Control Interface . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14
5.1. Timing Specification . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14
5.2. Control Commands . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15
5.3. Configuration Setting Command . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16
5.4. Frequency Setting Command . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .18
5.5. Receiver Setting Command . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18
5.6. Synchron Pattern Command . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19
5.7. Wake-Up Timer Command . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19
5.8. Extended Wake-Up Timer Command . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20
5.9. Low Duty Cycle Command . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20
5.10. Low Battery Detector and Microcontroller Clock Divider Command . . . . . . . . . . . . 21
5.11. AFC Command . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 21
5.12. Data Filter Command . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 23
5.13. Data Rate Command . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 24
5.14. FIFO Settings Command . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 25
5.15. Extended Features Command . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 26
5.16. Status Register Read Command . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .26
6. Interrupt Handling . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 28
7. FIFO Buffered Data Read . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 29
7.1. Polling Mode . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .29
7.2. Interrupt Controlled Mode . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 29
7.3. FIFO Read Example with FFIT Polling . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 29
8. Power Saving Modes . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .30
9. Dual Clock Output . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 30
10. Wake-Up Timer Calibration . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 31
11. RX-TX Alignment Procedures . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 31
Rev. 1.2
3
Si4322
12. Crystal Selection Guidelines . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .32
12.1. Maximum Crystal Tolerances Including Temperature and Aging [ppm] . . . . . . . . . 32
13. Reset modes . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 34
13.1. Power-On Reset . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 34
13.2. Power Glitch Reset . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .34
14. Typical Performance Characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 36
15. Reference Design: Evaluation Board with 50
Matching Network . . . . . . . . . . . . . . 38
16. PCB Layout . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 39
17. Pin Descriptions—Si4322 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 40
18. Ordering Guide . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 41
19. Package Outline: 16-Pin TSSOP . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 42
Contact Information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .44
4
Rev. 1.2
Si4322
1. Electrical Specifications
Table 1. DC Characteristics
(Test conditions: T
OP
= 25 °C; V
DD
= 2.7 V)
Parameter
Supply Current
Standby Current
Low Battery Voltage Detector
and Wake-Up Timer Current
1
Idle Current
Low Battery Detection Threshold
Low Battery Detection Accuracy
V
dd
Threshold Required to
Generate a POR
POR Hysteresis
Symbol
I
dd
I
pd
I
lb
I
x
V
lb
V
lba
V
POR
V
PORhyst
Conditions
all blocks disabled
Min
—
—
—
Typ
12
0.3
—
0.5
Max
14
—
5
—
3.5
Units
mA
µA
µA
mA
V
%
V
V
crystal oscillator is on
1
programmable in 0.1 V
steps
—
2.0
—
—
±2.5
1.5
—
—
—
0.6
larger glitches on the V
dd
generate a POR even above
the threshold V
POR2
for proper POR generation
—
V
DD
Slew Rate
Digital Input Low Level
Digital Input High Level
Digital Input Current
Digital Input Current
Digital Output Low Level
Digital Output High Level
SR
Vdd
V
il
V
ih
I
il
I
ih
V
ol
V
oh
0.1
—
0.7 x V
DD
—
—
—
—
—
—
—
—
0.3 x V
DD
—
1
1
0.4
—
V/ms
V
V
µA
µA
V
V
V
IL
= 0 V
V
IH
= V
DD
, V
DD
= 3.8 V
I
OL
= 2 mA
I
oh
= –2 mA
–1
–1
V
DD
– 0.4
Notes:
1.
Measured with disabled clock output buffer.
2.
For detailed information see "13. Reset modes" on page 34.
Rev. 1.2
5
京公网安备 11010802033920号
Copyright © 2005-2026 EEWORLD.com.cn, Inc. All rights reserved
电子工程世界
