NCL30185
Power Factor Corrected
Quasi-Resonant Primary
Side Current-Mode
Controller for LED Lighting
with Line Step Dimming and
Thermal Foldback
The NCL30185 is a controller targeting isolated and non−isolated
“smart−dimmable” constant−current LED drivers. Designed to
support flyback, buck−boost, and SEPIC topologies, its proprietary
current−control algorithm provides near−unity power factor and
tightly regulates a constant LED current from the primary side, thus
eliminating the need for a secondary−side feedback circuitry or an
optocoupler.
Housed in the SOIC8, the NCL30185 is specifically intended for
very compact space−efficient designs. The device is highly integrated
with a minimum number of external components. A robust suite of
safety protections is built in to simplify the design. To ensure reliable
operation at elevated temperatures, a user configurable current
foldback circuit is also provided. In addition, it supports step dimming
which allows light output reduction by toggling the main AC switch
on and off.
Pin−to−pin compatible to the NCL30085, the NCL30185 provides
the same benefits with in addition, an increased resolution of the
digital current−control algorithm for a 75% reduction in the LED
current quantization ripple.
Features
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8
1
SOIC−8 NB
CASE 751
MARKING DIAGRAM
8
L30185x
ALYW
G
1
L30185x = Specific Device Code
x = A, B
A
= Assembly Location
L
= Wafer Lot
Y
= Year
W
= Work Week
G
= Pb-Free Package
PIN CONNECTIONS
1
ZCD
V
CC
•
•
•
•
•
•
•
•
•
•
•
Quasi−resonant Peak Current−mode Control Operation
DRV
VS
Valley Lockout Optimizes Efficiency over the Line/Load Range
GND
COMP
Constant Current Control with Primary Side Feedback
CS
SD
Tight LED Constant Current Regulation of
±2%
Typical
(Top View)
Power Factor Correction
3 Step Dimming (70/25/5%)
ORDERING INFORMATION
Line Feedforward for Enhanced Regulation Accuracy
See detailed ordering and shipping information in the package
dimensions section on page 27 of this data sheet.
Low Start−up Current (10
mA
typ.)
Wide V
cc
Range
300 mA / 500 mA Totem Pole Driver with 12 V Gate Clamp
Robust Protection Features
♦
OVP on V
CC
♦
Thermal Shutdown
♦
V
cc
Undervoltage Lockout
♦
Programmable Over Voltage / LED Open Circuit
Protection
♦
Brown−out Protection
♦
Cycle−by−cycle Peak Current Limit
•
Pb−Free, Halide−Free MSL1 Product
♦
Winding Short Circuit Protection
Typical Applications
♦
Secondary Diode Short Protection
•
Integral LED Bulbs and Tubes
♦
Output Short Circuit Protection
♦
Current Sense Short Protection
•
LED Light Engines
♦
User Programmable NTC Based Thermal Foldback
•
LED Drivers/Power Supplies
©
Semiconductor Components Industries, LLC, 2016
1
February, 2016 − Rev. 0
Publication Order Number:
NCL30185/D
NCL30185
.
Aux
.
.
NCL30185
1
8
2
7
3
6
4
5
Figure 1. Typical Application Schematic in a Flyback Converter
Aux
.
.
NCL30185
1
8
2
7
3
6
4
5
Figure 2. Typical Application Schematic in a Buck−Boost Converter
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NCL30185
Table 1. PIN FUNCTION DESCRIPTION
Pin No
1
2
Pin Name
ZCD
VS
Function
Zero Crossing Detection
Input Voltage Sensing
Pin Description
Connected to the auxiliary winding, this pin detects the core reset event.
This pin observes the input voltage rail and protects the LED driver in case of
too low mains conditions (brown−out).
This pin also observes the input voltage rail for:
− Power Factor Correction
− Valley lockout
− Step dimming
This pin receives a filtering capacitor for power factor correction. Typical values
ranges from 1 − 4.70
mF
Connecting an NTC to this pin allows the user to program thermal current fold-
back threshold and slope. A Zener diode can also be used to pull−up the pin
and stop the controller for adjustable OVP protection.
This pin monitors the primary peak current.
Controller ground pin.
The driver’s output to an external MOSFET
This pin is the positive supply of the IC. The circuit starts to operate when
V
CC
exceeds 18 V and turns off when
V
CC
goes below 8.8 V (typical values). After
start−up, the operating range is 9.4 V up to 26 V (V
CC
(OVP )
minimum level).
3
4
COMP
SD
Filtering Capacitor
Thermal Foldback and
Shutdown
Current Sense
−
Driver Output
IC Supply Pin
5
6
7
8
CS
GND
DRV
V
CC
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NCL30185
Internal Circuit Architecture
Enable
Over Voltage Protection
(Auto−recovery or Latched)
STOP
OFF
V
DD
V
REF
Aux_SCP
Fault
Management
UVLO
Latch
VCC
VCC Management
Over Temp. Protection
(Auto−recovery or Latched)
Internal
Thermal
Shutdown
SD
VCC_max
WOD_SCP
BO_NOK
Thermal
Foldback
V
TF
VCC Over Voltage
Protection
DRV
FF_mode
V
VS
V
REF
VCC
FF_mode
ZCD
Zero Crossing Detection Logic
(ZCD Blanking, Time−Out, ...)
Aux. Winding Short Circuit Prot.
V
VS
Aux_SCP
Valley Selection
Frequency Foldback
S
V
REFX
CS_ok
Q
Q
Clamp
Circuit
DRV
Line
feed−forward
R
STOP
V
VS
V
REFX
CS
Leading
Edge
Blanking
Power Factor and
Constant−Current
Control
CS_reset
Maximum
on time
STOP
t
on,max
COMP
Ipkmax
Max. Peak
Current
Limit
Ipkmax
BO_NOK
CS Short
Protection
UVLO
CS_ok
STEP_DIM
t
on,max
V
REFX
Brown−Out
V
VS
VS
Dimming
control
V
REF
Winding and
Output diode
Short Circuit
Protection
WOD_SCP
V
TF
GND
Figure 3. Internal Circuit Architecture
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NCL30185
Table 2. MAXIMUM RATINGS TABLE
Symbol
V
CC(MAX)
I
CC(MAX)
V
DRV(MAX)
I
DRV(MAX)
V
MAX
I
MAX
R
θJ−A
T
J(MAX)
Rating
Maximum Power Supply voltage, V
CC
pin, continuous voltage
Maximum current for V
CC
pin
Maximum driver pin voltage, DRV pin, continuous voltage
Maximum current for DRV pin
Maximum voltage on low power pins (except DRV and V
CC
pins)
Current range for low power pins (except DRV and V
CC
pins)
Thermal Resistance Junction−to−Air
Maximum Junction Temperature
Operating Temperature Range
Storage Temperature Range
ESD Capability, HBM model (Note 3)
ESD Capability, MM model (Note 3)
ESD Capability, CDM model (Note 3)
Value
−0.3 to 30
Internally limited
−0.3, V
DRV
(Note 1)
−300, +500
−0.3, 5.5 (Notes 2 and 5)
−2, +5
180
150
−40 to +125
−60 to +150
3.5
250
2
Unit
V
mA
V
mA
V
mA
°C/W
°C
°C
°C
kV
V
kV
Stresses exceeding those listed in the Maximum Ratings table may damage the device. If any of these limits are exceeded, device functionality
should not be assumed, damage may occur and reliability may be affected.
1. V
DRV
is the DRV clamp voltage V
DRV(high)
when V
CC
is higher than V
DRV(high)
. V
DRV
is V
CC
otherwise.
2. These levels are low enough not to exceed the maximum ratings of the internal ESD 5.5−V Zener diode. More positive and negative voltages
can be applied if the pin current stays within the −2−mA / 5−mA range.
3. This device contains ESD protection and exceeds the following tests: Human Body Model 3500 V per JEDEC Standard JESD22−A114E,
Machine Model Method 250 V per JEDEC Standard JESD22−A115B, Charged Device Model 2000 V per JEDEC Standard JESD22−C101E.
4. This device contains latch−up protection and has been tested per JEDEC Standard JESD78D, Class I and exceeds
±100
mA
5.
Recommended maximum V
S
voltage for optimal operation is 4 V. −0.3 V to +4.0 V is hence, the V
S
pin recommended range.
Table 3. ELECTRICAL CHARACTERISTICS
(Unless otherwise noted: For typical values T
J
= 25°C, V
CC
= 12 V, V
ZCD
= 0 V,
V
CS
= 0 V, V
SD
= 1.5 V) For min/max values T
J
= −40°C to +125°C, V
CC
= 12 V)
Description
STARTUP AND SUPPLY CIRCUITS
Supply Voltage
Startup Threshold
Minimum Operating Voltage
Hysteresis V
CC(on)
– V
CC(off)
Internal logic reset
V
CC
Over Voltage Protection Threshold
V
CC(off)
noise filter
V
CC(reset)
noise filter
Startup current
Startup current in fault mode
Supply Current
Device Disabled/Fault
Device Enabled/No output load on pin 7
Device Switching (F
SW
= 65 kHz)
CURRENT SENSE
Maximum Internal current limit
Leading Edge Blanking Duration for V
ILIM
Line feed−forward current
DRV high, V
VS
= 2 V
V
ILIM
t
LEB
I
FF
0.95
240
35
1.00
300
40
1.05
360
45
V
ns
mA
V
CC
> V
CC(off)
F
sw
= 65 kHz
C
DRV
= 470 pF, F
sw
= 65 kHz
V
V
CC
rising
V
CC
rising
V
CC
falling
V
CC(on)
V
CC(off)
V
CC(HYS)
V
CC(reset)
V
CC(OVP)
t
VCC(off)
t
VCC(reset)
I
CC(start)
I
CC(sFault)
I
CC1
I
CC2
I
CC3
0.8
–
−
16.0
8.2
8
4
25.5
−
−
−
18.0
8.8
−
5
26.8
5
20
13
58
1.0
2.5
3.0
20.0
9.4
−
6
28.5
−
−
30
75
1.2
4.0
4.5
V
ms
mA
mA
mA
Test Condition
Symbol
Min
Typ
Max
Unit
6. Guaranteed by Design
7. A NTC is generally placed between the SD and GND pins. Parameters R
TF(start)
, R
TF(stop)
, R
OTP(off)
and R
OTP(on)
give the resistance the
NTC must exhibit to respectively, enter thermal foldback, stop thermal foldback, trigger the OTP limit and allow the circuit recovery after
an OTP situation.
8. At startup, when V
CC
reaches V
CC(on)
, the controller blanks OTP for more than 250
ms
to avoid detecting an OTP fault by allowing the
SD pin voltage to reach its nominal value if a filtering capacitor is connected to the SD pin.
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