NCP781
150 V, 100 mA Very High
Voltage Linear Regulator
The NCP781 is a very high−voltage tolerant linear regulator that
offers the benefits of thermally enhanced DFN6 3.3 x 3.3 package and
is able to withstand continuous DC or transient input voltages up to
150 V. The device is stable with small 0.1
mF
Ceramic Output
Capacitors which allows smaller PCB design at space constraining
applications. The devices features enable pin compatible with
standard CMOS logic.
Features
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DFN6
S SUFFIX
CASE 506DF
•
Wide Input Voltage Range: 6 V to 150 V
•
Output Voltage Versions:
•
•
•
•
•
•
•
•
•
Fixed: 3.3 V, 5 V, 15 V
Adjustable: from 1.23 V up to 15 V
±2.5%
Accuracy at Room Temperature
Very Low Quiescent Current of Typ. 25
mA
Standby Current: 1
mA
Stable with a 0.1
mF
Ceramic Output Capacitor
Very High PSRR: 83/56 dB@1/100 kHz
Thermal Shutdown and Current Limit Protection
Available in Thermally Enhanced DFN6 3.3 x 3.3, 0.65P Package
Ideal for Harsh Environments
These are Pb−free Devices
MARKING DIAGRAM
781N
AYWWG
G
781N = Specific Device Code
A
= Assembly Location
Y
= Year
WW = Work Week
G
= Pb−Free Package
(Note: Microdot may be in either location)
Typical Applications
•
Telecom, Industrial
•
Bias Power Supplies, Led Lighting
Vin = 6 V − 150 V
IN
PIN CONNECTION
Vout = 1.23 V − 15 V
OUT
1
6
5
EP
C
in
1 uF
EN
ENABLE
NCP781
adj
GND
ADJ
R
1
R
2
C
out
1 uF
2
4
3
Vin = 6 V − 150 V
IN
OUT
Vout = 1.5 V − 15 V
NCP781
fix
EN
GND
SEN
(Top View)
C
in
1 uF
ENABLE
C
out
1 uF
ORDERING INFORMATION
See detailed ordering and shipping information in the package
dimensions section on page 13 of this data sheet.
Figure 1. Typical Applications
©
Semiconductor Components Industries, LLC, 2016
1
April, 2017 − Rev. 0
Publication Order Number:
NCP781/D
NCP781
Figure 2. Simplified Block Diagram for Adjustable Version
NCP781 fix version
IN
OUT
Vref
EN
Current Limit &
Thermal Shutdown
GND
SEN
Figure 3. Simplified Block Diagram for Fixed Version
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NCP781
Table 1. PIN FUNCTION DESCRIPTION
Pin No.
DFN6 3.3 x 3.3
1
2
3
4
5
6
EP
Pin Name
IN
EN
NC
GND
OUT
ADJ/SEN
EP
Positive Power Supply Input
Chip Enable pin (Active “H”)
Not Connected
Power Supply Ground
Regulated Output Voltage
Output Voltage Adjust Input (Adjustable Version), Sense pin for output voltage sensing, connect
to pin 5 (Fixed Voltage Versions)
EP should be connected to GND potential
Description
ABSOLUTE MAXIMUM RATINGS
Rating
Input Voltage Range (Note 1)
Output Voltage Range (Note 2)
Enable Input Range
Adjustable Input Range
Output Short Circuit Duration
Maximum Junction Temperature
Storage Temperature Range
ESD Capability, Human Body Model (Notes 3, 4)
ESD Charged Device Model ESD (Notes 3, 4)
Moisture Sensitivity Level
Lead Temperature Soldering
Reflow (SMD Styles Only), Pb−Free Versions (Note 5)
Symbol
V
IN
V
OUT
V
EN
V
ADJ
t
sc
T
J(max)
TSTG
ESDHBM
ESDCDM
MSL
T
SLD
Value
150
−0.3 to 20 V
−0.3 to (Vin + 0.3) V
−0.3 to 5 V
unlimited
150
−55 to 150
2
750
1
260
Unit
V
V
V
V
s
°C
°C
kV
V
−
°C
Stresses exceeding those listed in the Maximum Ratings table may damage the device. If any of these limits are exceeded, device functionality
should not be assumed, damage may occur and reliability may be affected.
1. Refer to ELECTRICAL CHARACTERISTIC and APPLICATION INFORMATION for Safe operating Area
2. The device has limited reverse bias protection. Reverse bias protection feature valid only if (V
OUT
*
V
IN
)
<
7 V.
3. This device series incorporates ESD protection and is tested by the following methods:
ESD Human Body Model tested per AEC−Q100−002 (EIA/JESD22−A114)
ESD Charged−Device Model ESD Capability per JEDEC JSD22−C101E
Latchup Current Maximum Rating:
v150
mA per JEDEC standard: JESD78
4. Except IN and EN pins.
5. For information, please refer to our Soldering and Mounting Techniques Reference Manual, SOLDERRM/D
Table 2. THERMAL CHARACTERISTICS
Rating
Thermal Characteristics, DFN6, 3.3 x 3.3 mm (Note 6)
Thermal Resistance, Junction−to−Air (Note 7)
Symbol
R
θJA
Value
125
Unit
°C/W
6. Refer to ELECTRICAL CHARACTERISTICS, RECOMMENDED OPERATING RANGES and/or APPLICATION INFORMATION for Safe
Operating parameters.
7. Values based on copper area of 645 mm
2
(or 1 in
2
) of 1 oz copper thickness and FR4 PCB substrate.
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NCP781
Table 3. ELECTRICAL CHARACTERISTICS − Adjustable
−40°C
≤
T
J
≤
125°C; V
IN
= Voutnom + 10 V, C
IN
= C
OUT
= 1
mF,
unless
otherwise noted. Typical values are at T
A
= +25°C. (Notes 8, 9)
Parameter
INPUT REGULATOR
Operating Input Voltage
OUTPUT REGULATOR
Reference Voltage Accuracy
Reference Voltage Accuracy
Line Regulation
Load Regulation
Dropout Voltage (Note 10)
3.3 V
5.0 V
12.0 V
15.0 V
V
DO
= V
IN
− (V
OUT
− (3%Voutnom))
I
OUT
= 100 mA
−40°C
≤
T
J
≤125°C,
I
OUT
= 50
mA
6 V
≤
V
IN
≤
150 V
T
J
= 25°C, I
OUT
= 50
mA
6 V
≤
V
IN
≤
150 V
15 V
≤
V
IN
≤
150 V
I
OUT
= 50
mA
Reg
line
Reg
load
V
DO
−
−
−
−
4
4
4.4
4.7
6.5
7.0
7.5
9.5
mA
mA
mA
nA
nA
−3%
−2.5%
1.23 V
1.23 V
0.25
0.4
+3%
+2.5%
0.5
0.8
%
%
%Vout
%Vout
V
V
IN
6
150
V
Test Conditions
Symbol
Min
Typ
Max
Unit
DISABLE, QUIESCENT AND GROUND CURRENTS
Disable Current
Quiescent Current
Ground Current
Enable Pin Current
ADJ Pin Current
CURRENT LIMIT PROTECTION
Current Limit (Note 11)
Short Circuit Current Limit
ENABLE THRESHOLDS
Enable Input Threshold Voltage
Voltage Increasing, Logic High
Voltage Decreasing, Logic Low
PSRR AND NOISE
Power Supply Ripple Rejection (Note 12)
V
IN
= 25 V + 200 mV
pp
modulation
V
OUT
= 1.23 V, Cout = 1.0
mF
I
OUT
= 10 mA
f = 1 kHz
f = 10 kHz
f = 100 kHz
V
out
= 1.23 V, V
in
= 150 V
I
OUT
= 1 mA, Cout = 1.0
mF
f = 100 Hz to 100 kHz
PSRR
−
−
−
V
NOISE
130
−
−
°C
°C
83
75
56
−
−
−
mV
rms
dB
V
TH(EN)
High
Low
1.5
−
−
−
−
0.4
V
V
OUT
= V
OUTNOM
– (10% V
OUTNOM
)
V
OUT
= 0 V, Vin = 25 V
I
LIM
I
SC
110
220
mA
mA
V
EN
= 0 V, V
IN
= 150 V
I
OUT
= 0 mA
I
OUT
= 100 mA
1.5 V < V
EN
< 150 V
6 V < V
IN
< 150 V, ADJ = V
OUT
I
DIS
I
Q
I
GND
I
EN
I
ADJ
−
−
−
1
25
250
500
5
10
55
400
Output Noise Voltage (Note 12)
THERMAL SHUTDOWN
Thermal Shutdown Temperature (Note 12)
Thermal Shutdown Hysteresis (Note 12)
T
SD
T
SH
−
−
160
15
−
−
8. Performance guaranteed over the indicated operating temperature range by design and characterization production tested at Tj = Ta = 25°C.
Low duty cycle pulse techniques are used during testing to maintain the junction temperature as close to ambient as possible.
9. I
OUT
> 50
mA
at V
IN
> 50 V
10. Not characterized at V
OUTNOM
< 3.3 V.
11. Respect to SOA
12. Guaranteed by design and characterization
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NCP781
Table 4. ELECTRICAL CHARACTERISTICS − 3.3 V
−40°C
≤
T
J
≤
125°C; V
OUT
= 3.3 V typical, V
IN
= 13.3 V, C
IN
= C
OUT
= 1
mF,
unless otherwise noted. Typical values are at T
A
= +25°C. (Notes 13, 14)
Parameter
INPUT REGULATOR
Operating Input Voltage
OUTPUT REGULATOR
Output Voltage Accuracy
Output Voltage Accuracy
Line Regulation
Load Regulation (Note 16)
Dropout Voltage (Note 15)
−40°C
≤
T
J
≤
125°C
(V
OUTNOM
+ 10 V)
≤
V
IN
≤
150 V
T
J
= 25°C, I
OUT
= 50
mA
(V
OUTNOM
+ 10 V)
≤
V
IN
≤
150 V
15 V
≤
V
IN
≤
150 V
I
OUT
= 50
mA
V
IN
= 13.3 V
I
OUT
= 100 mA
Reg
line
Reg
load
V
DO
−3%
−2.5%
3.3
3.3
8.3
13.2
4.0
+3%
+2.5%
16.5
26.5
6.5
V
V
mV
mV
V
mA
mA
mA
nA
V
IN
6
150
V
Test Conditions
Symbol
Min
Typ
Max
Unit
DISABLE, QUIESCENT AND GROUND CURRENTS
Disable Current
Quiescent Current
Ground Current
Enable pin current
CURRENT LIMIT PROTECTION
Current Limit (Note 16)
Short Circuit Current Limit
ENABLE THRESHOLDS
Enable Input Threshold Voltage
Voltage Increasing, Logic High
Voltage Decreasing, Logic Low
PSRR AND NOISE
Power Supply Ripple Rejection (Note 17)
V
IN
= 25 V + 200 mV
pp
modulation
V
OUT
= 3.3 V, C
OUT
= 1.0
mF
I
OUT
= 10 mA
f = 1 kHz
f = 10 kHz
f = 100 kHz
V
out
= 3.3 V, V
in
= 150 V
I
OUT
= 1 mA, C
OUT
= 1.0
mF
f = 100 Hz to 100 kHz
PSRR
−
−
−
V
NOISE
260
−
−
°C
°C
75
62
48
−
−
−
mV
rms
dB
V
TH(EN)
High
Low
1.5
−
−
−
−
0.4
V
V
OUT
= V
OUTNOM
– (10% V
OUTNOM
)
V
OUT
= 0 V, Vin = 25 V
I
LIM
I
SC
110
220
mA
mA
V
EN
= 0 V, V
IN
= 150 V
I
OUT
= 0 mA
I
OUT
= 100 mA
1.5 V < V
EN
< 150 V
I
DIS
I
Q
I
GND
I
EN
−
−
−
1
27
250
500
10
57
400
Output Noise Voltage (Note 17)
THERMAL SHUTDOWN
Thermal Shutdown Temperature (Note 17)
Thermal Shutdown Hysteresis (Note 17)
T
SD
T
SH
−
−
160
15
−
−
13. Performance guaranteed over the indicated operating temperature range by design and characterization production tested at Tj = Ta = 25°C.
Low duty cycle pulse techniques are used during testing to maintain the junction temperature as close to ambient as possible.
14. I
OUT
> 50
mA
at V
IN
> 50 V
15. Characterized when V
OUT
falls 99 mV below the regulated voltage and only for devices with V
OUTNOM
= 3.3 V
16. Respect to SOA
17. Guaranteed by design and characterization
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