168ball_nand_lpddr_j4p2_j4x2_j4x3_omap.pdf - Rev. C 12/12
1
Micron Technology, Inc. reserves the right to change products or specifications without notice.
2011 Micron Technology, Inc. All rights reserved.
Products and specifications discussed herein are subject to change by Micron without notice.
Micron Confidential and Proprietary
168-Ball NAND Flash and LPDDR PoP (TI OMAP) MCP
Features
Part Numbering Information
Micron NAND Flash and LPDRAM devices are available in different configurations and densities. The MCP/PoP
part numbering guide is available at
www.micron.com/numbering.
Figure 2: Part Number Chart
MT 29C XX XXX X
X
X
X
XX -X
XX XX
Micron Technology
Product Family
NAND Flash Density
LPDRAM Density
Operating Voltage Range
Production Status
Operating Temperature Range
LPDRAM Access Time
Package Codes
Chip Count
LPDRAM Configuration
NAND Flash Configuration
Device Marking
Due to the size of the package, the Micron-standard part number is not printed on the top of the device. Instead,
an abbreviated device mark consisting of a 5-digit alphanumeric code is used. The abbreviated device marks are
cross-referenced to the Micron part numbers at the FBGA Part Marking Decoder site:
www.micron.com/decoder.
To view the location of the abbreviated mark on the device, refer to customer service note CSN-11, “Product Mark/
Label,” at
www.micron.com/csn.
PDF: 09005aef846d1f3b
168ball_nand_lpddr_j4p2_j4x2_j4x3_omap.pdf - Rev. C 12/12
2
Micron Technology, Inc. reserves the right to change products or specifications without notice.
2011 Micron Technology, Inc. All rights reserved.
Micron Confidential and Proprietary
168-Ball NAND Flash and LPDDR PoP (TI OMAP) MCP
Features
Contents
MCP General Description ...............................................................................................................................
Ball Assignments and Descriptions .................................................................................................................
Features .....................................................................................................................................................
General Description .......................................................................................................................................
READ ID (90h) ............................................................................................................................................
READ ID Parameter Tables ..............................................................................................................................
SET FEATURES (EFh) ..................................................................................................................................
GET FEATURES (EEh) .................................................................................................................................
Status Operations ...........................................................................................................................................
READ STATUS (70h) ...................................................................................................................................
READ STATUS ENHANCED (78h) ................................................................................................................
Program Operations .......................................................................................................................................
PROGRAM PAGE (80h-10h) .........................................................................................................................
PROGRAM PAGE CACHE (80h-15h) .............................................................................................................
PROGRAM PAGE TWO-PLANE (80h-11h) ....................................................................................................
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PDF: 09005aef846d1f3b
168ball_nand_lpddr_j4p2_j4x2_j4x3_omap.pdf - Rev. C 12/12
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Micron Technology, Inc. reserves the right to change products or specifications without notice.
2Gb: x16, x32 Mobile LPDDR SDRAM ............................................................................................................. 135
Features .................................................................................................................................................... 135
General Description .................................................................................................................................. 137
NO OPERATION ........................................................................................................................................ 159
ACTIVE ..................................................................................................................................................... 159
AUTO REFRESH ........................................................................................................................................ 163
DEEP POWER-DOWN ................................................................................................................................ 164
Truth Tables .................................................................................................................................................. 165
State Diagram ............................................................................................................................................... 170
PDF: 09005aef846d1f3b
168ball_nand_lpddr_j4p2_j4x2_j4x3_omap.pdf - Rev. C 12/12
4
Micron Technology, Inc. reserves the right to change products or specifications without notice.
Standard Mode Register ................................................................................................................................. 174
Burst Type ................................................................................................................................................. 175
CAS Latency .............................................................................................................................................. 176
Status Read Register ...................................................................................................................................... 180
Auto Precharge .............................................................................................................................................. 206
Concurrent Auto Precharge ........................................................................................................................ 207
AUTO REFRESH Operation ............................................................................................................................ 213
Deep Power-Down .................................................................................................................................... 217
Clock Change Frequency ............................................................................................................................... 219
Revision History ............................................................................................................................................ 220
Rev. C – 12/12 ............................................................................................................................................ 220
Rev. B – 10/12 ............................................................................................................................................ 220
Rev. A – 05/11 ............................................................................................................................................ 220
PDF: 09005aef846d1f3b
168ball_nand_lpddr_j4p2_j4x2_j4x3_omap.pdf - Rev. C 12/12
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Micron Technology, Inc. reserves the right to change products or specifications without notice.
1 Introduction
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