MX25V2035F
MX25V2035F
2.3V-3.6V, 2M-BIT [x 1/x 2/x 4]
CMOS MXSMIO
®
(SERIAL MULTI I/O)
FLASH MEMORY
Key Features
•
2.3V-3.6V
for Read, Erase and Program Operations
• Unique ID and Secure OTP Support
• Multi I/O Support - Single I/O, Dual I/O and Quad I/O
• Program Suspend/Resume & Erase Suspend/Resume
P/N: PM2336
1
Rev. 1.2, March 01, 2017
MX25V2035F
Contents
1. FEATURES .............................................................................................................................................................. 5
2. GENERAL DESCRIPTION ..................................................................................................................................... 6
Table 1. Additional Feature..........................................................................................................................7
3. PIN CONFIGURATIONS ......................................................................................................................................... 8
4. PIN DESCRIPTION .................................................................................................................................................. 8
5. BLOCK DIAGRAM................................................................................................................................................... 9
6. DATA PROTECTION.............................................................................................................................................. 10
Table 2. Protected Area Sizes ................................................................................................................... 11
Table 3. 8K-bit Secured OTP Definition
....................................................................................................12
7. MEMORY ORGANIZATION ................................................................................................................................... 13
Table 4. Memory Organization ..................................................................................................................13
8. DEVICE OPERATION ............................................................................................................................................ 14
9. HOLD FEATURE.................................................................................................................................................... 16
10. COMMAND DESCRIPTION ................................................................................................................................. 17
Table 5. Command Set..............................................................................................................................17
10-1. Write Enable (WREN) .............................................................................................................................. 20
10-2. Write Disable (WRDI)............................................................................................................................... 21
10-3. Read Identification (RDID)
....................................................................................................................... 22
10-4. Read Electronic Signature (RES) ............................................................................................................ 23
10-5. Read Electronic Manufacturer ID & Device ID (REMS) ........................................................................... 24
10-6. ID Read .................................................................................................................................................... 25
Table 6. ID Definitions
..............................................................................................................................25
10-7. Read Status Register (RDSR) ................................................................................................................. 26
Table 7. Status Register ............................................................................................................................29
Table 8. Configuration
Register .................................................................................................................30
Table 9. Dummy Cycle Table .....................................................................................................................30
10-8. Read Configuration Register (RDCR)
...................................................................................................... 31
10-9. Write Status Register (WRSR)................................................................................................................. 32
Table 10. Protection Modes.......................................................................................................................33
10-10. Read Data Bytes (READ) ........................................................................................................................ 36
10-11. Read Data Bytes at Higher Speed (FAST_READ) .................................................................................. 37
10-12. Dual Read Mode (DREAD) ...................................................................................................................... 38
10-13. 2 x I/O Read Mode (2READ) ................................................................................................................... 39
10-14. Quad Read Mode (QREAD) .................................................................................................................... 40
10-15. 4 x I/O Read Mode (4READ) ................................................................................................................... 41
10-16. Burst Read ............................................................................................................................................... 43
10-17. Performance Enhance Mode ................................................................................................................... 44
10-18. Sector Erase (SE) .................................................................................................................................... 46
10-19. Block Erase (BE32K) ............................................................................................................................... 47
10-20. Block Erase (BE) ..................................................................................................................................... 48
10-21. Chip Erase (CE) ....................................................................................................................................... 49
10-22. Page Program (PP) ................................................................................................................................. 50
P/N: PM2336
Rev. 1.2, March 01, 2017
2
MX25V2035F
4 x I/O Page Program (4PP) .................................................................................................................... 51
Deep Power-down (DP) ........................................................................................................................... 52
Enter Secured OTP (ENSO) .................................................................................................................... 53
Exit Secured OTP (EXSO) ....................................................................................................................... 53
Read Security Register (RDSCUR) ......................................................................................................... 53
Table 11. Security Register Definition
.......................................................................................................54
10-28. Write Security Register (WRSCUR)......................................................................................................... 54
10-29. Program/Erase Suspend/Resume ........................................................................................................... 55
Table 12. Readable Area of Memory While a Program or Erase Operation is Suspended .......................55
Table 13. Acceptable Commands During Program/Erase Suspend after tPSL/tESL ................................55
Table 14. Acceptable Commands During Suspend (tPSL/tESL not required) ...........................................56
10-30. Program Resume and Erase Resume ..................................................................................................... 57
10-31. No Operation (NOP) ................................................................................................................................ 58
10-32. Software Reset (Reset-Enable (RSTEN) and Reset (RST)) ................................................................... 58
10-33. High Voltage Operation ............................................................................................................................ 60
10-34. Read SFDP Mode (RDSFDP).................................................................................................................. 61
11. POWER-ON STATE ............................................................................................................................................. 62
12. ELECTRICAL SPECIFICATIONS ........................................................................................................................ 63
Table 15. Absolute Maximum Ratings .......................................................................................................63
Table 16. Capacitance...............................................................................................................................63
Table 17. DC Characteristics.....................................................................................................................65
Table 18. AC Characteristics ....................................................................................................................66
13. OPERATING CONDITIONS ................................................................................................................................. 68
Table 19. Power-Up/Down Voltage and Timing .........................................................................................70
13-1. Initial Delivery State ................................................................................................................................. 70
14. ERASE AND PROGRAMMING PERFORMANCE .............................................................................................. 71
15. LATCH-UP CHARACTERISTICS ........................................................................................................................ 71
16. ORDERING INFORMATION ................................................................................................................................ 72
17. PART NAME DESCRIPTION ............................................................................................................................... 73
18. PACKAGE INFORMATION .................................................................................................................................. 74
18-1. 8-pin SOP (150mil) .................................................................................................................................. 74
18-2. 8-land USON (2x3mm) ............................................................................................................................ 75
18-3. 8-land WSON (6x5mm)............................................................................................................................ 76
19. REVISION HISTORY ........................................................................................................................................... 77
10-23.
10-24.
10-25.
10-26.
10-27.
P/N: PM2336
3
Rev. 1.2, March 01, 2017
MX25V2035F
Figures
Figure 1. Serial Modes Supported ...................................................................................................... 14
Figure 2. Serial Input Timing ............................................................................................................... 15
Figure 3. Output Timing....................................................................................................................... 15
Figure 4. Hold Timing .......................................................................................................................... 15
Figure 5. Hold Condition Operation .................................................................................................... 16
Figure 6. Write Enable (WREN) Sequence ......................................................................................... 20
Figure 7. Write Disable (WRDI) Sequence ......................................................................................... 21
Figure 8. Read Identification (RDID) Sequence
.................................................................................. 22
Figure 9. Read Electronic Signature (RES) Sequence ....................................................................... 23
Figure 10. Read Electronic Manufacturer & Device ID (REMS) Sequence ....................................... 24
Figure 11. Read Status Register (RDSR) Sequence .......................................................................... 26
Figure 12. Program/Erase flow with read array data
........................................................................... 27
Figure 13. Program/Erase flow without read array data (read P_FAIL/E_FAIL flag)
........................... 28
Figure 14. Read
Configuration
Register (RDCR) Sequence ............................................................... 31
Figure 15. Write Status Register (WRSR) Sequence ........................................................................ 32
Figure 16. WRSR flow
......................................................................................................................... 34
Figure 17. WP# Setup Timing and Hold Timing during WRSR when SRWD=1.................................. 35
Figure 18. Read Data Bytes (READ) Sequence ................................................................................. 36
Figure 19. Read at Higher Speed (FAST_READ) Sequence .............................................................. 37
Figure 20. Dual Read Mode Sequence (Command 3B) ..................................................................... 38
Figure 21. 2 x I/O Read Mode Sequence (Command BB) .................................................................. 39
Figure 22. Quad Read Mode Sequence (Command 6B) .................................................................... 40
Figure 23. 4 x I/O Read Mode Sequence............................................................................................ 42
Figure 24. Burst Read ......................................................................................................................... 43
Figure 25. 4 x I/O Read Performance Enhance Mode Sequence ....................................................... 45
Figure 26. Sector Erase (SE) Sequence ............................................................................................ 46
Figure 27. Block Erase 32KB (BE32K) Sequence (Command 52) ................................................... 47
Figure 28. Block Erase (BE) Sequence .............................................................................................. 48
Figure 29. Chip Erase (CE) Sequence............................................................................................... 49
Figure 30. Page Program (PP) Sequence .......................................................................................... 50
Figure 31. 4 x I/O Page Program (4PP) Sequence ............................................................................. 51
Figure 32. Deep Power-down (DP) Sequence and Release from Deep Power-down Sequence....... 52
Figure 33. Resume to Suspend Latency ............................................................................................. 56
Figure 34. Suspend to Read/Program Latency ................................................................................... 57
Figure 35. Resume to Read Latency .................................................................................................. 57
Figure 36. Software Reset Recovery .................................................................................................. 59
Figure 37. Reset Sequence ................................................................................................................ 59
Figure 38. High Voltage Operation Diagram ....................................................................................... 60
Figure 39. Read Serial Flash Discoverable Parameter (RDSFDP) Sequence ................................... 61
Figure 40. Maximum Negative Overshoot Waveform ......................................................................... 63
Figure 41. Maximum Positive Overshoot Waveform ........................................................................... 63
Figure 42. Input Test Waveforms and Measurement Level ................................................................. 64
Figure 43. Output Loading .................................................................................................................. 64
Figure 44. SCLK TIMING DEFINITION ............................................................................................... 64
Figure 45. AC Timing at Device Power-Up.......................................................................................... 68
Figure 46. Power-Down Sequence ..................................................................................................... 69
Figure 47. Power-up Timing ................................................................................................................ 69
Figure 48. Power Up/Down and Voltage Drop .................................................................................... 70
P/N: PM2336
4
Rev. 1.2, March 01, 2017
MX25V2035F
2.3V-3.6V 2M-BIT [x 1/x 2/x 4] CMOS MXSMIO
®
(SERIAL MULTI I/O)
FLASH MEMORY
1. FEATURES
GENERAL
• Supports Serial Peripheral Interface -- Mode 0 and
Mode 3
• 2,097,152 x 1 bit structure or 1,048,576 x 2 bits (two
I/O mode) structure or 524,288 x 4 bits (four I/O
mode)structure
• Equal Sectors with 4K byte each, or Equal Blocks
with 32K/64K byte each
- Any Block can be erased individually
• Single Power Supply Operation
- Operation Voltage: 2.3V-3.6V for Read, Erase and
Program Operations
• Latch-up protected to 100mA from -1V to Vcc +1V
PERFORMANCE
• High Performance
- Fast read
- 1 I/O: 108MHz with 8 dummy cycles
- 2 I/O: 104MHz with 4 dummy cycles, equivalent
to 208MHz
- 4 I/O: 104MHz with 2+4 dummy cycles,
equivalent to 416MHz
- Fast program and erase time
- 8/16/32/64 byte Wrap-Around Burst Read Mode
• Low Power Consumption
• Minimum 100,000 erase/program cycles
• 20 years data retention
SOFTWARE FEATURES
• Input Data Format
- 1-byte Command code
• Advanced Security Features
- Block lock protection
The BP0-BP3 status bit defines the size of the area
to be software protection against program and erase
instructions
•
Additional 8K bits secured OTP
- Features unique identifier.
- Factory locked identifiable and customer lockable
• Auto Erase and Auto Program Algorithm
-
Automatically erases and verifies data at selected
sector or block
-
Automatically programs and verifies data at select-
ed page by an internal algorithm that automatically
times the program pulse widths (Any page to be pro-
gramed should have page in the erased state first)
P/N: PM2336
•
•
•
•
•
•
Status Register Feature
Command Reset
Program/Erase Suspend and Program/Erase Re-
sume
Electronic Identification
-
JEDEC 1-byte manufacturer ID and 2-byte device
ID
- RES command for 1-byte Device ID
- REMS command for 1-byte manufacturer ID and
1-byte device ID
Support Serial Flash Discoverable Parameters
(SFDP) mode
Support Unique ID (Please contact local Macronix
sales for detail information)
HARDWARE FEATURES
•
SCLK Input
- Serial clock input
• SI/SIO0
- Serial Data Input or Serial Data Input/Output for 2
x I/O read mode and 4 x I/O read mode
• SO/SIO1
- Serial Data Output or Serial Data Input/Output for
2 x I/O read mode and 4 x I/O read mode
• WP#/SIO2
- Hardware write protection or serial data Input/Out-
put for 4 x I/O read mode
• HOLD#/SIO3
- HOLD feature, to pause the device without dese-
lecting the device or Serial input & Output for 4 x I/O
read mode
• PACKAGE
- 8-pin SOP (150mil)
- 8-land USON (2x3mm)
- 8-land WSON (6x5mm)
-
All devices are RoHS Compliant and Halogen-
free
5
Rev. 1.2, March 01, 2017
微控制器 MCU
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