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MX29GL640ELT2I-70G: 产品描述IC FLASH 64M PARALLEL 56TSOP; 产品类别存储存储; 文件大小1MB，共82页; 制造商Macronix; 官网地址http://www.macronix.com/en-us/Pages/default.aspx; 标准

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MX29GL640ELT2I-70G概述

IC FLASH 64M PARALLEL 56TSOP

MX29GL640ELT2I-70G规格参数

参数名称	属性值
是否Rohs认证	符合
厂商名称	Macronix
零件包装代码	TSOP1
包装说明	TSSOP, TSSOP56,.8,20
针数	56
Reach Compliance Code	unknown
Factory Lead Time	16 weeks
最长访问时间	70 ns
备用内存宽度	8
命令用户界面	YES
通用闪存接口	YES
数据轮询	YES
JESD-30 代码	R-PDSO-G56
JESD-609代码	e3
长度	18.4 mm
内存密度	67108864 bit
内存集成电路类型	FLASH
内存宽度	16
功能数量	1
部门数/规模	128
端子数量	56
字数	4194304 words
字数代码	4000000
工作模式	ASYNCHRONOUS
最高工作温度	85 °C
最低工作温度	-40 °C
组织	4MX16
封装主体材料	PLASTIC/EPOXY
封装代码	TSSOP
封装等效代码	TSSOP56,.8,20
封装形状	RECTANGULAR
封装形式	SMALL OUTLINE, THIN PROFILE, SHRINK PITCH
页面大小	8/16 words
并行/串行	PARALLEL
峰值回流温度（摄氏度）	NOT SPECIFIED
电源	3/3.3 V
编程电压	3 V
认证状态	Not Qualified
就绪/忙碌	YES
座面最大高度	1.2 mm
部门规模	64K
最大待机电流	0.0001 A
最大压摆率	0.1 mA
最大供电电压 (Vsup)	3.6 V
最小供电电压 (Vsup)	2.7 V
标称供电电压 (Vsup)	3 V
表面贴装	YES
技术	CMOS
温度等级	INDUSTRIAL
端子面层	Matte Tin (Sn)
端子形式	GULL WING
端子节距	0.5 mm
端子位置	DUAL
处于峰值回流温度下的最长时间	NOT SPECIFIED
切换位	YES
类型	NOR TYPE
宽度	14 mm

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MX29GL640E T/B

MX29GL640E H/L

MX29GL640E T/B, MX29GL640E H/L

DATASHEET

P/N:PM1494

REV. 1.6, OCT. 30, 2013

MX29GL640E T/B

MX29GL640E H/L

Contents

FEATURES ............................................................................................................................................................. 5

PIN CONFIGURATION for MX29GL640E T/B ....................................................................................................... 6

PIN CONFIGURATION for MX29GL640E H/L ....................................................................................................... 7

PIN DESCRIPTION ................................................................................................................................................. 8

BLOCK DIAGRAM.................................................................................................................................................. 9

BLOCK DIAGRAM DESCRIPTION ...................................................................................................................... 10

BLOCK STRUCTURE........................................................................................................................................... 11

Table 1-1. MX29GL640ET SECTOR ARCHITECTURE ............................................................................. 11

Table 1-2. MX29GL640EB SECTOR ARCHITECTURE ............................................................................. 15

Table 1-3. MX29GL640E H/L SECTOR ARCHITECTURE ......................................................................... 19

FUNCTIONAL OPERATION DESCRIPTION ....................................................................................................... 24

READ OPERATION .................................................................................................................................... 24

PAGE READ................................................................................................................................................ 24

WRITE OPERATION ................................................................................................................................... 24

DEVICE RESET .......................................................................................................................................... 24

STANDBY MODE ........................................................................................................................................ 24

OUTPUT DISABLE ..................................................................................................................................... 25

BYTE/WORD SELECTION ......................................................................................................................... 25

HARDWARE WRITE PROTECT ................................................................................................................. 25

ACCELERATED PROGRAMMING OPERATION ...................................................................................... 25

WRITE BUFFER PROGRAMMING OPERATION ...................................................................................... 25

SECTOR PROTECT OPERATION ............................................................................................................. 26

AUTOMATIC SELECT BUS OPERATIONS ................................................................................................ 26

SECTOR LOCK STATUS VERIFICATION .................................................................................................. 26

READ SILICON ID MANUFACTURER CODE ............................................................................................ 27

READ INDICATOR BIT (Q7) FOR SECURITY SECTOR ........................................................................... 27

INHERENT DATA PROTECTION................................................................................................................ 27

COMMAND COMPLETION......................................................................................................................... 27

LOW VCC WRITE INHIBIT ......................................................................................................................... 27

WRITE PULSE "GLITCH" PROTECTION................................................................................................... 27

LOGICAL INHIBIT ....................................................................................................................................... 27

POWER-UP SEQUENCE ........................................................................................................................... 28

POWER-UP WRITE INHIBIT ...................................................................................................................... 28

POWER SUPPLY DECOUPLING ............................................................................................................... 28

COMMAND OPERATIONS ................................................................................................................................... 29

READING THE MEMORY ARRAY .............................................................................................................. 29

AUTOMATIC PROGRAMMING OF THE MEMORY ARRAY ..................................................................... 29

ERASING THE MEMORY ARRAY .............................................................................................................. 30

SECTOR ERASE ........................................................................................................................................ 30

CHIP ERASE.............................................................................................................................................. 31

P/N:PM1494

REV. 1.6, OCT. 30, 2013

MX29GL640E T/B

MX29GL640E H/L

ERASE SUSPEND/RESUME ..................................................................................................................... 32

SECTOR ERASE RESUME ........................................................................................................................ 32

PROGRAM SUSPEND/RESUME ............................................................................................................... 33

PROGRAM RESUME ................................................................................................................................. 33

BUFFER WRITE ABORT ............................................................................................................................ 33

AUTOMATIC SELECT OPERATIONS ........................................................................................................ 34

AUTOMATIC SELECT COMMAND SEQUENCE ....................................................................................... 34

READ MANUFACTURER ID OR DEVICE ID ............................................................................................. 35

RESET ....................................................................................................................................................... 35

ADVANCED SECTOR PROTECTION/UN-PROTECTION ......................................................................... 36

Figure 1. Advance Sector Protection/Unprotection SPB Program Algorithm .............................................. 36

Figure 2. Lock Register Program Algorithm ................................................................................................ 37

Figure 3. SPB Program Algorithm ............................................................................................................... 39

SECURITY SECTOR FLASH MEMORY REGION ..................................................................................... 42

TABLE 3. COMMAND DEFINITIONS ......................................................................................................... 43

COMMON FLASH MEMORY INTERFACE (CFI) MODE ..................................................................................... 46

QUERY COMMAND AND COMMAND FLASH MEMORY INTERFACE (CFI) MODE ............................... 46

Table 4-1. CFI mode: Identification Data Values

(Note 1)

................................................................................ 46

Table 4-2. CFI mode: System Interface Data Values .................................................................................. 46

Table 4-3. CFI mode: Device Geometry Data Values.................................................................................. 47

Table 4-4. CFI mode: Primary Vendor-Specific Extended Query Data Values

............................................ 48

ELECTRICAL CHARACTERISTICS .................................................................................................................... 49

ABSOLUTE MAXIMUM STRESS RATINGS............................................................................................... 49

OPERATING TEMPERATURE AND VOLTAGE .......................................................................................... 49

DC CHARACTERISTICS ............................................................................................................................ 50

SWITCHING TEST CIRCUITS .................................................................................................................... 51

SWITCHING TEST WAVEFORMS ............................................................................................................ 51

AC CHARACTERISTICS ............................................................................................................................ 52

Figure 4. COMMAND WRITE OPERATION................................................................................................ 53

READ/RESET OPERATION ................................................................................................................................. 54

Figure 5. READ TIMING WAVEFORMS ..................................................................................................... 54

Figure 6. RESET# TIMING WAVEFORM ................................................................................................... 55

ERASE/PROGRAM OPERATION ........................................................................................................................ 56

Figure 7. AUTOMATIC CHIP ERASE TIMING WAVEFORM ...................................................................... 56

Figure 8. AUTOMATIC CHIP ERASE ALGORITHM FLOWCHART ............................................................ 57

Figure 9. AUTOMATIC SECTOR ERASE TIMING WAVEFORM ................................................................ 58

Figure 10. AUTOMATIC SECTOR ERASE ALGORITHM FLOWCHART ................................................... 59

Figure 11. ERASE SUSPEND/RESUME FLOWCHART ............................................................................. 60

Figure 12. AUTOMATIC PROGRAM TIMING WAVEFORMS ..................................................................... 61

Figure 13. ACCELERATED PROGRAM TIMING DIAGRAM ...................................................................... 61

Figure 14. CE# CONTROLLED WRITE TIMING WAVEFORM................................................................... 62

Figure 15. AUTOMATIC PROGRAMMING ALGORITHM FLOWCHART.................................................... 63

P/N:PM1494

REV. 1.6, OCT. 30, 2013

MX29GL640E T/B

MX29GL640E H/L

Figure 16. SILICON ID READ TIMING WAVEFORM .................................................................................. 64

WRITE OPERATION STATUS .............................................................................................................................. 65

Figure 17. DATA# POLLING TIMING WAVEFORMS (DURING AUTOMATIC ALGORITHMS) .................. 65

Figure 18. STATUS POLLING FOR WORD PROGRAM/ERASE ............................................................... 66

Figure 19. STATUS POLLING FOR WRITE BUFFER PROGRAM ............................................................. 67

Figure 20. TOGGLE BIT TIMING WAVEFORMS (DURING AUTOMATIC ALGORITHMS) ....................... 68

Figure 21. TOGGLE BIT ALGORITHM........................................................................................................ 69

Figure 22. BYTE# TIMING WAVEFORM FOR READ OPERATIONS (BYTE# switching from byte mode to

word mode) ................................................................................................................................................. 70

Figure 23. PAGE READ TIMING WAVEFORM ........................................................................................... 70

Figure 24. DEEP POWER DOWN MODE WAVEFORM ............................................................................ 71

Figure 25. WRITE BUFFER PROGRAM FLOWCHART ............................................................................. 72

RECOMMENDED OPERATING CONDITIONS .................................................................................................... 73

ERASE AND PROGRAMMING PERFORMANCE ............................................................................................... 74

DATA RETENTION ............................................................................................................................................... 74

LATCH-UP CHARACTERISTICS ......................................................................................................................... 74

PIN CAPACITANCE .............................................................................................................................................. 74

ORDERING INFORMATION ................................................................................................................................. 75

PART NAME DESCRIPTION ................................................................................................................................ 76

PACKAGE INFORMATION ................................................................................................................................... 77

REVISION HISTORY ............................................................................................................................................ 81

P/N:PM1494

REV. 1.6, OCT. 30, 2013

MX29GL640ELT2I-70G

MX29GL640ELT2I-70G概述

MX29GL640ELT2I-70G规格参数

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