LT1995
32MHz, 1000V/µs
Gain Selectable Amplifier
FEATURES
■
■
■
DESCRIPTIO
■
■
■
■
■
■
■
■
■
Internal Gain Setting Resistors
Pin Configurable as a Difference Amplifier,
Inverting and Noninverting Amplifier
Difference Amplifier:
Gain Range 1 to 7
CMRR > 65dB
Noninverting Amplifier:
Gain Range 1 to 8
Inverting Amplifier:
Gain Range –1 to –7
Gain Error: <0.2%
Slew Rate: 1000V/µs
Bandwidth: 32MHz (Gain = 1)
Op Amp Input Offset Voltage: 2.5mV Max
Quiescent Current: 9mA Max
Wide Supply Range:
±2.5V
to
±15V
Available in 10-Lead MSOP and
10-Lead (3mm
×
3mm) DFN Packages
The LT
®
1995 is a high speed, high slew rate, gain select-
able amplifier with excellent DC performance. Gains from
–7 to 8 with a gain accuracy of 0.2% can be achieved using
no external components. The device is particularly well
suited for use as a difference amplifier, where the excellent
resistor matching results in a typical common mode
rejection ratio of 79dB.
The amplifier is a single gain stage design similar to the
LT1363 and features superb slewing and settling charac-
teristics. Input offset of the internal operational amplifier
is less than 2.5mV and the slew rate is 1000V/µs. The
output can drive a 150Ω load to
±2.5V
on
±5V
supplies,
making it useful in cable driver applications.
The resistors have excellent matching, 0.2% maximum at
room temperature and 0.3% from –40°C to 85°C. The
temperature coefficient of the resistors is typically
–30ppm/°C. The resistors are extremely linear with volt-
age, resulting in a gain nonlinearity of 10ppm.
The LT1995 is fully specified at
±2.5V, ±5V
and
±15V
sup-
plies and from –40°C to 85°C. The device is available in
space saving 10-lead MSOP and 10-Lead (3mm
×
3mm)
DFN packages. For a micropower precision amplifier with
precision resistors, see the LT1991 and LT1996.
, LTC and LT are registered trademarks of Linear Technology Corporation.
All other trademarks are the property of their respective owners.
APPLICATIO S
■
■
■
■
Instrumentation Amplifier
Current Sense Amplifier
Video Difference Amplifier
Automatic Test Equipment
TYPICAL APPLICATIO
M1 M2 M4
1k
2k
High Slew Rate Differential Gain of 1
15V
4k
OUT
Large-Signal Transient (G = 1)
+
2k
1k
P1 P2 P4
+
INPUT
RANGE
–15V TO 15V
4k
–
–
4k
LT1995
4k
1995 TA01b
REF
–15V
1995 TA01a
U
1995fb
U
U
1
LT1995
ABSOLUTE
MAXIMUM
RATINGS
Total Supply Voltage (V
+
to V
–
) .............................. 36V
Input Current (Note 2) .......................................
±10mA
Output Short-Circuit Duration (Note 3) ........... Indefinite
Operating Temperature Range (Note 4) .. – 40°C to 85°C
Specified Temperature Range (Note 5) ... – 40°C to 85°C
PACKAGE/ORDER INFORMATION
TOP VIEW
P1
P2
P4
V
S–
REF
1
2
4
5
– +
ORDER PART
NUMBER
10 M1
9 M2
8 M4
7 V
S+
6 OUT
TOP VIEW
DD PACKAGE
10-LEAD (3mm
×
3mm) PLASTIC DFN
T
JMAX
= 125°C,
θ
JA
= 160°C/W (NOTE 6)
EXPOSED PAD INTERNALLY CONNECTED TO V
S–
PCB CONNECTION OPTIONAL
DD PART
MARKING*
LBJF
LBJF
MS PACKAGE
10-LEAD PLASTIC MSOP
T
JMAX
= 150°C,
θ
JA
= 160°C/W (NOTE 6)
Order Options
Tape and Reel: Add #TR
Lead Free: Add #PBF Lead Free Tape and Reel: Add #TRPBF
Lead Free Part Marking:
http://www.linear.com/leadfree/
Consult LTC Marketing for parts specified with wider operating temperature ranges. *The temperature grades are identified by a label on the shipping container.
ELECTRICAL CHARACTERISTICS
Difference Amplifier Configuration. T
A
= 25°C, V
REF
= V
CM
= 0V and unused gain pins are unconnected, unless otherwise noted.
SYMBOL PARAMETER
GE
Gain Error
CONDITIONS
V
OUT
=
±12V,
R
L
= 1k, G = 1
V
OUT
=
±12V,
R
L
= 1k, G = 2
V
OUT
=
±12V,
R
L
= 1k, G = 4
V
OUT
=
±5V,
R
L
= 150Ω, G = 1
V
OUT
=
±2.5V,
R
L
= 500Ω, G = 1
V
OUT
=
±2.5V,
R
L
= 150Ω, G = 1
V
OUT
=
±12V,
R
L
= 1k, G = 1
G = 1 (MS10)
G = 1 (DD10)
G = 2 (MS10)
G = 2 (DD10)
G = 4 (MS10)
G = 4 (DD10)
G = 1 (MS10)
G = 1 (DD10)
G = 1 (MS10)
G = 1 (DD10)
V
SUPPLY
±15V
±15V
±15V
±15V
±5V
±5V
±15V
±15V
±15V
±15V
±15V
±15V
±15V
±5V
±5V
±2.5V
±2.5V
MIN
TYP
0.05
0.05
0.05
0.05
0.05
0.05
10
1
1.5
0.7
1.2
0.6
0.9
1
1.4
1
1.3
5
9
4
6.8
3.75
5.6
5
9
5
9
MAX
0.2
0.2
0.2
0.25
0.2
0.25
UNITS
%
%
%
%
%
%
ppm
mV
mV
mV
mV
mV
mV
mV
mV
mV
mV
1995fb
GNL
V
OS
Gain Nonlinearity
Input Offset Voltage
Referred to Input (Note 7)
2
– +
3
LT1995CDD
LT1995IDD
U
U
W
W W
U
W
(Note 1)
Storage Temperature Range
MS Package .................................... – 65°C to 150°C
DD Package ..................................... – 65°C to 125°C
Maximum Junction Temperature
MS Package ..................................................... 150°C
DD Package ..................................................... 125°C
Lead Temperature (Soldering, 10 sec).................. 300°C
ORDER PART
NUMBER
P1
P2
P4
V
S–
REF
1
2
3
4
5
10
9
8
7
6
M1
M2
M4
V
S+
OUT
LT1995CMS
LT1995IMS
MS PART
MARKING*
LTBJD
LTBJD
LT1995
ELECTRICAL CHARACTERISTICS
Difference Amplifier Configuration. T
A
= 25°C, V
REF
= V
CM
= 0V and unused gain pins are unconnected, unless otherwise noted.
SYMBOL PARAMETER
V
OS_OA
e
n
Op Amp Input Offset Voltage
(Note 10)
Input Noise Voltage
CONDITIONS
G = 1 (MS10)
G = 1 (DD10)
G = 1, f = 10kHz
G = 2, f = 10kHz
G = 4, f = 10kHz
V
SUPPLY
±2.5V, ±5V, ±15V
±2.5V, ±5V, ±15V
±2.5V
to
±15V
±2.5V
to
±15V
±2.5V
to
±15V
±15V
±15V
G=1
±15V
±5V
±2.5V
±15V
±15V
±15V
±5V
±2.5V
±15V
±15V
±5V
±2.5V
±15V
±15V
±5V
±15V
±5V
±15V
±15V
±5V
±2.5V
±15V
±5V
±15V
±5V
±15V
±5V
±15V
±5V
±15V
±15V
±15V
±15V
±5V
±15
±5
±1
65
71
75
65
61
78
±13.5
±13
±3.5
±1.3
±70
750
MIN
TYP
0.5
0.75
27
18
14
4
2.5
±15.5
±5.5
±1.5
79
84
87
73
68
87
±14
±13.5
±4
±2
±120
1000
450
16
24
–81
32
25
21
10
15
30
30
9
11
100
110
0.06
0.15
1.5
7.1
6.7
9.0
8.5
MAX
2.5
4.5
UNITS
mV
mV
nV/√Hz
nV/√Hz
nV/√Hz
kΩ
pF
V
V
V
dB
dB
dB
dB
dB
dB
V
V
V
V
mA
V/µs
V/µs
MHz
MHz
dB
MHz
MHz
MHz
ns
ns
%
%
ns
ns
ns
ns
%
Deg
Ω
mA
mA
R
IN
C
IN
Common Mode Input Resistance V
CM
=
±15V,
G = 1
Input Capacitance
Input Voltage Range
CMRR
Common Mode Rejection Ratio
Referred to Input
G = 1, V
CM
=
±15V
G = 2, V
CM
=
±15V
G = 4, V
CM
=
±15V
G = 1, V
CM
=
±5V
G = 1, V
CM
=
±1V
P1 = M1 = 0V, G = 1, V
S
=
±2.5V
to
±15V
R
L
= 1k
R
L
= 500Ω
R
L
= 500Ω
R
L
= 500Ω
G=1
G = –2, V
OUT
=
±12V,
P2 = 0V
Measured at V
OUT
=
±10V
G = –2, V
OUT
=
±3.5V,
P2 = 0V
Measured at V
OUT
=
±2V
10V Peak, G = –2 (Note 8)
3V Peak, G = –2 (Note 8)
G = 1, f = 1MHz, R
L
= 1k, V
OUT
= 2V
P-P
G=1
PSRR
V
OUT
Power Supply Rejection Ratio
Output Voltage Swing
I
SC
SR
Short-Circuit Current
Slew Rate
FPBW
HD
Full Power Bandwidth
Total Harmonic Distortion
–3dB Bandwidth
t
r
, t
f
OS
t
pd
t
s
∆G
∆θ
R
OUT
I
S
Rise Time, Fall Time
Overshoot
Propagation Delay
Settling Time
Differential Gain
Differential Phase
Output Resistance
Supply Current
10% to 90%, 0.1V, G = 1
0.1V, G = 1, C
L
= 10pF
50% V
IN
to 50% V
OUT
, 0.1V, G = 1
10V Step, 0.1%, G = 1
5V Step, 0.1%, G = 1
G = 2, R
L
= 150Ω
G = 2, R
L
= 150Ω
f = 1MHz, G = 1
G=1
1995fb
3
LT1995
ELECTRICAL CHARACTERISTICS
SYMBOL
GE
PARAMETER
Gain Error
CONDITIONS
The
●
denotes the specifications which apply over the 0°C
≤
T
A
≤
70°C.
Difference Amplifier Configuration. V
REF
= V
CM
= 0V and unused gain pins are unconnected, unless otherwise noted.
V
SUPPLY
±15V
±15V
±15V
±5V
±5V
±15V
±15V
±15V
±15V
±15V
±15V
±5V
±5V
±2.5V
±2.5V
±15V
±15V
±2.5V, ±5V, ±15V
±2.5V, ±5V, ±15V
±15V
±5V
±2.5V
±15V
±15V
±15V
±5V
±2.5V
±15V
±15V
±5V
±2.5V
±15V
±15V
±15V
±5V
●
●
●
●
●
●
●
●
●
●
●
●
●
●
●
●
●
●
●
●
●
●
●
●
●
●
●
●
●
●
●
●
●
●
●
●
MIN
TYP
0.05
0.05
0.05
0.05
0.05
1.1
1.5
0.8
1.2
0.7
0.9
1
1.4
1
1.3
10
10
0.55
0.75
MAX
0.25
0.25
0.25
0.25
0.35
6.5
11.5
5.5
9
5
7.5
6.5
11.5
6.5
11.5
26
35
3.25
5.75
UNITS
%
%
%
%
%
mV
mV
mV
mV
mV
mV
mV
mV
mV
mV
µV/°C
µV/°C
mV
mV
V
V
V
dB
dB
dB
dB
dB
dB
V
V
V
V
mA
V/µs
V
OUT
=
±12V,
R
L
= 1k, G = 1
V
OUT
=
±12V,
R
L
= 1k, G = 2
V
OUT
=
±12V,
R
L
= 1k, G = 4
V
OUT
=
±2.5V,
R
L
= 500Ω, G = 1
V
OUT
=
±2.5V,
R
L
= 150Ω, G = 1
G = 1 (MS10)
G = 1 (DD10)
G = 2 (MS10)
G = 2 (DD10)
G = 4 (MS10)
G = 4 (DD10)
G = 1 (MS10)
G = 1 (DD10)
G = 1 (MS10)
G = 1 (DD10)
G = 1 (MS10)
G = 1 (DD10)
G = 1 (MS10)
G = 1 (DD10)
G=1
V
OS
Input Offset Voltage
Referred to Input (Note 7)
V
OS
TC
V
OS_OA
Input Offset Voltage Drift
Referred to Input (Note 9)
Op Amp Input Offset Voltage
(Note 10)
Input Voltage Range
±15
±5
±1
63
69
73
62
59
76
±13.1
±12.6
±3.4
±1.2
±55
600
±15.5
±5.5
±1.5
77
83
86
72
66
86
±14
±13.5
±4
±2
±115
900
7.9
7.4
10.5
9.9
CMRR
Common Mode Rejection Ratio
Referred to Input
V
CM
=
±15V,
G = 1
V
CM
=
±15V,
G = 2
V
CM
=
±15V,
G = 4
V
CM
=
±5V,
G = 1
V
CM
=
±1V,
G = 1
P1 = M1 = 0V, G = 1, V
S
=
±2.5V
to
±15V
R
L
= 1k
R
L
= 500Ω
R
L
= 500Ω
R
L
= 500Ω
G=1
G = –2, V
OUT
=
±12V,
P2 = 0V
Measured at V
OUT
=
±10V
G=1
PSRR
V
OUT
Power Supply Rejection Ratio
Output Voltage Swing
I
SC
SR
I
S
Short-Circuit Current
Slew Rate
Supply Current
mA
mA
The
●
denotes the specifications which apply over the –40°C
≤
T
A
≤
85°C.
Difference Amplifier Configuration. V
REF
= V
CM
= 0V and unused gain pins are unconnected, unless otherwise noted.
SYMBOL
GE
PARAMETER
Gain Error
CONDITIONS
V
OUT
=
±12V,
R
L
= 1k, G = 1
V
OUT
=
±12V,
R
L
= 1k, G = 2
V
OUT
=
±12V,
R
L
= 1k, G = 4
V
OUT
=
±2.5V,
R
L
= 500Ω, G = 1
V
OUT
=
±2.5V
R
L
= 150Ω, G = 1
V
SUPPLY
±15V
±15V
±15V
±5V
±5V
●
●
●
●
●
MIN
TYP
0.05
0.05
0.05
0.05
0.05
MAX
0.3
0.35
0.35
0.3
0.5
UNITS
%
%
%
%
%
1995fb
4
LT1995
ELECTRICAL CHARACTERISTICS
SYMBOL
V
OS
PARAMETER
Input Offset Voltage
Referred to Input (Note 7)
CONDITIONS
G = 1 (MS10)
G = 1 (DD10)
G = 2 (MS10)
G = 2 (DD10)
G = 4 (MS10)
G = 4 (DD10)
G = 1 (MS10)
G = 1 (DD10)
G = 1 (MS10)
G = 1 (DD10)
G = 1 (MS10)
G = 1 (DD10)
G = 1 (MS10)
G = 1 (DD10)
G=1
The
●
denotes the specifications which apply over the –40°C
≤
T
A
≤
85°C.
Difference Amplifier Configuration. V
REF
= V
CM
= 0V and unused gain pins are unconnected, unless otherwise noted.
V
SUPPLY
±15V
±15V
±15V
±15V
±15V
±15V
±5V
±5V
±2.5V
±2.5V
±15V
±15V
±2.5V, ±5V, ±15V
±2.5V, ±5V, ±15V
±15V
±5V
±2.5V
±15V
±15V
±15V
±5V
±2.5V
±15V
±15V
±5V
±2.5V
±15V
±15V
±15V
±5V
●
●
●
●
●
●
●
●
●
●
●
●
●
●
●
●
●
●
●
●
●
●
●
●
●
●
●
●
●
●
●
MIN
TYP
1.2
1.6
0.9
1.2
0.7
0.9
1.1
1.4
1.1
1.5
10
10
0.6
0.8
MAX
7.5
13
6
10
5.5
8.5
7.5
13
7.5
13
26
35
3.75
6.5
UNITS
mV
mV
mV
mV
mV
mV
mV
mV
mV
mV
µV/°C
µV/°C
mV
mV
V
V
V
dB
dB
dB
dB
dB
dB
V
V
V
V
mA
V/µs
V
OS
TC
V
OS_OA
Input Offset Voltage Drift
Referred to Input (Note 9)
Op Amp Input Offset Voltage
(Note 10)
Input Voltage Range
±15
±5
±1
62
68
72
61
57
74
±13
±12.5
±3.3
±1.1
±50
550
±15.5
±5.5
±1.5
77
83
86
72
66
86
±14
±13.5
±4
±2
±105
900
8.0
7.6
11.0
10.4
CMRR
Common Mode Rejection Ratio V
CM
=
±15V,
G = 1
Referred to Input
V
CM
=
±15V,
G = 2
V
CM
=
±15V,
G = 4
V
CM
=
±5V,
G = 1
V
CM
=
±1V,
G = 1
Power Supply Rejection Ratio
Output Voltage Swing
P1 = M1 = 0V, G = 1, V
S
=
±2.5V
to
±15V
R
L
= 1k
R
L
= 500Ω
R
L
= 500Ω
R
L
= 500Ω
G=1
G = –2, V
OUT
=
±12V,
P2 = 0V
Measured at V
OUT
=
±10V
G=1
PSRR
V
OUT
I
SC
SR
I
S
Short-Circuit Current
Slew Rate
Supply Current
mA
mA
Note 1:
Absolute Maximum Ratings are those values beyond which the life
of a device may be impaired.
Note 2:
The inputs are protected by diodes connected to V
S+
and V
S–
.
If an input goes beyond the supply range, the input current should be
limited to 10mA.
Note 3:
A heat sink may be required to keep the junction temperature
below absolute maximum.
Note 4:
The LT1995C and LT1995I are guaranteed functional over the
operating temperature range of –40°C to 85°C.
Note 5:
The LT1995C is guaranteed to meet specified performance from
0°C to 70°C. The LT1995C is designed, characterized and expected to
meet specified performance from –40°C to 85°C but is not tested or QA
sampled at these temperatures. The LT1995I is guaranteed to meet
specified performance from –40°C to 85°C.
Note 6:
Thermal resistance (θ
JA
) varies with the amount of PC board metal
connected to the leads. The specified values are for short traces connected
to the leads. If desired, the thermal resistance can be reduced slightly in
the MS package to about 130°C/W by connecting the used leads to a
larger metal area. A substantial reduction in thermal resistance down to
about 50°C/W can be achieved by connecting the Exposed Pad on the
bottom of the DD package to a large PC board metal area which is either
open-circuited or connected to V
S–
.
Note 7:
Input offset voltage is pulse tested and is exclusive of warm-up
drift. V
OS
and V
OS
TC refer to the input offset of the difference amplifier
configuration. The equivalent input offset of the internal op amp can be
calculated from V
OS_OA
= V
OS
• G/(G +1).
Note 8:
Full Power bandwidth is calculated from the slew rate measure-
ment: FPBW = SR/2πV
P
.
Note 9:
This parameter is not 100% tested.
Note 10:
The input offset of the internal op amp is calculated from the
input offset voltage: V
OS_OA
= V
OS
• G/(G +1).
1995fb
5
FPGA/CPLD
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