NCP161
450 mA, Ultra-Low Noise
and High PSRR LDO
Regulator for RF and
Analog Circuits
The NCP161 is a linear regulator capable of supplying 450 mA
output current. Designed to meet the requirements of RF and analog
circuits, the NCP161 device provides low noise, high PSRR, low
quiescent current, and very good load/line transients. The device is
designed to work with a 1
mF
input and a 1
mF
output ceramic capacitor.
It is available in two thickness ultra−small 0.35P, 0.65 mm x 0.65 mm
Chip Scale Package (CSP) and XDFN−4 0.65P, 1 mm x 1 mm.
Features
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MARKING
DIAGRAMS
WLCSP4
CASE 567JZ
X
A1
•
•
•
•
•
•
•
•
•
•
Operating Input Voltage Range: 1.9 V to 5.5 V
Available in Fixed Voltage Option: 1.8 V to 5.14 V
±2%
Accuracy Over Load/Temperature
Ultra Low Quiescent Current Typ. 18
mA
Standby Current: Typ. 0.1
mA
Very Low Dropout: 150 mV at 450 mA
Ultra High PSRR: Typ. 98 dB at 20 mA, f = 1 kHz
Ultra Low Noise: 10
mV
RMS
Stable with a 1
mF
Small Case Size Ceramic Capacitors
Available in −WLCSP4 0.65 mm x 0.65 mm x 0.4 mm
−WLCSP4 0.65 mm x 0.65 mm x 0.33 mm
−XDFN4 1 mm x 1 mm x 0.4 mm
−SOT23−5 2.9 mm x 2.8 mm x 1.2 mm
•
These Devices are Pb−Free, Halogen Free/BFR Free and are RoHS
Compliant
Typical Applications
WLCSP4
CASE 567KA
X
A1
1
XDFN4
CASE 711AJ
XX M
1
XXX M
1
SOT23−5
CASE 527AH
X, XX, XXX = Specific Device Code
M
= Date Code
PIN CONNECTIONS
(Top Views)
IN
GND
EN
V
OUT
IN
NCP161
OUT
•
•
•
•
Battery−powered Equipment
Wireless LAN Devices
Smartphones, Tablets
Cameras, DVRs, STB and Camcorders
IN
A1
B1
EN
1
2
3
5
OUT
4
NC
V
IN
OUT
A2
IN
4
EPAD
EN
3
C
IN
1
mF
Ceramic
EN
ON
OFF
GND
C
OUT
1
mF
Ceramic
B2
1
GND
OUT
2
GND
Figure 1. Typical Application Schematics
ORDERING INFORMATION
See detailed ordering and shipping information on page 16 of
this data sheet.
©
Semiconductor Components Industries, LLC, 2017
1
May, 2018 − Rev. 12
Publication Order Number:
NCP161/D
NCP161
IN
ENABLE
LOGIC
THERMAL
SHUTDOWN
EN
BANDGAP
REFERENCE
MOSFET
INTEGRATED
SOFT−START
DRIVER WITH
CURRENT LIMIT
OUT
* ACTIVE DISCHARGE
Version A only
EN
GND
Figure 2. Simplified Schematic Block Diagram
PIN FUNCTION DESCRIPTION
Pin No.
CSP4
A1
A2
B1
B2
−
Pin No.
SOT23−5
1
5
3
2
−
Pin No.
XDFN4
4
1
3
2
EPAD
Pin
Name
IN
OUT
EN
GND
EPAD
Input voltage supply pin
Regulated output voltage. The output should be bypassed with small 1
mF
ceramic capacitor.
Chip enable: Applying V
EN
< 0.4 V disables the regulator, Pulling V
EN
> 1.2 V enables the LDO.
Common ground connection
Expose pad should be tied to ground plane for better power dissipation
Description
ABSOLUTE MAXIMUM RATINGS
Rating
Input Voltage (Note 1)
Output Voltage
Chip Enable Input
Output Short Circuit Duration
Maximum Junction Temperature
Storage Temperature
ESD Capability, Human Body Model (Note 2)
ESD Capability, Machine Model (Note 2)
Symbol
V
IN
V
OUT
V
CE
t
SC
T
J
T
STG
ESD
HBM
ESD
MM
Value
−0.3 V to 6
−0.3 to V
IN
+ 0.3, max. 6
−0.3 to 6
unlimited
150
−55 to 150
2000
200
Unit
V
V
V
s
°C
°C
V
V
Stresses exceeding those listed in the Maximum Ratings table may damage the device. If any of these limits are exceeded, device functionality
should not be assumed, damage may occur and reliability may be affected.
1. Refer to ELECTRICAL CHARACTERISTIS and APPLICATION INFORMATION for Safe Operating Area.
2. This device series incorporates ESD protection and is tested by the following methods:
ESD Human Body Model tested per EIA/JESD22−A114
ESD Machine Model tested per EIA/JESD22−A115
Latchup Current Maximum Rating tested per JEDEC standard: JESD78.
THERMAL CHARACTERISTICS
Rating
Thermal Characteristics, CSP4 (Note 3)
Thermal Characteristics, XDFN4 (Note 3)
Thermal Characteristics, SOT23−5 (Note 3)
Thermal Resistance, Junction−to−Air
Thermal Resistance, Junction−to−Air
Thermal Resistance, Junction−to−Air
R
qJA
Symbol
Value
108
198.1
218
°C/W
Unit
3. Measured according to JEDEC board specification. Detailed description of the board can be found in JESD51−7
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2
NCP161
ELECTRICAL CHARACTERISTICS
−40°C
≤
T
J
≤
125°C; V
IN
= V
OUT(NOM)
+ 1 V; I
OUT
= 1 mA, C
IN
= C
OUT
= 1
mF,
unless otherwise
noted. V
EN
= 1.2 V. Typical values are at T
J
= +25°C (Note 4).
Parameter
Operating Input Voltage
Output Voltage Accuracy
V
IN
= V
OUT(NOM)
+ 1 V
0 mA
≤
I
OUT
≤
450 mA
V
IN
= V
OUT(NOM)
+ 1 V
Line Regulation
Load Regulation
Dropout Voltage (Note 5)
I
OUT
= 1 mA to 450 mA
WLCSP4, XDFN4
I
OUT
= 450 mA
WLCSP4, XDFN4
WLCSP4, XDFN4
V
OUT
SOT23−5
Line
Reg
Load
Reg
WLCSP4, XDFN4
SOT23−5
V
OUT(NOM)
= 1.8 V
V
OUT(NOM)
= 2.5 V
V
OUT(NOM)
= 2.8 V
V
OUT(NOM)
= 2.85 V
V
OUT(NOM)
= 3.0 V
V
OUT(NOM)
= 3.3 V
V
OUT(NOM)
= 3.5 V
V
OUT(NOM)
= 4.5 V
V
OUT(NOM)
= 5.0 V
V
OUT(NOM)
= 5.14 V
Dropout Voltage (Note 5)
I
OUT
= 450 mA
SOT23−5
V
OUT(NOM)
= 1.8 V
V
OUT(NOM)
= 2.8 V
V
OUT(NOM)
= 3.0 V
V
OUT(NOM)
= 3.3 V
Output Current Limit
Short Circuit Current
Quiescent Current
Shutdown Current
EN Pin Threshold Voltage
EN Pull Down Current
Turn−On Time
Power Supply Rejection Ratio
V
OUT
= 90% V
OUT(NOM)
V
OUT
= 0 V
I
OUT
= 0 mA
V
EN
≤
0.4 V, V
IN
= 4.8 V
EN Input Voltage “H”
EN Input Voltage “L”
V
EN
= 4.8 V
C
OUT
= 1
mF,
From assertion of V
EN
to
V
OUT
= 95% V
OUT(NOM)
I
OUT
= 20 mA
f = 100 Hz
f = 1 kHz
f = 10 kHz
f = 100 kHz
I
OUT
= 1 mA
I
OUT
= 250 mA
PSRR
I
CL
I
SC
I
Q
I
DIS
V
ENH
V
ENL
I
EN
0.2
120
91
98
82
48
14
10
160
140
280
−1
Tran
LINE
+1
−40
Tran
LOAD
+40
mV
mV
1.2
0.4
0.5
450
V
DO
V
DO
Test Conditions
Symbol
V
IN
Min
1.9
−2
−2
0.02
0.001
0.005
300
190
175
170
165
160
150
120
105
105
365
260
240
225
700
690
18
0.01
23
1
0.008
450
315
290
290
275
260
255
210
190
185
480
345
330
305
mA
mA
mA
V
mA
ms
mV
mV
Typ
Max
5.5
+2
+2
%/V
%/mA
Unit
V
%
V
OUT(NOM)
+ 1 V
≤
V
IN
≤
5.5 V
dB
Output Voltage Noise
Thermal Shutdown Threshold
f = 10 Hz to 100 kHz
V
N
T
SDH
T
SDL
R
DIS
mV
RMS
°C
°C
W
Temperature rising
Temperature falling
V
EN
< 0.4 V, Version A only
V
IN
= (V
OUT(NOM)
+ 1 V) to (V
OUT(NOM)
+ 1.6 V)
in 30
ms,
I
OUT
= 1 mA
V
IN
= (V
OUT(NOM)
+ 1.6 V) to (V
OUT(NOM)
+ 1 V)
in 30
ms,
I
OUT
= 1 mA
Active output discharge resistance
Line transient (Note 6)
Load transient (Note 6)
I
OUT
= 1 mA to 450 mA in 10
ms
I
OUT
= 450 mA to 1mA in 10
ms
Product parametric performance is indicated in the Electrical Characteristics for the listed test conditions, unless otherwise noted. Product
performance may not be indicated by the Electrical Characteristics if operated under different conditions.
4. Performance guaranteed over the indicated operating temperature range by design and/or characterization. Production tested at T
A
= 25°C.
Low duty cycle pulse techniques are used during the testing to maintain the junction temperature as close to ambient as possible.
5. Dropout voltage is characterized when V
OUT
falls 100 mV below V
OUT(NOM)
.
6. Guaranteed by design.
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3
NCP161
TYPICAL CHARACTERISTICS
1.820
V
OUT
, OUTPUT VOLTAGE (V)
V
OUT
, OUTPUT VOLTAGE (V)
1.815
1.810
1.805
I
OUT
= 450 mA
1.800
1.795
V
IN
= 2.8 V
V
OUT
= 1.8 V
C
IN
= 1
mF
C
OUT
= 1
mF
0
20
40
60
80
100
120
140
I
OUT
= 10 mA
2.520
2.515
2.510
2.505
2.500
2.495
2.490
2.485
2.480
−40 −20
0
20
40
60
80
V
IN
= 3.5 V
V
OUT
= 2.5 V
C
IN
= 1
mF
C
OUT
= 1
mF
100
120 140
I
OUT
= 450 mA
I
OUT
= 10 mA
1.790
1.785
1.780
−40 −20
T
J
, JUNCTION TEMPERATURE (°C)
T
J
, JUNCTION TEMPERATURE (°C)
Figure 3. Output Voltage vs. Temperature −
V
OUT
= 1.8 V − XDFN Package
3.33
V
OUT
, OUTPUT VOLTAGE (V)
V
OUT
, OUTPUT VOLTAGE (V)
3.32
3.31
3.30
3.29
3.28
3.27
3.26
3.25
−40 −20
0
20
40
60
80
I
OUT
= 450 mA
V
IN
= 4.3 V
V
OUT
= 3.3 V
C
IN
= 1
mF
C
OUT
= 1
mF
100
120
140
I
OUT
= 10 mA
3.35
3.34
3.33
3.32
3.31
3.30
3.29
3.28
Figure 4. Output Voltage vs. Temperature −
V
OUT
= 2.5 V − XDFN Package
I
OUT
= 10 mA and 450 mA
V
IN
= 4.3 V
V
OUT
= 3.3 V
C
IN
= 1
mF
C
OUT
= 1
mF
0
20
40
60
80
100
120 140
3.27
−40 −20
T
J
, JUNCTION TEMPERATURE (°C)
T
J
, JUNCTION TEMPERATURE (°C)
Figure 5. Output Voltage vs. Temperature −
V
OUT
= 3.3 V − XDFN Package
5.19
REG
LINE
, LINE REGULATION (%/V)
V
OUT
, OUTPUT VOLTAGE (V)
5.18
5.17
I
OUT
= 10 mA
5.16
5.15
I
OUT
= 450 mA
5.14
5.13
5.12
5.11
−40 −20
0
20
40
60
80
V
IN
= 5.5 V
V
OUT
= 5.14 V
C
IN
= 1
mF
C
OUT
= 1
mF
100
120
140
0.010
0.009
0.008
0.007
0.006
0.005
0.004
0.003
0.002
Figure 6. Output Voltage vs. Temperature −
V
OUT
= 3.3 V − CSP Package
0.001
0
−40 −20
V
IN
= 2.8 V
V
OUT
= 1.8 V
C
IN
= 1
mF
C
OUT
= 1
mF
0
20
40
60
80
100
120 140
T
J
, JUNCTION TEMPERATURE (°C)
T
J
, JUNCTION TEMPERATURE (°C)
Figure 7. Output Voltage vs. Temperature −
V
OUT
= 5.14 V − XDFN Package
Figure 8. Line Regulation vs. Temperature −
V
OUT
= 1.8 V
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NCP161
TYPICAL CHARACTERISTICS
0.010
REG
LINE
, LINE REGULATION (%/V)
0.009
0.008
0.007
0.006
0.005
0.004
0.003
0.002
0.001
0
−40 −20
V
IN
= 4.3 V
V
OUT
= 3.3 V
C
IN
= 1
mF
C
OUT
= 1
mF
REG
LINE
, LINE REGULATION (%/V)
0.020
0.018
0.016
0.014
0.012
0.010
0.008
0.006
0.004
0.002
0
−40 −20
V
IN
= 5.5 V
V
OUT
= 5.14 V
C
IN
= 1
mF
C
OUT
= 1
mF
0
20
40
60
80
100
120
140
0
20
40
60
80
100
120 140
T
J
, JUNCTION TEMPERATURE (°C)
T
J
, JUNCTION TEMPERATURE (°C)
Figure 9. Line Regulation vs. Temperature −
V
OUT
= 3.3 V
REG
LOAD
, LOAD REGULATION (%/mA)
REG
LOAD
, LOAD REGULATION (%/mA)
0.0020
0.0018
0.0016
0.0014
0.0012
0.0010
0.0008
0.0006
0.0004
0.0002
0
−40 −20
0
20
40
V
IN
= 2.8 V, V
OUT
= 1.8 V
C
IN
= 1
mF,
C
OUT
= 1
mF
I
OUT
= 1 mA to 450 mA
60
80
100
120
0.0020
0.0018
0.0016
0.0014
0.0012
0.0010
0.0008
0.0006
0.0004
Figure 10. Line Regulation vs. Temperature −
V
OUT
= 5.14 V
0.0002
0
140
−40 −20
V
IN
= 4.3 V, V
OUT
= 3.3 V
C
IN
= 1
mF,
C
OUT
= 1
mF
I
OUT
= 1 mA to 450 mA
0
20
40
60
80
100
120 140
T
J
, JUNCTION TEMPERATURE (°C)
T
J
, JUNCTION TEMPERATURE (°C)
Figure 11. Load Regulation vs. Temperature −
V
OUT
= 1.8 V (WLCSP4)
REG
LOAD
, LOAD REGULATION (%/mA)
REG
LOAD
, LOAD REGULATION (mV)
0.0020
0.0018
0.0016
V
IN
= 5.5 V, C
OUT
= 1
mF
V
OUT
= 5.14 V, C
IN
= 1
mF
I
OUT
= 1 mA to 450 mA
70
Figure 12. Load Regulation vs. Temperature −
V
OUT
= 3.3 V (WLCSP4)
I
OUT
= 1 mA to 450 mA
60 C
IN
= 1
mF
50
40
30
20
10
0
−40 −20
0
20
40
60
XDFN4 Package
SOT23−5 Package
0.0014
0.0012
0.0010
0.0008
0.0006
0.0004
0.0002
0
−40 −20
WLCSP4 Package
80
100
120 140
0
20
40
60
80
100
120
140
T
J
, JUNCTION TEMPERATURE (°C)
T
J
, JUNCTION TEMPERATURE (°C)
Figure 13. Load Regulation vs. Temperature −
V
OUT
= 5.14 V (WLCSP4)
Figure 14. Load Regulation vs. Temperature
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