DEMO MANUAL DC2093A
LT4275/LT4321
LTPoE++/IEEE 802.3at/
IEEE 802.3af Compliant
Powered Device Interface
Many of the main features from the previous generation
PD controller are included in the LT4275 PD controller.
These include a power good indicator, a power sourcing
equipment (PSE) type indicator, and support for an auxil-
iary power input. The major difference from the previous
generation PD controller is that the LT4275 drives an
external N-channel Hot Swap™ FET at the PoE high side
voltage rail. This allows the user to choose a low R
DS(ON)
N-channel MOSFET to maximize power efficiency, reduce
heat dissipation, and ease thermal design. An LED status
indicator is included to indicate that the Hot Swap FET is
fully turned on and the PSE is powering the PD. A suf-
ficient load to sink more than 10mA is also included to
assure the PSE maintains power to the PD and to meet
the DC maintain power signature current required by the
IEEE 802.3at/IEEE 802.3af specification.
Simply connect the output of the DC2093A to the DC/DC
converter that is right for the application. Linear Technology
offers a variety of DC/DC converter solutions that can be
used with the DC2093A (eg DC894, DC1317, etc).
Design files for this circuit board are available at
http://www.linear.com/demo
L,
LT, LTC, LTM, Linear Technology and the Linear logo are registered trademarks and
LTPoE++ and Hot Swap are trademarks of Linear Technology Corporation. All other trademarks
are the property of their respective owners.
Description
Demonstration circuit 2093A features the
LT
®
4275,
a
fourth generation powered device (PD) controller and the
LT4321, an ideal diode bridge controller for Power over
Ethernet (PoE) applications.
The DC2093A is available in DC2093A-A, DC2093A-B, and
DC2093A-C versions to meet the power level required by
the PD application. The DC2093A-A features the LT4275A
PD controller. This controller supports the IEEE 802.3at
(Type 2, PoE+), IEEE 802.3af (Type 1, PoE) and LTPoE++™
specifications. LTPoE++ adds four power levels to the
existing IEEE standard with 38.7W, 52.7W, 70W, and 90W
of delivered PD power at the RJ45 jack. The DC2093A-B
features the LT4275B PD controller and is compliant with
the IEEE 802.3at and IEEE 802.3af specifications. The
DC2093A-C features the LT4275C PD controller and is
compliant with the IEEE 802.3af specification.
All three assemblies of the DC2093A include a PoE ideal
diode bridge controller, LT4321, and eight N-channel FETs
to reduce heat, maximize power efficiency, and increase
delivered power compared to a conventional diode bridge
rectifier. This controller is designed to be used in PoE ap-
plications without corrupting the PD’s signature resistance
during detection and prevent reverse current during a short
at the Ethernet cable.
Table 1. Summary of Features Supported by the DC2093A Assemblies
ASSEMBLY
DC2093A-A
PoE STANDARD
LTPoE++
PoE+
PoE
PoE+
PoE
PoE
MAXIMUM POWER
LEVEL
90W
POWER GOOD
INDICATOR (PWRGD)
Yes
PSE TYPE INDICATOR
(T2P)
Yes
AUXILIARY SUPPLY
SUPPORT
No
DC2093A-B
DC2093A-C
25.5W
13W
Yes
Yes
Yes
No
Yes
Yes
dc2093af
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DEMO MANUAL DC2093A
performance summary
Table 2. DC2093A Performance Summary
PARAMETER
PD Input Voltage After Start-Up (V
PORT
)
CONDITION
At the PD Ethernet Port
LTPoE++ 38.7W
LTPoE++ 52.7W
LTPoE++ 70W
LTPoE++ 90W
IEEE 802.3at (Type 2, 25.5W)
IEEE 802.3af (Type 1, 13W)
Efficiency
DC2093A-A, V
PORT
= 48V, I
LOAD
= 1.1A
DC2093A-B, V
PORT
= 48V, I
LOAD
= 600mA
PoE Type Switching Frequency
DC2093A-C, V
PORT
= 48V, I
LOAD
= 350mA
An LTPoE++ PSE is Powering a DC2093A-A
VALUE
49.8V to 57V
47.8V to 57V
45.1V to 57V
41.0V to 57V
42.5V to 57V
37V to 57V
99.2% (Typical)
98.9% (Typical)
98.5% (Typical)
840Hz
theory of operation
When an LTPoE++ PSE is connected to the DC2093A demo
board RJ45 connector, J1, via a CAT5e or CAT6 Ethernet
cable, the PSE initiates the detection process. During this
process, the PoE ideal diode bridge controller is inac-
tive and the body diodes of the PoE ideal diode bridge
MOSFETs form a silicon diode bridge. The PD solution
presents a 25k resistive load to the PSE. After the PD
has passed the detection process, the PSE uses an IEEE
802.3at/IEEE 802.3af or LTPoE++ classification method
to determine the power level the PSE can deliver to the
PD. The PSE turns on the port and provides power to the
PD if the classification is successful. Once the LT4275
detects the PSE has turned on the port, it drives an external
N-channel MOSFET to ramp up the output voltage. After a
successful PD controller output turn on, the LT4275 drives
a power good indicator (PWRGD) and a PSE type indicator
(T2P) (DC2093A-A and DC2093A-B only). The PWRGD
indicator signals the load to start drawing current and the
LT4321 to turn on the appropriate PoE ideal diode bridge
MOSFETs with low R
DS(ON)
in the high current path. This
reduces heat dissipation and increases delivered power
compared to the conventional diode bridge. The
T2P
in-
dicator signals the load the type of PSE powering the PD.
Classification Signaling
The resistors at R
CLS
and R
CLS++
determine the clas-
sification signature and sequence. The DC2093A-A in-
cludes user-selectable jumpers to support IEEE 802.3af,
IEEE 802.3at, and LTPoE++ power levels from 3.84W to
90W. Refer to Table 3 for the power levels. If an LTPoE++
power level is selected, an IEEE 802.3af or IEEE 802.3at
compliant PSE will classify this PD as a Class 4 PD. The
DC2093A-B includes a preselected R
CLS
resistor to support
IEEE 802.3at 2-event classification and this board does not
contain jumper blocks. The DC2093A-C includes multiple
jumpers to support all IEEE 802.3af power levels. Table 3
shows each shunt position and its associated class number
and power level for the DC2093A-A and -C boards. Use
Table 3 as a selection guide to choose a suitable power
level for the load.
Table 3. DC2093A-A and DC2093A-C Shunt Positions for PoE
Power Levels
ASSEMBLY
DC2093A-A & -C
DC2093A-A & -C
DC2093A-A & -C
DC2093A-A & -C
DC2093A-A
DC2093A-A
DC2093A-A
DC2093A-A
PoE POWER LEVEL AT
CLASS
THE PD INPUT
0
1
2
3
4
4*
4*
4*
13W
3.84W
6.49W
13W
25.5W
38.7W
52.7W
70W
RCLASS JUMPERS
JP1
JP3
JP5
JP7
JP9
JP11
JP13
JP15
JP2
JP4
JP6
JP8
JP10
JP12
JP14
JP16
DC2093A-A
4*
90W
JP17
JP18
*An LTPoE++ PD will be classified as Class 4 by an IEEE 802.3at/af
compliant PSE.
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DEMO MANUAL DC2093A
theory of operation
Power Good Indicator and Power Supply Start-Up
The LT4275 limits the inrush current to the output bulk
capacitor by controlling the output voltage slew rate
during turn-on. The slew rate is preprogrammed via a
resistor and a capacitor at the LT4275 HSGATE pin on the
DC2093A to limit the inrush current to the bulk capacitor
on board. If more capacitance is desired at the output,
refer to Inrush and Powered On section in the LT4275
data sheet to recalculate the inrush current and ensure it
is below the IEEE requirement of approximately 100mA.
The inrush current limit will cause startup problems if an
attached load draws more than 100mA of current during
inrush. Therefore, it is strongly recommended to use the
PWRGD indicator on the DC2093A to interface to a load
such as a DC/DC converter as shown in Figures 1, 2 and 4.
PSE Type Indicator
Refer to Table 4 for the summary of
T2P
indicator signals
supported by the DC2093A assembly. The
T2P
signal is
valid after PWRGD is active. This indicator is not connected
on the DC2093A-C.
Table 4. Summary of
T2P
Signals Supported by the DC2093A
Assemblies
ASSEMBLY
DC2093A-A
PSE TYPE
LTPoE++
IEEE 802.3at (Type 2, PoE+)
IEEE 802.3af (Type 1, PoE)
DC2093A-B
LTPoE++
IEEE 802.3at (Type 2, PoE+)
IEEE 802.3af (Type 1, PoE)
DC2093A-C
Any PSE
T2P
SIGNAL
840Hz, 50% Duty Cycle
Logic Low
Logic High
Logic Low
Logic Low
Logic High
Not Supported
DC2093A-B
DC2093A-C
Auxiliary Supply Support
The DC2093A-B and DC2093A-C versions support an
auxiliary supply input. The auxiliary supply input has pri-
ority over the PoE input. When the PD controller detects
a valid voltage from the auxiliary supply input, it turns off
the N-channel MOSFET (Q2) to cut the power from the
PSE and lets the auxiliary supply take over powering the
load. The PSE may detect the disconnected PD and turn
off the port. The PWRGD indicator outputs a logic high
signal when an auxiliary supply is present. The
T2P
indi-
cator outputs a logic low signal on the DC2093A-B board
when an auxiliary supply is present. The auxiliary supply
input is an assembly option on the DC2093A-A board.
DC2093A Companion PSE Demo Boards
Linear Technology offers a variety of PSE solutions to
evaluate with DC2093A. Refer to Table 5 to select a PSE
demo board based on the DC2093A assembly and the
application power requirement.
Table 5. Selection of Companion PSE Demo Board depending
on the DC2093 Assembly and the PoE Power Level
DC2093
ASSEMBLY
DC2093A-A
PoE POWER
LEVEL
90W
70W
52.7W
38.7W
25.5W
13W
COMPANION PSE DEMO
BOARD
DC1814A-D
DC1814A-C
DC1814A-B
DC1814A-A
DC1567A
DC981A/B
**Contact Linear for multi-port PSE demo board options.
dc2093af
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DEMO MANUAL DC2093A
Dc2093a-a quick start proceDure
NOTE: Handle the DC2093A-A by the edge of the board.
Power over Ethernet Input
1. Refer to Figure 1 to evaluate the DC2093A-A with a DC/
DC converter. If a resistive or an active load is used
to evaluate the DC2093A-A, use the setup diagram as
shown in Figure 2.
2. Default class select shunt positions are at JP1 and JP2
on the DC2093A-A board. In this configuration, any
PSE with enough power will turn on this PD. Choose a
power level from Table 3 and select the corresponding
shunt positions.
3. Check the power delivery capability of the LTPoE++
PSE to ensure it can power the PD and the load. Do
not select a jumper position corresponding to a higher
power level than the LTPoE++ PSE can provide. Oth-
erwise, the LTPoE++ PSE will not turn on the PD after
classification.
4. Connect the output of the PSE to the RJ45 connector
(J1) on the DC2093A-A board with a CAT5e or CAT6
Ethernet cable.
5. After connection has been established, verify that the
LED (D3) is lit. This indicates the PSE has successfully
detected and powered the PD
Figure 1. Setup Diagram for the DC2093A-A with a DC-DC Converter, a Microprocessor, and an LTPoE++ PSE
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DEMO MANUAL DC2093A
Dc2093a-a quick start proceDure
Figure 2. Setup Diagram for DC2093A-A with a Resistive or an Active Load
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