Data Sheet PD60232
revC
IR22381QPBF/IR21381Q(PbF)
3-PHASE AC MOTOR CONTROLLER IC
Features
•
•
•
•
•
•
•
•
•
•
•
•
Floating channel up
to +600V or
+1200V
“soft” over-current shutdown turns off desaturated output
Integrated desaturation circuit
Active biasing on sensing desaturation input
Two stage turn on output for di/dt control
Integrated brake IGBT driver with protection
Voltage feedback sensing function
Separate pull-up/pull-down output drive pins
Matched delay outputs
Under voltage lockout with hysteresis band
Programmable deadtime
Hard shutdown function
Product Summary
V
OFFSET
(max)
I
O
+/-
(min.)
V
OUT
Brake (
I
O
+/-
min.)
Deadtime Asymmetry
Skew (max.)
Deadtime (typ. with
RDT=39KΩ)
DESAT Blanking time (typ.)
DESAT filter time (typ.)
Active bias on Desat input
pin
DSH, DSL input voltage
threshold (typ.)
Soft shutdown duration
time (typ.)
Voltage feedback matching
delay time (max.)
600V or
1200V
220mA / 460mA
12.5V-20V
40mA/80mA
125nsec
1µsec
4.5µsec
3.0µsec
90Ω
8.0V
6.0µsec
400nsec
Description
The IR22381Q
and IR21381Q
are high voltage, 3-phase IGBT
driver best suited for AC motor drive applications. Integrated
desaturation logic provides all mode of overcurrent protection,
including ground fault protection. The sensing desaturation input is
provided by active bias stage to reject noise. Soft shutdown is
predominantly initiated in the event of overcurrent followed by turn-
off of all six outputs. A shutdown input is provided for a customized
shutdown function. The DT pin allows external resistor to program
the deadtime. Output drivers have separate turn on/off pins with
two stage turn-on output to achieve the desired di/dt switching level
of IGBT. Voltage feedback provides accurate volt x second
measurement.
Package
64-Lead MQFP w/o 13 leads
Typical Connection
15V
3
VCC
3
To controller
IR22381QPBF
DC bus
VFH1,2,3
VFL1,2,3
DSB
VS1,2,3
DSL1,2,3
LOP1,2,3
LOQ1,2,3
LON1,2,3
COM
U
V
W
(Refer to Lead
Assignments for
correct pin
configuration. This
diagram shows
electrical
connections only)
BR
DT
VSS
1
To motor
LIN1,2,3
HIN1,2,3
FAULT
BRIN
SD
VB1,2,3
DSH1,2,3
HOP1,2,3
HOQ1,2,3
HON1,2,3
IR22381QPBF/IR21381Q(PbF)
Absolute Maximum Ratings
Absolute maximum ratings indicate sustained limits beyond which damage to the device may occur. All voltage
parameters are absolute voltages referenced to V
SS
, all currents are defined positive into any lead. The thermal
resistance and power dissipation ratings are measured under board mounted and still air conditions.
Symbol
V
S
V
B
V
HO
V
CC
COM
V
LO
V
IN
V
FLT
V
F
V
DSH
V
DSL
V
BR
dVs/dt
P
D
R
thJA
T
J
T
S
T
L
Definition
High side offset voltage
Min.
Max.
Units
V
B 1,2,3
- 25
V
B 1,2,3
+ 0.3
(IR22381)
-0.3
1225
High side floating supply voltage
(IR21381)
-0.3
625
High side floating output voltage (HOP, HON, HOQ)
V
S1,2,3
- 0.3
V
B 1,2,3
+ 0.3
Low side and logic fixed supply voltage
-0.3
25
Power ground
V
CC
- 25
V
CC
+ 0.3
Low side output voltage (LOP, LON, LOQ)
V
COM
-0.3
V
CC
+ 0.3
V
Logic input voltage (HIN/N, LIN, BRIN/N, SD)
-0.3
V
CC
+ 0.3 or V
SS
+15
Which ever is lower
FAULT/N output voltage
-0.3
V
CC
+ 0.3
Feedback output voltage
-0.3
V
CC
+ 0.3
High side desat/feedback input voltage
V
B 1,2,3
- 25
V
B 1,2,3
+ 0.3
Low side desat/feedback input voltage
V
CC
- 25
V
CC
+ 0.3
Brake output voltage
V
COM
-0.3
V
CC
+ 0.3
Allowable offset voltage slew rate
—
50
V/ns
Package power dissipation @ TA
≤
+25°C
—
2.0
W
Thermal resistance, junction to ambient
—
60
°C/W
Junction temperature
—
125
Storage temperature
°C
-55
150
Lead temperature (soldering, 10 seconds)
—
300
Recommended Operating Conditions
For proper operation the device should be used within the recommended conditions. All voltage parameters are
absolute voltages referenced to V
SS
. The V
S
offset rating is tested with all supplies biased at 15V differential.
Symbol
V
B 1,2,3
V
S1,2,3
V
HO 1,2,3
V
LO1,2,3
V
IN
V
CC
COM
V
FLT
V
F
V
DSH
V
DSL
V
BR
T
A
Definition
High side floating supply voltage (Note 1)
High side floating supply offset voltage
High side (HOP/HOQ/HON) output voltage
Low side (LOP/LOQ/LON) output voltage
Logic input voltage (HIN/N, LIN, BRIN/N SD)
Low side supply voltage (Note 1)
Power ground
FAULT/N output voltage
Feedback output voltage
High side desat/feedback input voltage
Low side desat/feedback input voltage
BR output voltage
Ambient temperature
Min.
V
S1,2,3
+12.5
(IR21381) Note 2
(IR22381) Note 2
V
S1,2,3
V
COM
0
12.5
-5
0
0
V
B 1,2,
3
- 20
V
CC
- 20
V
COM
-40
Max.
V
S1,2,3
+ 20
600
1200
V
S1,2,3
+ V
B
V
CC
V
SS
+ 5
20
+5
V
CC
V
CC
V
B 1,2,3
V
CC
V
CC
115
Units
V
°C
Note 1:
While internal circuitry is operational below the indicated supply voltages, the UV lockout disables the output drivers if the UV
thresholds are not reached.
Note 2:
Logic operational for V
S
from V
SS
-5V to V
SS
+600V (IR21381) or 1200V (IR22381). Logic state held for V
S
from V
SS
-5V to V
SS
-
V
BS
. (Please refer to the Design Tip DT97-3 for more details).
2
IR22381QPBF/IR21381Q(PbF)
Static Electrical Characteristics
V
BIAS
(V
CC,
V
BS1,2,3
) = 15V and T
A
= 25 °C unless otherwise specified.
I/O diagrams don’t show ESD protection circuits.
Pin: V
CC
, V
SS
, V
B
, V
S
Symbol
V
CCUV+
V
CCUV-
V
CCUVH
V
BSUV+
V
BSUV-
V
BSUVH
I
LK
I
QBS
I
QCC
Definition
V
cc1
supply undervoltage positive going threshold
V
cc1
supply undervoltage negative going threshold
V
cc1
supply undervoltage lockout hysteresis
V
BS
supply undervoltage positive going threshold
V
BS
supply undervoltage negative going threshold
V
BS
supply undervoltage lockout hysteresis
(IR21381Q)
Offset supply leakage current
(IR22381Q)
Quiescent V
BS
supply current
Quiescent Vcc supply current
Min Typ Max Units
10.3
9.5
-
10.3
9.5
-
-
-
-
-
11.2
10.2
1.0
11.2
10.2
1.0
-
-
150
3
12.5
11.3
-
11.9
10.9
-
50
50
300
6
Test
Conditions
V
V
B1,2,3
=V
S1,2,3
=
600V
V
B1,2,3
=V
S1,2,3
=
µA
1200V
V
LIN
=0V,V
HIN
=5V,
DSH
1,2,3
= V
S1,2,3
mA V
LIN
=0V,V
HIN
=5V
DT=1
µsec
Comparator
V
CC
/V
B
UV
V
CCUV
/V
BSUV
V
SS
/V
S
Figure 1:
Undervoltage diagram
Pin: HIN/N, LIN, BRIN/N, SD
The V
IN
, V
TH
and I
IN
parameters are referenced to V
SS
and are applicable to all six channels (HOP/HOQ/ HON
1,2,3
and LOP/LOQ/LON
1,2,3
).
Symbol
V
IH
V
IL
V
t+
V
t-
∆V
T
I
IN+
I
IN-
Definition
Logic "0" input voltage
(HIN/N, LIN, BRIN/N, SD)(OUT=LO)
Logic "1" input voltage
(HIN/N, LIN, BRIN/N, SD)(OUT=HI)
Logic input positive going threshold
(HIN/N, LIN, BRIN/N, SD)
Logic input negative going threshold
(HIN/N, LIN, BRIN/N, SD)
Logic input hysteresis(HIN/N, LIN, BRIN/N, SD)
Logic "1" input bias current (HIN/N, BRIN/N)
Logic "1" input bias current (LIN, SD)
Logic "0" input bias current (HIN/N, BRIN/N)
Logic "0" input bias current (LIN, SD)
Min Typ Max Units
2.0
-
1.2
0.8
-
-2
-
-
-2
-
-
1.6
1.2
0.4
-
85
85
-
-
0.8
2.0
1.6
-
0
140
140
0
µA
V
Test
Conditions
V
CC
= 12.5V to
20V
V
IN
= 0V
V
IN
= 5V
V
IN
= 5V
V
IN
= 0V
3
IR22381QPBF/IR21381Q(PbF)
Figure 2:
HIN/N, LIN and BRIN/N diagram
Pin: FAULT/N, VFH, VFL
V
OLVF
is referenced to V
ss
Symbol
Definition
V
OLVF
VFH or VFL low level output voltage
R
ON,VF
R
ON,FLT
VFH or VFL output on resistance
FAULT/N low on resistance
Min Typ Max Units Test Conditions
-
-
0.8
V
I
VF
= 10mA
-
-
60
60
-
-
Ω
______
FAULT /
VFL/VFH
R
ON
Internal signal
V
SS
Figure 3:
FAULT/N, VFH, VFL diagram
Pin: DSL, DSH, DSB
V
DESAT
and I
DESAT
parameters are referenced to COM and V
S1,2,3
Symbol
Definition
V
DESAT+
High DSH
1,2,3
and DSL
1,2,3
and DSB
input threshold voltage
V
DESAT-
Low DSH
1,2,3
and DSL
1,2,3
or DSB
input threshold voltage
DS input voltage hysteresis
V
DSTH
High DSH, DSL, DSB input bias current
I
DS+
Low DSH, DSL input bias current
I
DS-
Low DSB input bias current
I
DSBR-
I
DSB
DSH or DSL input bias current
Min Typ Max Units Test Conditions
-
8.0
-
-
-
-
-
-
-
7.0
1.0
15
-150
-250
-11.1
-
-
-
-
-
-
V
µA
mA
V
DESAT
= 15V
V
DESAT
= 0V
V
DESAT
= 0V
V
DESAT
=
(V
CC
or V
BS
) – 1V
Figure 4:
DSH, DSL and DSB diagram
4
IR22381QPBF/IR21381Q(PbF)
Pin: HOP, LOP, HOQ, LOQ
The V
O
and I
O
parameters are referenced to COM and VS
1,2,3
and are applicable to the respective output leads:
HO
1,2,3
and LO
1,2,3
.
Symbol
Definition
Min Typ Max Units Test Conditions
V
OH
High level output voltage, V
BIAS
– V
O
(normal
-
-
2
V
I
O
= -20mA
switching). HOP=HOQ, LOP=LOQ.
I
O1+
Output high first stage short circuit pulsed current.
HOP=HOQ, LOP=LOQ
200
350
-
mA
V
O
=0V, V
IN
=1
(Note 1) PW≤t
on1
Figure 16
V
O
=0V, V
IN
=1
(Note 1)
PW≤10µs
I
O2+
Output high second stage short circuit pulsed current. 100
HOP=HOQ, LOP=LOQ
HINx/N = 0V, for LOx
LIN = 5V
200
-
Note 1:
for HOx
Figure 5:
HOP/HOQ and LOP/LOQ diagram
Pin: HON, LON, SSDH, SSDL
The V
O
and I
O
parameters are referenced to COM and VS
1,2,3
and are applicable to the respective output leads:
HO
1,2,3
and LO
1,2,3
.
Symbol
V
OL
R
ON,SS
I
O-
Definition
Low level output voltage, V
O
(normal switching)
HON, LON
Soft shutdown on resistance (see Note 2)
Output low short circuit pulsed current
Min Typ Max Units Test Conditions
-
-
2
V
I
O
= 20mA
-
500
250
540
-
-
Ω
mA
PW
≤
t
SS
V
O
=15V, V
IN
=0
(Note 3)
PW≤10µs
Note 2:
SSD operation only
Note 3:
for HOx
HINx/N = 5V, for LOx
LIN = 0V
Figure 6:
HON, LON diagram
5
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