SG923-0003
SDIO/SPI Embedded Software Eval Kit
The SG923-0003 SDIO/SPI Embedded Software Eval Kit is a software integration evaluation kit for the
SAGRAD Wi-Fi SG901-1039 fully integrated 802.11b & g ultra-low power Wi-Fi radio module. The evaluation
kit includes all the hardware necessary for successful software integration. Processor and O/S specific
drivers may be available from SAGRAD. It is recommended that the user contact SAGRAD directly for
information regarding available Processor and O/S specific drivers.
The evaluation kit includes:
(1) SG901-1039 802.11 b & g fully FCC certified WiFi module
(1) SPI 3.3V to 1.8V Level translator interface board SG909-0034
(1) SDIO 3.3V to 1.8V Level translator interface board SG909-0032
(1) SDIO or SPI 1.8V interface board SG909-0033
(1) Antenna
(1) CD (see page 5 for contents of CD)
FEATURES
•
•
•
•
•
Fully integrated, IEEE WLAN and FCC compliant 802.11b&g module
Standard SDIO mechanical interface and pin out access for SPI wiring.
Power Save Mode low frequency clock oscillator on all evaluation boards
+15 dBm power @ antenna port
U.FL-R-SMT antenna connector
1-321-255-0515
WWW.SAGRAD.COM
DOC #: SG923-0010 rev. 3.3
SDIO EVALUATION
2
(Figure 2)
1
BOARD ASSEMBLY FOR SDIO EVALUATION
(Refer to figure 2)
ITEM #
1
2
DESCRIPTION
SDIO or SPI 1.8V INTERFACE BOARD
WIFI MODULE
ASSEMBLY INSTRUCTIONS (see figure 2):
1. Install WiFi module (2) in figure 2 to the Interface board (1)
2. Assembled boards will appear as in figure.
1-321-255-0515
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DOC #: SG923-0010 rev. 3.3
Instructions to connect the SDIO interface to the SG909-0032
(SDIO 3.3V)
evaluation board.
The SDIO interface follows the standard 3V SDIO Interface and is plug and play. There is no need to use
an external supply.
Instructions to connect the SDIO interface to the SG909-0033
(SDIO/SPI 1.8V)
evaluation board.
The SDIO interface follows the standard SDIO slide card mechanical interface with the exception that the
SDIO VDD (SDIO PIN 4) is required to be 1.8V. The 1.8V voltage establishes the SDIO bus voltage rail
applied to the WLAN module and the low frequency clock oscillator.
1. Connect a +3.0 to 3.6V (min. 200mA) supply to JP1 pin 1. This is required to power the WLAN
module Transmit Power Amplifier, voltage regulators, and TX controls.
2. Pins 7, 9, 10, 13, 15 and 16 of JP1 are ground returns for the external supply (all are tied together
in the evaluation board).
Instructions to connect the SPI interface to the SG909-0033
(SDIO/SPI 1.8V)
evaluation board
1. Connect a +3.0 to 3.6V (min 200mA) supply to JP1 pin 1. This is required to power the WLAN
module Transmit Power Amplifier and TX controls.
2. Connect a 1.8V supply to JP1 pin 2. This voltage establishes the bus voltage rail applied to the
WLAN module in the SPI interface as well as powers the low frequency crystal oscillator for
power save mode (SPI_SLEEPCLK)
3. Connect the SPI Clock to JP1 pin 3
4. Connect the SPI Master out, Slave in (MOSI) to JP1 pin 4
5. Connect the SPI Master in, Slave out (MISO) to JP1 pin 5
6. Connect the SPI Chip Select to JP1 pin 6
7. Connect the power up control to JP1 pin 8. This pin is normally pulled to approximately 2V upon
application of the 3V to 3.6V supply, powering the WLAN module on. It is used to power down the
WLAN when grounded.
8. Connect the SPI Interrupt Request (IRQ) to JP1 pin 11
9. Connect the 3.0 to 3.6V supply to JP1 pin 14. This pin selects the SPI mode of operation for all
Sagrad modules with the exception of the SG901-1030 Wi-Fi module where it becomes the
antenna diversity control.
10. Pins 7, 9, 10, 13, 15 and 16 are the ground returns for the SPI signals and external power supply
(all are tied together in the evaluation board).
1-321-255-0515
WWW.SAGRAD.COM
DOC #: SG923-0010 rev. 3.3
Instructions to connect the SPI interface to the SG909-0034
(SPI 3.3V)
evaluation board
1. Connect a +3.0 to 3.6V (min 200mA) supply to JP1 pin 2. This is required to power the WLAN
module Transmit Power Amplifier, voltage regulators, low frequency clock oscillator and TX
controls.
2. Connect the SPI Clock to JP1 pin 3
3. Connect the SPI Master out, Slave in (MOSI) to JP1 pin 4
4. Connect the SPI Master in, Slave out (MISO) to JP1 pin 5
5. Connect the SPI Chip Select to JP1 pin 6
6. Connect the power up control to JP1 pin 8. This pin is normally pulled to approximately 2V upon
application of the 3V to 3.6V supply, powering the WLAN module on. It is used to power down the
WLAN when grounded.
7. Connect the SPI Interrupt Request (IRQ) to JP1 pin 11
8. Connect the 3.0 to 3.6V supply to JP1 pin 14. This is optional. The WLAN Module has a pull up
resistor for enabling SPI operation. This pin selects the SPI/SDIO mode of operation for all
Sagrad modules with the exception of SG901-1030 Wi-Fi module where it becomes the antenna
diversity control.
9. Pins 7, 9, 10, 13, 15 and 16 are the ground returns for SPI signals and the external power supply.
(All tied together in the evaluation board)
10. JP1 pin 1 is “no connect”
1-321-255-0515
WWW.SAGRAD.COM
DOC #: SG923-0010 rev. 3.3
SOFTWARE
CD Contents:
1.
2.
3.
4.
5.
6.
Readme file
Data sheets for modules and Evaluation kits
SG903-0003 – Embedded Software EVK
a. Hardware Schematics & BOM
b. Software Documentation
SG923-0002 – Performance EVK
a. Driver Software
b. Hardware Files
STLC4560
a. Datasheets
b. ST Micro Application Notes
Application Notes
SUPPORT
Phone: 321-255-0515 ext 150 or dial support at main prompt.
Email:
wifisupport@sagrad.com
Mail: Sagrad, Inc Support
751 North Drive, Suite 10
Melbourne, Florida 32934
1-321-255-0515
WWW.SAGRAD.COM
DOC #: SG923-0010 rev. 3.3
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