(Note 2).................................................. –40°C to 125°C
Storage Temperature Range................... –65°C to 150°C
PIN CONFIGURATION
TOP VIEW
MODE/SYNC
RUN/SHDN
BOOST
TG
TOP VIEW
MODE/SYNC
RUN/SHDN
I
LIMT
I
LIMB
FB
COMP
SS
FREQ
1
2
3
4
5
6
7
8
16
15
14
13
12
11
10
9
BOOST
TG
SW
V
IN
SENSE
INTV
CC
BG
SGND
16 15 14 13
I
LIMT
1
I
LIMB
2
FB 3
COMP 4
5
SS
6
FREQ
7
SGND
8
BG
17
PGND
12 SW
11 V
IN
10 SENSE
9 INTV
CC
17
PGND
MSE PACKAGE
16-LEAD PLASTIC MSOP
T
JMAX
= 125°C,
θ
JA
= 40°C/W (NOTE 3)
EXPOSED PAD (PIN 17) IS PGND, MUST BE SOLDERED TO PCB
UD PACKAGE
16-LEAD (3mm 3mm) PLASTIC QFN
T
JMAX
= 125°C,
θ
JA
= 68°C/W,
θ
JC
= 4.2°C/W (NOTE 3)
EXPOSED PAD (PIN 17) IS PGND, MUST BE SOLDERED TO PCB
ORDER INFORMATION
LEAD FREE FINISH
LTC3775EUD#PBF
LTC3775IUD#PBF
LTC3775EMSE#PBF
LTC3775IMSE#PBF
TAPE AND REEL
LTC3775EUD#TRPBF
LTC3775IUD#TRPBF
LTC3775EMSE#TRPBF
LTC3775IMSE#TRPBF
PART MARKING*
LDJK
LDJK
3775
3775
PACKAGE DESCRIPTION
16-Lead (3mm
×
3mm) Plastic QFN
16-Lead (3mm
×
3mm) Plastic QFN
16-Lead Plastic MSOP
16-Lead Plastic MSOP
TEMPERATURE RANGE
–40°C to 85°C
–40°C to 125°C
–40°C to 85°C
–40°C to 125°C
Consult LTC Marketing for parts specified with wider operating temperature ranges. *The temperature grade is identified by a label on the shipping container.
Consult LTC Marketing for information on non-standard lead based finish parts.
For more information on lead free part marking, go to:
http://www.linear.com/leadfree/
For more information on tape and reel specifications, go to:
http://www.linear.com/tapeandreel/
3775fa
2
LTC3775
ELECTRICAL CHARACTERISTICS
SYMBOL
Input Supply
V
IN
I
VIN
RUN/SHDN Pin
V
RUN
V
SHDN
V
SHDN(HYST)
I
RUN
Error Amplifier
V
FB
ΔV
FB
ΔV
OUT
I
FB
I
COMP
f
0dB
Soft-Start
I
SS
R
SS
Current Limit
I
LIMB
I
LIMT
I
SENSE
V
ILIMT(MAX)
V
ILIMB(MAX)
INTV
CC
ΔV
INTVCC(LINE)
V
DROPOUT
V
UVLO
I
LIMB
Source Current
I
LIMT
Sink Current
SENSE Pin Input Current
Topside Current Limit Threshold (V
IN
-SENSE)
V
ILIMT
= 0.1V
l
l
The
l
denotes the specifications which apply over the full operating
junction temperature range, otherwise specifications are at T
A
= 25°C (Note 2). V
IN
= 12V, V
RUN
= 5V, unless otherwise specified.
PARAMETER
V
IN
Supply Voltage
Input DC Supply Current
V
FB
= 0.7V (Note 5)
V
RUN
= 0V
1.19
V
RUN/SHDN
Rising
V
RUN/SHDN
= 0V
V
RUN/SHDN
= 1.5V
0.597
0.5955
CONDITIONS
l
MIN
4.5
TYP
MAX
38
UNITS
V
mA
μA
3.5
14
1.22
0.74
140
–1
–5
0.600
±0.01
0.01
–50
–0.5
1
–1
60
25
–1
1.3
0.1
50
0.603
0.6045
1.25
RUN/SHDN Pin Enable Threshold
RUN/SHDN Pin Shutdown Threshold
RUN/SHDN Pin Shutdown Threshold Hysteresis
RUN/SHDN Pin Source Current
V
V
mV
μA
μA
V
V
%/V
%
nA
mA
mA
MHz
μA
kΩ
Feedback Pin Voltage
Feedback Voltage Line Regulation
Output Voltage Load Regulation
FB Pin Input Current
COMP Pin Output Current
Error Amplifier Unity-Gain Crossover Frequency
SS Pin Source Current
SS Pin Pull-Down Resistance in Current Limit
V
ILIMB
= 1V
V
ILIMT
= 12V
4.5V < V
IN
< 38V
1V < V
COMP
< 2V (Note 6)
V
FB
= 0.6V
Sourcing, V
COMP
= 0V
Sinking, V
COMP
= 2V
(Note 6)
V
SS
= 0V
l
l
l
–9
90
90
80
4.9
–10
100
100
100
5.2
0.01
–0.1
0.35
3.6
0.5
–11
110
1
110
120
5.5
μA
μA
μA
mV
mV
V
%/V
%
V
Bottom Side Current Limit Threshold (PGND-SW) V
ILIMB
= 0.5V
LDO Regulator Output Voltage
INTV
CC
Line Regulation
7.5V < V
IN
< 38V
ΔI
INTVCC
= 0mA to 20mA
INTV
CC
Low Dropout Voltage Regulator
ΔV
INTVCC(LOAD)
INTV
CC
Load Regulation
–1
3.0
INTV
CC
Regulator Dropout Voltage (V
IN
– V
INTVCC
) I
INTVCC
= 20mA
INTV
CC
UVLO Voltage
INTV
CC
Rising
Hysteresis
4.2
V
V
3775fa
3
LTC3775
ELECTRICAL CHARACTERISTICS
SYMBOL
Oscillator
f
OSC
f
HIGH
f
LOW
f
SYNC
t
ON(MIN)
t
OFF(MIN)
DC
MAX
V
MODE
V
MODE(HYST)
R
MODE/SYNC
Driver
BG R
UP
TG R
UP
BG R
DOWN
TG R
DOWN
BG, TG t
2D
TG, BG t
1D
Bottom Gate (BG) Pull-Up On-Resistance
Top Gate (TG) Pull-Up On-Resistance
Bottom Gate (BG) Pull-Down On-Resistance
Top Gate (TG) Pull-Down On-Resistance
Bottom Gate Off to Top Gate On Delay
Top Switch-On Delay Time
Top Gate Off to Bottom Gate On Delay
Synchronous Switch-On Delay Time
C
L
= 3300pF (Note 7)
C
L
= 3300pF (Note 7)
2.5
2.5
1.0
1.5
15
15
Ω
Ω
Ω
Ω
ns
ns
Oscillator Frequency
Maximum Oscillator Frequency
Minimum Oscillator Frequency
External Sync Frequency Range
TG Minimum On-Time
TG Minimum Off-Time
Maximum TG Duty Cycle
MODE/SYNC Threshold
MODE/SYNC Hysteresis
MODE/SYNC Input Resistance to SGND
With Reference to Free Running
(Notes 6, 8) V
MODE/SYNC
= 0V
(Note 6)
f
OSC
= 500kHz
MODE/SYNC Rising
l
The
l
denotes the specifications which apply over the full operating
junction temperature range, otherwise specifications are at T
A
= 25°C (Note 2). V
IN
= 12V, V
RUN
= 5V, unless otherwise specified.
PARAMETER
CONDITIONS
R
SET
= 39.2k
l
l
l
MIN
425
1000
TYP
500
MAX
575
250
UNITS
kHz
kHz
kHz
%
ns
ns
%
V
mV
kΩ
–20
30
300
90
1.2
430
50
20
Note 1:
Stresses beyond those listed under Absolute Maximum Ratings
may cause permanent damage to the device. Exposure to any Absolute
Maximum Rating condition for extended periods may affect device
reliability and lifetime.
Note 2:
The LTC3775 is tested under pulsed load conditions such that T
J
≈ T
A
.
The LTC3775E is guaranteed to meet specifications from 0°C to 85°C
junction temperature. Specifications over the –40°C to 125°C operating
junction temperature range are assured by design, characterization and
correlation with statistical process controls. The LTC3775I is guaranteed
over the –40°C to 125°C operating junction temperature range. Note that
the maximum ambient temperature consistent with these specifications
is determined by specific operating conditions in conjunction with board
layout, the rated package thermal impedance and other environmental
factors.
The junction temperature (T
J
, in °C) is calculated from the ambient
temperature (T
A
, in °C) and power dissipation (P
D
, in Watts) according to
the formula:
T
J
= T
A
+ (P
D
•
θ
JA
), where
θ
JA
(in °C/W) is the package thermal
impedance.
Note 3:
Failure to solder the exposed pad of the UD package to the PC
board will result in a thermal resistance much higher than 68°C/W.
Note 4:
All currents into device pins are positive; all currents out of device
pins are negative. All voltages are referenced to ground unless otherwise
specified.
Note 5:
Supply current in normal operation is dominated by the current
needed to charge and discharge the external MOSFET gates. This current
will vary with supply voltage and the external MOSFETs used.
Note 6:
Guaranteed by design, not subject to test.
Note 7:
Rise and fall times are measured using 10% and 90% levels. Delay
and nonoverlap times are measured using 50% levels.
Note 8:
The LTC3775 leading edge modulation architecture does not have
a minimum TG pulse width requirement. The TG minimum pulse width is
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