NCP81231
High Resolution Buck
Controller with Full USB PD
Features and 100% Duty
Operation
The NCP81231 is a synchronous buck that is optimized for
converting battery voltage or adaptor voltage into power supply rails
required in notebook, tablet, and desktop systems, as well as many
other consumer devices using USB PD standard and C−Type cables.
The NCP81231 is fully compliant to the USB Power Delivery
Specification when used in conjunction with a USB PD or C−Type
Interface Controller. NCP81231 is designed for applications requiring
dynamically controlled slew rate limited output voltage.
Features
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1
32
QFN32 5x5, 0.5P
CASE 485CE
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Wide Input Voltage Range: from 4.5 V to 28 V
Dynamically Programmed Frequency from 150 kHz to 1.2 MHz
I
2
C Interface
Real Time Power Good Indication
Controlled Slew Rate Voltage Transitioning
Feedback Pin with Internally Programmed Reference
High Resolution DAC Voltage
Two Independent Current Sensing Inputs
Support Inductor DCR Sensing
Over Temperature Protection
Adaptive Non−Overlap Gate Drivers
Filter Capacitor Switch Control
100% Duty Cycle Operation
Latched Over−Voltage and Over−Current Protection
Dead Battery Power Support
5 x 5 mm QFN32 Package
MARKING DIAGRAM
1
NCP81231
AWLYYWWG
G
A
= Assembly Location
WL
= Wafer Lot
YY
= Year
WW
= Work Week
G
= Pb−Free Package
(Note: Microdot may be in either location)
ORDERING INFORMATION
Device
NCP81231MNTXG
Package
QFN32
(Pb−Free)
Shipping
†
2500 / Tape
& Reel
Typical Application
Notebooks, Tablets, Desktops
Gaming
Monitors, TVs, and Set Top Boxes
Consumer Electronics
Car Chargers
Docking Stations
Power Banks
†For information on tape and reel specifications,
including part orientation and tape sizes, please
refer to our Tape and Reel Packaging Specification
Brochure, BRD8011/D.
©
Semiconductor Components Industries, LLC, 2016
May, 2018
−
Rev. 3
1
Publication Order Number:
NCP81231/D
NCP81231
V1
V1
CSP1
CSN1
FB
VCC
C
VCC
RPU
CO1
CO2
Q6
V2
DBIN
DBOUT
VDRV
C
VDRV
R
DRV
VBUS
CSN2
CSP2
Current Sense 1
R
CS 1
Q5
RPD
CS 1
CFET1
Current Sense 2
R
CS 2
CS 2
BST 1
Q1
CB1
Curret Limit Indicator
Interrupt
Enable
I2C
CLIND
INT
EN
SDA
SCL
HSG1
VSW 1
L1
Q2
LSG1
COMP
CP
RC
PGND1
CC
AGND
PDRV
Figure 1. Typical Application Circuit (DCR)
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2
NCP81231
V1
V1
CSP1
CSN1
FB
VCC
C
VCC
RPU
CO1
CO2
Q6
V2
DBIN
DBOUT
VDRV
C
VDRV
R
DRV
VBUS
CSN2
CSP2
Current Sense 1
R
CS 1
Q5
RPD
CS 1
CFET1
Current Sense 2
R
CS 2
CS 2
BST 1
Q1
CB1
Curret Limit Indicator
Interrupt
Enable
I2C
CLIND
INT
EN
SDA
SCL
HSG1
VSW 1
L1
Q2
LSG1
COMP
CP
RC
PGND1
CC
AGND
PDRV
Figure 2. Typical Application Circuit (Rsense)
DBOUT
VSW1
VDRV
BST1
DBIN
VCC
NC
26
32
HSG1
LSG1
PGND1
CSN1
CSP1
V1
CS1
CLIND
1
2
3
4
5
6
7
8
9
SDA
31
30
29
28
27
25
24
23
22
21
20
19
18
17
NC
NC
PGND2
CSP2
CSN2
FB
CS2
PDRV
10
SCL
11
INT
12
CFET
13
AGND
14
AGND
15
COMP
16
EN
Figure 3. Pinout
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3
NC
NCP81231
V1
DBOUT
DBIN
Current Limiting
Circuit
For Dead Battery
CONFIG
+
V1
V1
BG
CSP1
CSP1
+
Thermal
Shutdown
TS
CS 1
CS 1_INT
CSN1
RS1
VCC
4.0V
−
VCC
VDRV
VDRV
Startup
INPUT
UVLO
+
BG
IUVLOB
CS1
NC
CS2
CLIND
4.0V
VDRV_rdy
CS 1_INT
CLINDP1
CLIND
CLINDP2
PWM
CS 2_INT
PG
OV
−
CS 1
+
CLIMP1
CLIMP2
−
−
+
Protection
Driver
Control
Logic
VDRV
TS
EN
CS 2
CLIND
PG_Low
−
+
−
+
PG/
OV/
LOGIC
OV_MSK
EN
−
EN
LOGIC
0.8V
+
EN _MASK
ENPOL
EN
ADC
Value
Register
Analog
Mux
CSP1
VFB
CS 1_INT
CS 2_INT
VFB
PG_MSK
OV
PG
PG_High
SCL
INT
I2C
Interface
Digital
Configuration
Oscillator
Reference
BG
CS 2_INT
VDRV
CFET
PDRV
INT
Interface
Status
Registers
PG
TS
VFB
VDRV
COMP
CC
CP
RC
Error OTA
+
_
Buck Control
Logic
PWM
VFB
R1
AGND
FLAG
Figure 4. Block Diagram
Table 1. PIN FUNCTION DESCRIPTION
Pin
1
2
3, 22
4
5
6
7
8
9
10
11
12
Pin Name
HSG1
LSG1
PGND
CSN1
CSP1
V1
CS1
CLIND
SDA
SCL
INT
CFET
Description
S1 gate drive. Drives the S1 N−channel MOSFET with a voltage equal to VDRV superimposed on the switch
node voltage VSW1.
Drives the gate of the S2 N−channel MOSFET between ground and VDRV.
Power ground for the low side MOSFET drivers. Connect these pins closely to the source of the bottom
N−channel MOSFETs.
Negative terminal of the current sense amplifier.
Positive terminal of the current sense amplifier.
Input voltage of the converter
Current sense amplifier output. CS1 will source a current that is proportional to the voltage across
CSP1/CSN1. Connect CS1 to a high impedance monitoring input.
Open drain output to indicate that the CS1 or CS2 voltage has exceeded the I
2
C programmed limit.
I
2
C interface data line.
I
2
C interface clock line.
Interrupt is an open drain output that indicates the state of the output power, the internal thermal trip, and
other I
2
C programmable functions.
Controlled drive of an external MOSFET that connects a bulk output capacitor to the output of the power
converter. Necessary to adhere to low capacitance limits of the standard USB Specifications for power prior
to USB PD negotiation.
The ground pin for the analog circuitry.
Output of the transconductance amplifier used for stability in closed loop operation.
13, 14
15
AGND
COMP
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4
_
SDA
CONFIG
CS 2_INT
CSN2
+
CFET
PDRV
VFB
+
Limit
Registers
OV_REF
−
CS 2
_
Vcc_rdy
V1
BST1
HSG1
VSW1
LSG1
PGND1
Q2
Rbld
RS2
Q1
V2
CO
CO 2
CSP2
CSN2
CFET
PDRV
FB
NCP81231
Table 1. PIN FUNCTION DESCRIPTION
(continued)
Pin
16
17
18
19
20
21
23−25
26
27
28
29
30
Pin Name
EN
PDRV
CS2
FB
CSN2
CSP2
NC
NC
DBOUT
DBIN
VDRV
VCC
Description
Precision enable starts the part and places it into default configuration when toggled.
The open drain output used to control a PMOSFET or connect to an external resistor.
Current sense amplifier output. CS2 will source a current that is proportional to the voltage across
CSP1/CSN1. Connect CS2 to a high impedance monitoring input.
Feedback voltage of the output, negative terminal of the gm amplifier.
Negative terminal of the current sense amplifier.
Positive terminal of the current sense amplifier.
No connection.
No connection.
The output of the dead battery circuit which can also be used for the VCONN voltage supply.
The dead battery input to the converter where 5 V is applied. A 1
mF
capacitor should be placed close to the
part to decouple this line.
Internal voltage supply to the driver circuits. A 1
mF
capacitor should be placed close to the part to decouple
this line.
The VCC pin supplies power to the internal circuitry. The VCC is the output of a linear regulator which is
powered from V1. Can be used to supply up to a 100 mA load. Pin should be decoupled with a 1
mF
capacitor
for stable operation.
Switch Node. VSW1 pin swings from a diode voltage drop below ground up to V1.
Driver Supply. The BST1 pin swings from a diode voltage below VDRV up to a diode voltage below V1 +
VDRV. Place a 0.1
mF
capacitor from this pin to VSW1.
Center pad, recommended to connect to AGND.
31
32
33
VSW1
BST1
THPAD
(Over operating free−air temperature range unless otherwise noted)
Rating
Input of the Dead Battery Circuit
Output of the Dead Battery Circuit
Driver Input Voltage
Internal Regulator Output
Output of Current Sense Amplifiers
Current Limit Indicator
Interrupt Indicator
Enable Input
I
2
C Communication Lines
Compensation Output
V1 Power Stage Input Voltage
Positive Current Sense
Negative Current Sense
Positive Current Sense
Negative Current Sense
Feedback Voltage
CFET Driver
Driver Positive Rail
Symbol
DBIN
DBOUT
VDRV
VCC
CS1, CS2
CLIND
INT
EN
SDA, SCL
COMP
V1
CSP1
CSN1
CSP2
CSN2
FB
CFET
BST1
Min
−0.3
−0.3
−0.3
−0.3
−0.3
−0.3
−0.3
−0.3
−0.3
−0.3
−0.3
−0.3
−0.3
−0.3
−0.3
−0.3
−0.3
−0.3
V wrt/PGND
−0.3
V wrt/VSW
Max
5.5
5.5
5.5
5.5
3.0
VCC + 0.3
VCC + 0.3
5.5
VCC + 0.3
VCC + 0.3
32 V, 40 V (20 ns)
32 V, 40 V (20 ns)
32 V, 40 V (20 ns)
32 V, 40 V (20 ns)
32 V, 40 V (20 ns)
5.5
VCC + 0.3
37 V, 40 V (20 ns) wrt/PGND
5.5 V wrt/VSW
Unit
V
V
V
V
V
V
V
V
V
V
V
V
V
V
V
V
V
V
Table 2. MAXIMUM RATINGS
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5
嵌入式系统
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