PD- 91888
IRL5602S
HEXFET
®
Power MOSFET
l
l
l
l
l
l
Advanced Process Technology
Dynamic dv/dt Rating
175°C Operating Temperature
P-Channel
Fast Switching
Fully Avalanche Rated
D
V
DSS
= -20V
G
S
R
DS(on)
= 0.042W
I
D
= -24A
Description
Fifth Generation HEXFETs from International Rectifier utilize advanced
processing techniques to achieve extremely low on-resistance per silicon area.
This benefit, combined with the fast switching speed and ruggedized device
design that HEXFET Power MOSFETs are well known for, provides the
designer with an extremely efficient and reliable device for use in a wide variety
of applications.
The D
2
Pak is a surface mount power package capable of accommodating die
sizes up to HEX-4. It provides the highest power capability and the lowest
possible on-resistance in any existing surface mount package. The D
2
Pak is
suitable for high current applications because of its low internal connection
resistance and can dissipate up to 2.0W in a typical surface mount application.
D
2
Pak
Absolute Maximum Ratings
Parameter
I
D
@ T
C
= 25°C
I
D
@ T
C
= 100°C
I
DM
P
D
@T
C
= 25°C
V
GS
E
AS
I
AR
E
AR
dv/dt
T
J
T
STG
Continuous Drain Current, V
GS
@ -4.5V
Continuous Drain Current, V
GS
@ -4.5V
Pulsed Drain Current
Power Dissipation
Linear Derating Factor
Gate-to-Source Voltage
Single Pulse Avalanche Energy
Avalanche Current
Repetitive Avalanche Energy
Peak Diode Recovery dv/dt
Operating Junction and
Storage Temperature Range
Soldering Temperature, for 10 seconds
Max.
-24
-17
-96
75
0.5
± 8.0
290
-12
7.5
-0.81
-55 to + 175
300 (1.6mm from case )
Units
A
W
W/°C
V
mJ
A
mJ
V/ns
°C
Thermal Resistance
Parameter
R
qJC
R
qJA
Junction-to-Case
Junction-to-Ambient ( PCB Mounted,steady-state)**
Typ.
–––
–––
Max.
2.0
40
Units
°C/W
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1
5/11/99
IRL5602S
Electrical Characteristics @ T
J
= 25°C (unless otherwise specified)
V
(BR)DSS
DV
(BR)DSS
/DT
J
Parameter
Drain-to-Source Breakdown Voltage
Breakdown Voltage Temp. Coefficient
Static Drain-to-Source On-Resistance
Gate Threshold Voltage
Forward Transconductance
Drain-to-Source Leakage Current
Gate-to-Source Forward Leakage
Gate-to-Source Reverse Leakage
Total Gate Charge
Gate-to-Source Charge
Gate-to-Drain ("Miller") Charge
Turn-On Delay Time
Rise Time
Turn-Off Delay Time
Fall Time
Internal Source Inductance
Input Capacitance
Output Capacitance
Reverse Transfer Capacitance
R
DS(on)
V
GS(th)
g
fs
I
DSS
I
GSS
Q
g
Q
gs
Q
gd
t
d(on)
t
r
t
d(off)
t
f
L
S
C
iss
C
oss
C
rss
Min.
-20
–––
–––
–––
–––
-0.7
12
–––
–––
–––
–––
–––
–––
–––
–––
–––
–––
–––
–––
–––
–––
–––
Typ. Max. Units
Conditions
––– –––
V
V
GS
= 0V, I
D
= -250µA
-0.013 ––– V/°C Reference to 25°C, I
D
= -1mA
––– 0.042
V
GS
= -4.5V, I
D
= -12A
––– 0.062
W
V
GS
= -2.7V, I
D
= -10A
––– 0.075
V
GS
= -2.5V, I
D
= -10A
––– -1.0
V
V
DS
= V
GS
, I
D
= -250µA
––– –––
S
V
DS
= -15V, I
D
= -12A
––– -25
V
DS
= -20V, V
GS
= 0V
µA
––– -250
V
DS
= -16V, V
GS
= 0V, T
J
= 150°C
––– 500
V
GS
= -8.0V
nA
––– -500
V
GS
= 8.0V
––– 44
I
D
= -12A
––– 8.7
nC V
DS
= -16V
––– 19
V
GS
= -4.5V, See Fig. 6 and 13
9.7 –––
V
DD
= -10 V
73 –––
I
D
= -12A
ns
53 –––
R
G
= 6.0W, V
GS
= 4.5V
84 –––
R
D
= 0.8W, See Fig. 10
Between lead,
7.5
–––
nH
and center of die contact
1460 –––
V
GS
= 0V
790 –––
pF
V
DS
= -15V
370 –––
ƒ = 1.0MHz, See Fig. 5
Source-Drain Ratings and Characteristics
I
S
I
SM
V
SD
t
rr
Q
rr
t
on
Parameter
Continuous Source Current
(Body Diode)
Pulsed Source Current
(Body Diode)
Diode Forward Voltage
Reverse Recovery Time
Reverse RecoveryCharge
Forward Turn-On Time
Min. Typ. Max. Units
Conditions
D
MOSFET symbol
––– ––– -24
showing the
A
G
integral reverse
-96
––– –––
p-n junction diode.
S
––– ––– -1.4
V
T
J
= 25°C, I
S
= -12A, V
GS
= 0V
––– 58
88
ns
T
J
= 25°C, I
F
= -12A
––– 54
81
nC
di/dt = -100A/µs
Intrinsic turn-on time is negligible (turn-on is dominated by L
S
+L
D
)
Notes:
Repetitive rating; pulse width limited by
max. junction temperature. ( See fig. 11 )
I
SD
£
-12A, di/dt
£
120A/µs, V
DD
£
V
(BR)DSS
,
T
J
£
175°C
Starting T
J
= 25°C, L = 3.0mH
R
G
= 25W, I
AS
= -14A. (See Figure 12)
Pulse width
£
300µs; duty cycle
£
2%.
**
When mounted on FR-4 board using minimum recommended footprint.
For recommended footprint and soldering techniques refer to application note #AN-994.
2
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IRL5602S
100
VGS
-15V
-12V
-10V
-7.0V
-5.0V
-4.5V
-2.7V
BOTTOM -2.0V
TOP
100
-I
D
, Drain-to-Source Current (A)
10
-I
D
, Drain-to-Source Current (A)
VGS
-15V
-12V
-10V
-7.0V
-5.0V
-4.5V
-2.7V
BOTTOM -2.0V
TOP
10
-2.0V
-2.0V
1
0.1
20µs PULSE WIDTH
T
J
= 25
°
C
1
10
100
1
0.1
20µs PULSE WIDTH
T
J
= 175
°
C
1
10
100
-V
DS
, Drain-to-Source Voltage (V)
-V
DS
, Drain-to-Source Voltage (V)
Fig 1.
Typical Output Characteristics
Fig 2.
Typical Output Characteristics
100
3.5
-I
D
, Drain-to-Source Current (A)
T
J
= 25
°
C
T
J
= 175
°
C
R
DS(on)
, Drain-to-Source On Resistance
(Normalized)
I
D
= -24A
3.0
2.5
2.0
1.5
1.0
0.5
0.0
-60 -40 -20 0
10
1
2.0
V DS = -15V
20µs PULSE WIDTH
3.0
4.0
5.0
6.0
V
GS
= -4.5V
20 40 60 80 100 120 140 160 180
-V
GS
, Gate-to-Source Voltage (V)
T
J
, Junction Temperature (
°
C)
Fig 3.
Typical Transfer Characteristics
Fig 4.
Normalized On-Resistance
Vs. Temperature
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3
IRL5602S
2800
2400
-V
GS
, Gate-to-Source Voltage (V)
V
GS
= 0V,
f = 1MHz
C
iss
= C
gs
+ C
gd ,
C
ds
SHORTED
C
rss
= C
gd
C
oss
= C
ds
+ C
gd
15
I
D
= -12A
V
DS
=-16V
V
DS
=-10V
12
C, Capacitance (pF)
2000
Ciss
1600
1200
800
9
Coss
6
Crss
400
0
3
1
10
100
0
0
10
20
30
FOR TEST CIRCUIT
SEE FIGURE 13
40
50
60
70
-V
DS
, Drain-to-Source Voltage (V)
Q
G
, Total Gate Charge (nC)
Fig 5.
Typical Capacitance Vs.
Drain-to-Source Voltage
Fig 6.
Typical Gate Charge Vs.
Gate-to-Source Voltage
100
1000
-I
SD
, Reverse Drain Current (A)
OPERATION IN THIS AREA LIMITED
BY R
DS(on)
10
-I
D
, Drain Current (A)
I
100
100us
T
J
= 175
°
C
T
J
= 25
°
C
1
1ms
10
10ms
0.1
0.0
V
GS
= 0 V
0.4
0.8
1.2
1.6
1
1
T
C
= 25 ° C
T
J
= 175 ° C
Single Pulse
10
100
-V
SD
,Source-to-Drain Voltage (V)
-V
DS
, Drain-to-Source Voltage (V)
Fig 7.
Typical Source-Drain Diode
Forward Voltage
Fig 8.
Maximum Safe Operating Area
4
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IRL5602S
25
V
DS
20
R
D
V
GS
R
G
-I
D
, Drain Current (A)
D.U.T.
+
15
-4.5V
10
Pulse Width
£ 1
µs
Duty Factor
£ 0.1 %
5
t
d(on)
t
r
t
d(off)
t
f
V
GS
0
25
50
75
100
125
150
175
10%
T
C
, Case Temperature ( ° C)
90%
V
DS
Fig 9.
Maximum Drain Current Vs.
Case Temperature
10
Thermal Response (Z
thJC
)
1 D = 0.50
0.20
0.10
0.05
0.1
0.02
0.01
SINGLE PULSE
(THERMAL RESPONSE)
P
DM
t
1
t
2
Notes:
1. Duty factor D = t
1
/ t
2
2. Peak T
J
= P
DM
x Z
thJC
+ T
C
0.0001
0.001
0.01
0.1
0.01
0.00001
t
1
, Rectangular Pulse Duration (sec)
Fig 11.
Maximum Effective Transient Thermal Impedance, Junction-to-Case
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V
DD
5
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