PD - 91376C
IRL2910S/L
Logic-Level Gate Drive
l
Surface Mount
l
Advanced Process Technology
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Ultra Low On-Resistance
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Dynamic dv/dt Rating
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Fast Switching
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Fully Avalanche Rated
Description
l
HEXFET
®
Power MOSFET
D
V
DSS
= 100V
R
DS(on)
= 0.026Ω
G
S
I
D
= 55A
Fifth Generation HEXFETs from International Rectifier
utilize advanced processing techniques to achieve
extremely low on-resistance per silicon area. This
benefit, combined with the fast switching speed and
ruggedized device design that HEXFET Power MOSFETs
are well known for, provides the designer with an extremely
efficient and reliable device for use in a wide variety of
applications.
The D
2
Pak is a surface mount power package capable of
accommodating die sizes up to HEX-4. It provides the
highest power capability and the lowest possible on-
resistance in any existing surface mount package. The
D
2
Pak is suitable for high current applications because of
its low internal connection resistance and can dissipate up
to 2.0W in a typical surface mount application.
The through-hole version (IRL2910L) is available for low-
profile applications.
D 2 Pak
TO-262
Absolute Maximum Ratings
I
D
@ T
C
= 25°C
I
D
@ T
C
= 100°C
I
DM
P
D
@T
A
= 25°C
P
D
@T
C
= 25°C
V
GS
E
AS
I
AR
E
AR
dv/dt
T
J
T
STG
Parameter
Continuous Drain Current, V
GS
@ 10V
Continuous Drain Current, V
GS
@ 10V
Pulsed Drain Current
Power Dissipation
Power Dissipation
Linear Derating Factor
Gate-to-Source Voltage
Single Pulse Avalanche Energy
Avalanche Current
Repetitive Avalanche Energy
Peak Diode Recovery dv/dt
Operating Junction and
Storage Temperature Range
Soldering Temperature, for 10 seconds
Max.
55
39
190
3.8
200
1.3
± 16
520
29
20
5.0
-55 to + 175
300 (1.6mm from case )
Units
A
W
W
W/°C
V
mJ
A
mJ
V/ns
°C
Thermal Resistance
Parameter
R
θJC
R
θJA
Junction-to-Case
Junction-to-Ambient ( PCB Mounted,steady-state)**
Typ.
Max.
0.75
40
Units
°C/W
10/09/03
IRL2910S/L
Electrical Characteristics @ T
J
= 25°C (unless otherwise specified)
V
(BR)DSS
∆V
(BR)DSS
/∆T
J
Parameter
Drain-to-Source Breakdown Voltage
Breakdown Voltage Temp. Coefficient
Static Drain-to-Source On-Resistance
Gate Threshold Voltage
Forward Transconductance
Drain-to-Source Leakage Current
Gate-to-Source Forward Leakage
Gate-to-Source Reverse Leakage
Total Gate Charge
Gate-to-Source Charge
Gate-to-Drain ("Miller") Charge
Turn-On Delay Time
Rise Time
Turn-Off Delay Time
Fall Time
Internal Source Inductance
Input Capacitance
Output Capacitance
Reverse Transfer Capacitance
R
DS(on)
V
GS(th)
g
fs
I
DSS
I
GSS
Q
g
Q
gs
Q
gd
t
d(on)
t
r
t
d(off)
t
f
L
S
C
iss
C
oss
C
rss
Min.
100
1.0
28
Max. Units
Conditions
V
V
GS
= 0V, I
D
= 250µA
V/°C Reference to 25°C, I
D
= 1mA
0.026
V
GS
= 10V, I
D
= 29A
0.030
Ω
V
GS
= 5.0V, I
D
= 29A
0.040
V
GS
= 4.0V, I
D
= 24A
2.0
V
V
DS
= V
GS
, I
D
= 250µA
S
V
DS
= 50V, I
D
= 29A
25
V
DS
= 100V, V
GS
= 0V
µA
250
V
DS
= 80V, V
GS
= 0V, T
J
= 150°C
100
V
GS
= 16V
nA
-100
V
GS
= -16V
140
I
D
= 29A
20
nC V
DS
= 80V
81
V
GS
= 5.0V, See Fig. 6 and 13
V
DD
= 50V
I
D
= 29A
ns
R
G
= 1.4Ω, V
GS
= 5.0V
R
D
= 1.7Ω, See Fig. 10
Between lead,
7.5
nH and center of die contact
3700
V
GS
= 0V
630
pF
V
DS
= 25V
330
= 1.0MHz, See Fig. 5
Typ.
0.12
11
100
49
55
Source-Drain Ratings and Characteristics
I
S
I
SM
V
SD
t
rr
Q
rr
t
on
Notes:
Parameter
Continuous Source Current
(Body Diode)
Pulsed Source Current
(Body Diode)
Diode Forward Voltage
Reverse Recovery Time
Reverse RecoveryCharge
Forward Turn-On Time
Min. Typ. Max. Units
Conditions
D
MOSFET symbol
55
showing the
A
G
integral reverse
190
S
p-n junction diode.
1.3
V
T
J
= 25°C, I
S
= 29A, V
GS
= 0V
240 350
ns
T
J
= 25°C, I
F
= 29A
1.8 2.7
µC di/dt = 100A/µs
Intrinsic turn-on time is negligible (turn-on is dominated by L
S
+L
D
)
Repetitive rating; pulse width limited by
Pulse width
≤
300µs; duty cycle
≤
2%.
max. junction temperature. ( See fig. 11 )
Uses IRL2910 data and test conditions
V
DD
= 25V, starting T
J
= 25°C, L = 1.2mH
R
G
= 25Ω, I
AS
= 29A. (See Figure 12)
I
SD
≤
29A, di/dt
≤
490A/µs, V
DD
≤
V
(BR)DSS
,
T
J
≤
175°C
** When mounted on 1" square PCB ( FR-4 or G-10 Material ).
For recommended footprint and soldering techniques refer to application note #AN-994.
IRL2910S/L
1000
VGS
15V
12V
10V
8.0V
6.0V
4.0V
3.0V
BOTTOM 2.5V
TOP
1000
I
D
, Drain-to-Source Current (A)
100
I
D
, Drain-to-Source Current (A)
VGS
15V
12V
10V
8.0V
6.0V
4.0V
3.0V
BOTTOM 2.5V
TOP
100
10
10
2.5V
2.5V
1
0.1
20µs PULSE WIDTH
T
J
= 25°C
1
10
100
A
1
0.1
20µs PULSE WIDTH
T
J
= 175°C
1
10
100
A
V
DS
, Drain-to-Source Voltage (V)
V
DS
, Drain-to-Source Voltage (V)
Fig 1.
Typical Output Characteristics
Fig 2.
Typical Output Characteristics
1000
3.0
R
DS(on)
, Drain-to-Source On Resistance
(Normalized)
I
D
= 48A
I
D
, Drain-to-Source Current (A)
2.5
100
T
J
= 25°C
T
J
= 175°C
2.0
1.5
10
1.0
0.5
1
2.0
2.5
3.0
3.5
4.0
V
DS
= 50V
20µs PULSE WIDTH
4.5
5.0
5.5
6.0
A
0.0
-60 -40 -20
0
20
40
60
V
GS
= 10V
80 100 120 140 160 180
A
V
GS
, Gate-to-Source Voltage (V)
T
J
, Junction Temperature (°C)
Fig 3.
Typical Transfer Characteristics
Fig 4.
Normalized On-Resistance
Vs. Temperature
IRL2910S/L
6000
5000
V
GS
, Gate-to-Source Voltage (V)
V
GS
= 0V,
f = 1MHz
C
iss
= C
gs
+ C
gd
, C
ds
SHORTED
C
rss
= C
gd
C
iss C
oss
= C
ds
+ C
gd
15
I
D
= 29A
V
DS
= 80V
V
DS
= 50V
V
DS
= 20V
12
C, Capacitance (pF)
4000
9
3000
C
oss
2000
6
C
rss
1000
3
0
1
10
100
A
0
0
40
80
FOR TEST CIRCUIT
SEE FIGURE 13
120
160
A
200
V
DS
, Drain-to-Source Voltage (V)
Q
G
, Total Gate Charge (nC)
Fig 5.
Typical Capacitance Vs.
Drain-to-Source Voltage
Fig 6.
Typical Gate Charge Vs.
Gate-to-Source Voltage
1000
1000
I
SD
, Reverse Drain Current (A)
OPERATION IN THIS AREA LIMITED
BY R
DS(on)
I
D
, Drain Current (A)
100
10µs
100
100µs
T
J
= 175°C
T
J
= 25°C
10
1ms
10
0.4
0.8
1.2
1.6
V
GS
= 0V
A
1
1
T
C
= 25°C
T
J
= 175°C
Single Pulse
10
10ms
2.0
100
1000
A
V
SD
, Source-to-Drain Voltage (V)
V
DS
, Drain-to-Source Voltage (V)
Fig 7.
Typical Source-Drain Diode
Forward Voltage
Fig 8.
Maximum Safe Operating Area
IRL2910S/L
50
V
DS
40
R
D
V
GS
R
G
I
D
, Drain Current (Amps)
D.U.T.
+
-
V
DD
30
5.0V
Pulse Width
≤ 1
µs
Duty Factor
≤ 0.1 %
20
Fig 10a.
Switching Time Test Circuit
10
V
DS
90%
A
25
50
75
100
125
150
175
0
T
C
, Case Temperature (°C)
Fig 9.
Maximum Drain Current Vs.
Case Temperature
10%
V
GS
t
d(on)
t
r
t
d(off)
t
f
Fig 10b.
Switching Time Waveforms
10
Thermal Response (Z
thJC
)
1
D = 0.50
0.20
0.1
0.10
0.05
0.02
0.01
Notes:
1. Duty factor D = t
P
DM
t
1
t2
SINGLE PULSE
(THERMAL RESPONSE)
0.0001
0.001
0.01
1
/t
2
0.01
0.00001
2. Peak T
J
= P
DM
x Z
thJC
+ T C
A
10
0.1
1
t
1
, Rectangular Pulse Duration (sec)
Fig 11.
Maximum Effective Transient Thermal Impedance, Junction-to-Case