Data Sheet No. PD60139J
IR2105
HALF BRIDGE DRIVER
Features
•
Floating channel designed for bootstrap operation
Fully operational to +600V
Tolerant to negative transient voltage
dV/dt immune
Gate drive supply range from 10 to 20V
Undervoltage lockout
5V Schmitt-triggered input logic
Cross-conduction prevention logic
Internally set deadtime
High side output in phase with input
Match propagation delay for both channels
Product Summary
V
OFFSET
I
O
+/-
V
OUT
t
on/off
(typ.)
Deadtime (typ.)
600V max.
130 mA / 270 mA
10 - 20V
680 & 150 ns
520 ns
•
•
•
•
•
•
•
Packages
Description
The IR2105 is a high voltage, high speed power
MOSFET and IGBT driver with dependent high and
low side referenced output channels. Proprietary
HVIC and latch immune CMOS technologies en-
able ruggedized monolithic construction. The logic
input is compatible with standard CMOS or LSTTL
outputs. The output drivers feature a high pulse
current buffer stage designed for minimum driver
cross-conduction. The floating channel can be used
to drive an N-channel power MOSFET or IGBT in
the high side configuration which operates from 10
to 600 volts.
8 Lead PDIP
8 Lead SOIC
Typical Connection
up to 600V
V
CC
V
CC
IN
V
B
HO
V
S
TO
LOAD
IN
COM
LO
IR2105
Absolute Maximum Ratings
Absolute maximum ratings indicate sustained limits beyond which damage to the device may occur. All voltage param-
eters are absolute voltages referenced to COM. The thermal resistance and power dissipation ratings are measured
under board mounted and still air conditions.
Symbol
V
B
V
S
V
HO
V
CC
V
LO
V
IN
dV
s
/dt
P
D
Rth
JA
T
J
T
S
T
L
Definition
High side floating absolute voltage
High side floating supply offset voltage
High side floating output voltage
Low side and logic fixed supply voltage
Low side output voltage
Logic input voltage
Allowable offset supply voltage transient
Package power dissipation @ T
A
≤
+25°C
Thermal resistance, junction to ambient
Junction temperature
Storage temperature
Lead temperature (soldering, 10 seconds)
(8 Lead DIP)
(8 Lead SOIC)
(8 Lead DIP)
(8 Lead SOIC)
Min.
-0.3
V
B
- 25
V
S
- 0.3
-0.3
-0.3
-0.3
—
—
—
—
—
—
-55
—
Max.
625
V
B
+ 0.3
V
B
+ 0.3
25
V
CC
+ 0.3
V
CC
+ 0.3
50
1.0
0.625
125
200
150
150
300
Units
V
V/ns
W
°C/W
°C
Recommended Operating Conditions
The input/output logic timing diagram is shown in figure 1. For proper operation the device should be used within the
recommended conditions. The V
S
offset rating is tested with all supplies biased at 15V differential.
Symbol
V
B
V
S
V
HO
V
CC
V
LO
V
IN
T
A
Definition
High side floating supply absolute voltage
High side floating supply offset voltage
High side floating output voltage
Low side and logic fixed supply voltage
Low side output voltage
Logic input voltage
Ambient temperature
Min.
V
S
+ 10
Note 1
V
S
10
0
0
-40
Max.
V
S
+ 20
600
V
B
20
V
CC
V
CC
125
Units
V
°C
Note 1: Logic operational for V
S
of -5 to +600V. Logic state held for V
S
of -5V to -V
BS
.
2
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IR2105
Dynamic Electrical Characteristics
V
BIAS
(V
CC
, V
BS
) = 15V, C
L
= 1000 pF and T
A
= 25°C unless otherwise specified.
Symbol
ton
toff
tr
tf
DT
MT
Definition
Turn-on propagation delay
Turn-off propagation delay
Turn-on rise time
Turn-off fall time
Deadtime, LS turn-off to HS turn-on &
HS turn-on to LS turn-off
Delay matching, HS & LS turn-on/off
Min. Typ. Max. Units Test Conditions
—
—
—
—
400
—
680
150
100
50
520
—
820
220
170
90
650
60
ns
V
S
= 0V
V
S
= 600V
Static Electrical Characteristics
V
BIAS
(V
CC
, V
BS
) = 15V and T
A
= 25°C unless otherwise specified. The V
IN
, V
TH
and I
IN
parameters are referenced to
COM. The V
O
and I
O
parameters are referenced to COM and are applicable to the respective output leads: HO or LO.
Symbol
V
IH
V
IL
V
OH
V
OL
I
LK
I
QBS
I
QCC
I
IN+
I
IN-
V
CCUV+
V
CCUV-
I
O+
I
O-
Definition
Logic “1” (HO) & Logic “0” (LO) Input Voltage
Logic “0” (HO) & Logic “1” (LO) Input Voltage
High Level Output Voltage, V
BIAS
- V
O
Low Level Output Voltage, V
O
Offset Supply Leakage Current
Quiescent V
BS
Supply Current
Quiescent V
CC
Supply Current
Logic “1” Input Bias Current
Logic “0” Input Bias Current
V
CC
Supply Undervoltage Positive Going
Threshold
V
CC
Supply Undervoltage Negative Going
Threshold
Output High Short Circuit Pulsed Current
Output Low Short Circuit Pulsed Current
Min. Typ. Max. Units Test Conditions
3
—
—
—
—
—
—
—
—
8
7.4
130
270
—
—
—
—
—
30
150
3
—
8.9
8.2
210
360
—
0.8
100
100
50
55
270
10
1
9.8
9
—
mA
—
V
µA
V
mV
V
CC
= 10V to 20V
V
CC
= 10V to 20V
I
O
= 0A
I
O
= 0A
V
B
= V
S
= 600V
V
IN
= 0V or 5V
V
IN
= 0V or 5V
V
IN
= 5V
V
IN
= 0V
V
O
= 0V
PW
≤
10 µs
V
O
= 15V
PW
≤
10 µs
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3
IR2105
Functional Block Diagram
V
B
Q
PULSE
FILTER
R
S
V
S
HO
HV
LEVEL
SHIFT
IN
DEAD
TIME
PULSE
GEN
UV
DETECT
V
CC
DEAD
TIME
LO
COM
Lead Definitions
Lead
Symbol Description
IN
V
B
HO
V
S
V
CC
LO
COM
Logic input for high and low side gate driver outputs (HO and LO), in phase with HO
High side floating supply
High side gate drive output
High side floating supply return
Low side and logic fixed supply
Low side gate drive output
Low side return
Lead Assignments
COM
LO
5
COM
LO
5
8 Lead PDIP
8 Lead SOIC
IR2105
4
IR2105S
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IR2105
8 Lead PDIP
01-3003 01
8 Lead SOIC
www.irf.com
01-0021 08
5
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