Data Sheet No. PD60174 revG
IR2184
(
4
)(S) & (PbF)
Features
HALF-BRIDGE DRIVER
Packages
14-Lead PDIP
IR21844
8-Lead PDIP
IR2184
•
Floating channel designed for bootstrap operation
•
•
•
•
•
•
•
•
Fully operational to +600V
Tolerant to negative transient voltage
dV/dt immune
Gate drive supply range from 10 to 20V
Undervoltage lockout for both channels
3.3V and 5V input logic compatible
Matched propagation delay for both channels
Logic and power ground +/- 5V offset.
Lower di/dt gate driver for better noise immunity
Output source/sink current capability 1.4A/1.8A
Also available LEAD-FREE (PbF)
8-Lead SOIC
IR2184S
14-Lead SOIC
IR21844S
Description
The IR2184(4)(S) are high voltage,
Cross-
high speed power MOSFET and IGBT
Input
conduction
Part
Dead-Time
Ground Pins
Ton/Toff
logic
prevention
drivers with dependent high and low
logic
side referenced output channels. Pro-
2181
COM
HIN/LIN
no
none
180/220 ns
prietary HVIC and latch immune
21814
VSS/COM
2183
Internal 500ns
COM
CMOS technologies enable rugge-
HIN/LIN
yes
180/220 ns
21834
Program 0.4 ~ 5 us
VSS/COM
dized monolithic construction. The
2184
Internal 500ns
COM
IN/SD
yes
680/270 ns
logic input is compatible with standard
21844
Program 0.4 ~ 5 us
VSS/COM
CMOS or LSTTL output, down to 3.3V
logic. The output drivers feature a
high pulse current buffer stage designed for minimum driver cross-conduction. The floating channel can be
used to drive an N-channel power MOSFET or IGBT in the high side configuration which operates up to 600
volts.
IR2181/IR2183/IR2184 Feature Comparison
Typical Connection
up to 600V
V
CC
V
CC
IN
SD
V
B
HO
V
S
LO
TO
LOAD
IN
SD
COM
up to 600V
IR2184
HO
V
CC
IN
SD
V
CC
IN
SD
DT
V
SS
R
DT
V
SS
COM
LO
V
B
V
S
TO
LOAD
IR21844
(Refer to Lead Assignments for correct
configuration). This/These diagram(s) show
electrical connections only. Please refer to
our Application Notes and DesignTips for
proper circuit board layout.
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1
IR2184
(
4
)(S) & (PbF)
Absolute Maximum Ratings
Absolute maximum ratings indicate sustained limits beyond which damage to the device may occur. All voltage parameters
are absolute voltages referenced to COM. The thermal resistance and power dissipation ratings are measured under board
mounted and still air conditions.
Symbol
V
B
V
S
V
HO
V
CC
V
LO
DT
V
IN
V
SS
dV
S
/dt
P
D
Definition
High side floating absolute voltage
High side floating supply offset voltage
High side floating output voltage
Low side and logic fixed supply voltage
Low side output voltage
Programmable dead-time pin voltage (IR21844 only)
Logic input voltage (IN & SD)
Logic ground (IR21844 only)
Allowable offset supply voltage transient
Package power dissipation @ T
A
≤
+25°C
(8-lead PDIP)
(8-lead SOIC)
(14-lead PDIP)
(14-lead SOIC)
Min.
-0.3
V
B
- 25
V
S
- 0.3
-0.3
-0.3
V
SS
- 0.3
V
SS
- 0.3
V
CC
- 25
—
—
—
—
—
—
—
—
—
—
-50
—
Max.
625
V
B
+ 0.3
V
B
+ 0.3
25
V
CC
+ 0.3
V
CC
+ 0.3
V
SS
+ 10
V
CC
+ 0.3
50
1.0
0.625
1.6
1.0
125
200
75
120
150
150
300
Units
V
V/ns
W
Rth
JA
Thermal resistance, junction to ambient
(8-lead PDIP)
(8-lead SOIC)
(14-lead PDIP)
(14-lead SOIC)
°C/W
T
J
T
S
T
L
Junction temperature
Storage temperature
Lead temperature (soldering, 10 seconds)
°C
Recommended Operating Conditions
The input/output logic timing diagram is shown in figure 1. For proper operation the device should be used within the
recommended conditions. The V
S
and V
SS
offset rating are tested with all supplies biased at 15V differential.
Symbol
VB
V
S
V
HO
V
CC
V
LO
V
IN
DT
V
SS
T
A
Definition
High side floating supply absolute voltage
High side floating supply offset voltage
High side floating output voltage
Low side and logic fixed supply voltage
Low side output voltage
Logic input voltage (IN & SD)
Programmable dead-time pin voltage (IR21844 only)
Logic ground (IR21844 only)
Ambient temperature
Min.
V
S
+ 10
Note 1
V
S
10
0
V
SS
V
SS
-5
-40
Max.
V
S
+ 20
600
V
B
20
V
CC
V
SS
+ 5
V
CC
5
125
Units
V
°C
Note 1: Logic operational for V
S
of -5 to +600V. Logic state held for V
S
of -5V to -V
BS
. (Please refer to the Design Tip
DT97-3 for more details).
Note 2: IN and SD are internally clamped with a 5.2V zener diode.
2
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IR2184
(
4
)(S) & (PbF)
Dynamic Electrical Characteristics
V
BIAS
(V
CC
, V
BS
) = 15V, V
SS
= COM, C
L
= 1000 pF, T
A
= 25°C, DT = VSS unless otherwise specified.
Symbol
ton
toff
tsd
MTon
MToff
tr
tf
DT
MDT
Definition
Turn-on propagation delay
Turn-off propagation delay
Shut-down propagation delay
Delay matching, HS & LS turn-on
Delay matching, HS & LS turn-off
Turn-on rise time
Turn-off fall time
Deadtime: LO turn-off to HO turn-on(DT
LO-HO) &
HO turn-off to LO turn-on (DT
HO-LO)
Deadtime matching = DT
LO - HO
- DT
HO-LO
Min.
—
—
—
—
—
—
—
280
4
—
—
Typ.
680
270
180
0
0
40
20
400
5
0
0
Max. Units Test Conditions
900
400
270
90
40
60
35
520
6
50
600
µsec
nsec
V
S
= 0V
V
S
= 0V
RDT= 0
RDT = 200k
RDT=0
RDT = 200k
nsec
V
S
= 0V
V
S
= 0V or 600V
Static Electrical Characteristics
V
BIAS
(V
CC
, V
BS
) = 15V, V
SS
= COM, DT= V
SS
and T
A
= 25°C unless otherwise specified. The V
IL
, V
IH
and I
IN
parameters are referenced to V
SS
/COM and are applicable to the respective input leads: IN and SD. The V
O
, I
O
and Ron
parameters are referenced to COM and are applicable to the respective output leads: HO and LO.
Symbol
V
IH
V
IL
V
SD,TH+
V
SD,TH-
V
OH
V
OL
I
LK
I
QBS
I
QCC
I
IN+
I
IN-
V
CCUV+
V
BSUV+
V
CCUV-
V
BSUV-
V
CCUVH
V
BSUVH
I
O+
I
O-
Definition
Logic “1” input voltage for HO & logic “0” for LO
Logic “0” input voltage for HO & logic “1” for LO
SD input positive going threshold
SD input negative going threshold
High level output voltage, V
BIAS
- V
O
Low level output voltage, V
O
Offset supply leakage current
Quiescent V
BS
supply current
Quiescent V
CC
supply current
Logic “1” input bias current
Logic “0” input bias current
V
CC
and V
BS
supply undervoltage positive going
threshold
V
CC
and V
BS
supply undervoltage negative going
threshold
Hysteresis
Output high short circuit pulsed current
Output low short circuit pulsed current
Min. Typ. Max. Units Test Conditions
2.7
—
2.7
—
—
—
—
20
0.4
—
—
8.0
7.4
0.3
1.4
1.8
—
—
—
—
—
—
—
60
1.0
25
—
8.9
8.2
0.7
1.9
2.3
—
0.8
—
0.8
1.2
0.1
50
150
1.6
60
1.0
9.8
9.0
—
—
—
A
V
µA
mA
µA
V
V
CC
= 10V to 20V
V
CC
= 10V to 20V
V
CC
= 10V to 20V
V
CC
= 10V to 20V
I
O
= 0A
I
O
= 0A
V
B
= V
S
= 600V
V
IN
= 0V or 5V
V
IN
= 0V or 5V
IN = 5V, SD = 0V
IN = 0V, SD = 5V
V
O
= 0V,
PW
≤
10
µs
V
O
= 15V,
PW
≤
10
µs
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3
IR2184
(
4
)(S) & (PbF)
Functional Block Diagrams
VB
2184
IN
VSS/COM
LEVEL
SHIFT
HV
LEVEL
SHIFTER
PULSE
GENERATOR
UV
DETECT
R
PULSE
FILTER
R
S
Q
HO
VS
DEADTIME
UV
DETECT
VCC
+5V
LO
SD
VSS/COM
LEVEL
SHIFT
DELAY
COM
VB
21844
IN
VSS/COM
LEVEL
SHIFT
HV
LEVEL
SHIFTER
PULSE
GENERATOR
UV
DETECT
R
PULSE
FILTER
R
S
Q
HO
VS
DT
+5V
DEADTIME
UV
DETECT
VCC
LO
SD
VSS/COM
LEVEL
SHIFT
DELAY
COM
VSS
4
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IR2184
(
4
)(S) & (PbF)
Lead Definitions
Symbol Description
IN
SD
DT
VSS
V
B
HO
V
S
V
CC
LO
COM
Logic input for high and low side gate driver outputs (HO and LO), in phase with HO (referenced to COM
for IR2184 and VSS for IR21844)
Logic input for shutdown (referenced to
COM for IR2184 and VSS for IR21844)
Programmable dead-time lead, referenced to VSS. (IR21
84
4 only)
Logic Ground (21
84
4 only)
High side floating supply
High side gate drive output
High side floating supply return
Low side and logic fixed supply
Low side gate drive output
Low side return
Lead Assignments
1
2
3
4
IN
SD
COM
LO
VB
HO
VS
VCC
8
7
6
5
1
2
3
4
IN
SD
COM
LO
VB
HO
VS
VCC
8
7
6
5
8-Lead PDIP
8-Lead SOIC
IR2184
1
2
3
4
5
6
7
IN
SD
VSS
DT
COM
LO
VCC
VB
HO
VS
IR2184S
1
4
13
12
11
10
9
8
1
2
3
4
5
6
7
IN
SD
VSS
DT
COM
LO
VCC
VB
HO
VS
1
4
13
12
11
10
9
8
14-Lead PDIP
14-Lead SOIC
IR21844
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IR21844S
5
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