PD - 9.1642A
IRFR/U3303
HEXFET
®
Power MOSFET
l
l
l
l
l
l
Ultra Low On-Resistance
Surface Mount (IRFR3303)
Straight Lead (IRFU3033)
Advanced Process Technology
Fast Switching
Fully Avalanche Rated
D
V
DSS
= 30V
R
DS(on)
= 0.031Ω
G
I
D
= 33A
S
Description
Fifth Generation HEXFETs from International Rectifier
utilize advanced processing techniques to achieve
extremely low on-resistance per silicon area. This benefit,
combined with the fast switching speed and ruggedized
device design that HEXFET Power MOSFETs are well
known for, provides the designer with an extremely efficient
and reliable device for use in a wide variety of applications.
The D-Pak is designed for surface mounting using vapor
phase, infrared, or wave soldering techniques. The straight
lead version (IRFU series) is for through-hole mounting
applications. Power dissipation levels up to 1.5 watts are
possible in typical surface mount applications.
D -P a k
T O -2 52 A A
I-P a k
TO -2 5 1 A A
Absolute Maximum Ratings
Parameter
I
D
@ T
C
= 25°C
I
D
@ T
C
= 100°C
I
DM
P
D
@T
C
= 25°C
V
GS
E
AS
I
AR
E
AR
dv/dt
T
J
T
STG
Continuous Drain Current, V
GS
@ 10V
Continuous Drain Current, V
GS
@ 10V
Pulsed Drain Current
Power Dissipation
Linear Derating Factor
Gate-to-Source Voltage
Single Pulse Avalanche Energy
Avalanche Current
Repetitive Avalanche Energy
Peak Diode Recovery dv/dt
Operating Junction and
Storage Temperature Range
Soldering Temperature, for 10 seconds
Max.
33
21
120
57
0.45
± 20
95
18
5.7
5.0
-55 to + 150
300 (1.6mm from case )
Units
A
W
W/°C
V
mJ
A
mJ
V/ns
°C
Thermal Resistance
Parameter
R
θJC
R
θJA
R
θJA
Junction-to-Case
Junction-to-Ambient (PCB mount)**
Junction-to-Ambient
Typ.
–––
–––
–––
Max.
2.2
50
110
Units
°C/W
8/25/97
IRFR/U3303
Electrical Characteristics @ T
J
= 25°C (unless otherwise specified)
V
(BR)DSS
∆V
(BR)DSS
/∆T
J
R
DS(on)
V
GS(th)
g
fs
I
DSS
I
GSS
Q
g
Q
gs
Q
gd
t
d(on)
t
r
t
d(off)
t
f
L
D
L
S
C
iss
C
oss
C
rss
Parameter
Drain-to-Source Breakdown Voltage
Breakdown Voltage Temp. Coefficient
Static Drain-to-Source On-Resistance
Gate Threshold Voltage
Forward Transconductance
Drain-to-Source Leakage Current
Gate-to-Source Forward Leakage
Gate-to-Source Reverse Leakage
Total Gate Charge
Gate-to-Source Charge
Gate-to-Drain ("Miller") Charge
Turn-On Delay Time
Rise Time
Turn-Off Delay Time
Fall Time
Internal Drain Inductance
Internal Source Inductance
Input Capacitance
Output Capacitance
Reverse Transfer Capacitance
Min.
30
–––
–––
2.0
9.3
–––
–––
–––
–––
–––
–––
–––
–––
–––
–––
–––
–––
–––
–––
–––
–––
Typ.
–––
0.032
–––
–––
–––
–––
–––
–––
–––
–––
–––
–––
11
99
16
28
4.5
7.5
750
400
140
Max. Units
Conditions
–––
V
V
GS
= 0V, I
D
= 250µA
––– V/°C Reference to 25°C, I
D
= 1mA
0.031
Ω
V
GS
= 10V, I
D
= 18A
4.0
V
V
DS
= V
GS
, I
D
= 250µA
–––
S
V
DS
= 25V, I
D
= 18A
25
V
DS
= 30V, V
GS
= 0V
µA
250
V
DS
= 24V, V
GS
= 0V, T
J
= 150°C
100
V
GS
= 20V
nA
-100
V
GS
= -20V
29
I
D
= 18A
7.3
nC V
DS
= 24V
13
V
GS
= 10V, See Fig. 6 and 13
–––
V
DD
= 15V
–––
I
D
= 18A
ns
–––
R
G
= 13Ω
–––
R
D
= 0.8Ω, See Fig. 10
Between lead,
–––
6mm (0.25in.)
nH
G
from package
–––
and center of die contact
–––
V
GS
= 0V
–––
pF
V
DS
= 25V
–––
ƒ = 1.0MHz, See Fig. 5
D
S
Source-Drain Ratings and Characteristics
I
S
I
SM
V
SD
t
rr
Q
rr
t
on
Parameter
Continuous Source Current
(Body Diode)
Pulsed Source Current
(Body Diode)
Diode Forward Voltage
Reverse Recovery Time
Reverse RecoveryCharge
Forward Turn-On Time
Min. Typ. Max. Units
Conditions
D
MOSFET symbol
––– ––– 33
showing the
A
G
integral reverse
––– ––– 120
p-n junction diode.
S
––– ––– 1.3
V
T
J
= 25°C, I
S
= 18A, V
GS
= 0V
––– 53
80
ns
T
J
= 25°C, I
F
= 18A
––– 94 140
nC di/dt = 100A/µs
Intrinsic turn-on time is negligible (turn-on is dominated by L
S
+L
D
)
Notes:
Pulse width
≤
300µs; duty cycle
≤
2%.
Repetitive rating; pulse width limited by
max. junction temperature. ( See fig. 11 )
Starting T
J
= 25°C, L = 590µH
Caculated continuous current based on maximum allowable junction
R
G
= 25Ω, I
AS
= 18A. (See Figure 12)
temperature; Package limitation current = 20A.
I
SD
≤
18A, di/dt
≤
140A/µs, V
DD
≤
V
(BR)DSS
,
This is applied for I-PAK, L
S
of D-PAK is measured between
T
J
≤
150°C
lead and center of die contact
** When mounted on 1" square PCB (FR-4 or G-10 Material ) .
For recommended footprint and soldering techniques refer to application note #AN-994
IRFR/U3303
1000
TOP
I
D
, Drain-to-Source Current (A)
100
BOTTOM
I
D
, Drain-to-Source Current (A)
VGS
15V
10V
8.0V
7.0V
6.0V
5.5V
5.0V
4.5V
1000
TOP
BOTTOM
VGS
15V
10V
8.0V
7.0V
6.0V
5.5V
5.0V
4.5V
100
10
1
10
0.1
4.5V
20µs PULSE WIDTH
T
J
= 25
°
C
1
10
100
0.01
0.1
1
0.1
4.5V
1
20µs PULSE WIDTH
T
J
= 150
°
C
10
100
V
DS
, Drain-to-Source Voltage (V)
V
DS
, Drain-to-Source Voltage (V)
Fig 1.
Typical Output Characteristics
Fig 2.
Typical Output Characteristics
100
2.0
R
DS(on)
, Drain-to-Source On Resistance
(Normalized)
I
D
= 30A
I
D
, Drain-to-Source Current (A)
10
T
J
= 150
°
C
1.5
1.0
T
J
= 25
°
C
1
0.5
0.1
4
5
6
7
V DS = 15V
25V
20µs PULSE WIDTH
8
9
10
0.0
-60 -40 -20
V
GS
= 10V
0
20
40
60 80 100 120 140 160
V
GS
, Gate-to-Source Voltage (V)
T
J
, Junction Temperature (
°
C)
Fig 3.
Typical Transfer Characteristics
Fig 4.
Normalized On-Resistance
Vs. Temperature
IRFR/U3303
1400
1200
V
GS
, Gate-to-Source Voltage (V)
V
GS
C
iss
C
rss
C
oss
= 0V,
f = 1MHz
= C
gs
+ C
gd ,
C
ds
SHORTED
= C
gd
= C
ds
+ C
gd
20
I
D
= 18A
V
DS
= 24V
V
DS
= 15V
16
C, Capacitance (pF)
1000
800
Ciss
Coss
12
600
8
400
200
Crss
4
0
1
10
100
0
0
5
10
15
FOR TEST CIRCUIT
SEE FIGURE 13
20
25
30
V
DS
, Drain-to-Source Voltage (V)
Q
G
, Total Gate Charge (nC)
Fig 5.
Typical Capacitance Vs.
Drain-to-Source Voltage
Fig 6.
Typical Gate Charge Vs.
Gate-to-Source Voltage
1000
1000
I
SD
, Reverse Drain Current (A)
T
J
= 25
°
C
T
J
= 150
°
C
OPERATION IN THIS AREA LIMITED
BY R
DS(on)
100
I
D
, Drain Current (A)
100
10us
10
100us
10
1ms
1
0.1
0.0
V
GS
= 0 V
1.0
2.0
3.0
4.0
5.0
1
1
T
C
= 25 °C
T
J
= 150 °C
Single Pulse
10
10ms
100
V
SD
,Source-to-Drain Voltage (V)
V
DS
, Drain-to-Source Voltage (V)
Fig 7.
Typical Source-Drain Diode
Forward Voltage
Fig 8.
Maximum Safe Operating Area
IRFR/U3303
35
LIMITED BY PACKAGE
30
V
DS
V
GS
R
G
R
D
D.U.T.
+
I
D
, Drain Current (A)
25
-
V
DD
20
10V
Pulse Width
≤ 1
µs
Duty Factor
≤ 0.1 %
15
10
Fig 10a.
Switching Time Test Circuit
V
DS
5
90%
0
25
50
75
100
125
150
T
C
, Case Temperature
( ° C)
10%
V
GS
t
d(on)
t
r
t
d(off)
t
f
Fig 9.
Maximum Drain Current Vs.
Case Temperature
Fig 10b.
Switching Time Waveforms
10
(Z
thJC
)
1
D = 0.50
0.20
0.10
0.05
P
DM
SINGLE PULSE
(THERMAL RESPONSE)
t
1
t
2
Notes:
1. Duty factor D = t
1
/ t
2
2. Peak T
J
= P
DM
x Z
thJC
+ T
C
0.0001
0.001
0.01
0.1
Thermal Response
0.1
0.02
0.01
0.01
0.00001
t
1
, Rectangular Pulse Duration (sec)
Fig 11.
Maximum Effective Transient Thermal Impedance, Junction-to-Case
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