Data Sheet No. PD60170-G
IR2137/IR2237
(J)(Q)
Features
•
Floating channel up to +600V or +1200V
•
“soft” over-current shutdown turns off all six
•
•
•
•
•
•
•
•
outputs
Integrated high side desaturation circuit
Controlled “soft” turn on for EMI reduction
Integrated brake IGBT driver
Three independent low side COM pins
Separate pull-up/pull-down output drive pins
Matched delay outputs
3.3V logic compatible
Under voltage lockout with hysteresis band
3-PHASE BRIDGE DRIVER
Product Summary
VOFFSET
IO+/-
VOUT
Brake Io+/-
Matched delay
Deadtime (typ.)
DESAT Blanking time (typ.)
DESAT input voltage
threshold (typ.)
600V max. or 1200V max.
220mA / 460mA
12.5V - 20V
40mA/80mA
75nsec
300 nsec
2.0usec
Vt+ = 5.0V
Description
The IR2137/IR2237(J)(Q) are a high voltage, high
speed 3-phase IGBT driver best suited for AC motor
drive applications. Integrated desaturation logic pro-
vides ground fault protection as well as other mode of
over current protection. Soft shutdown is initiated in
the event of any overcurrent/ground fault conditions,
and all six outputs are simultaneously turned off. Out-
put drivers have separate turn on/off pins to facilitate
independent gate drive impedance with EMI soft turn
on. Optimum matched delays between phases, and
between high/low side enables small deadtime, thus
improving low speed performance. The brake driver
eliminates additional circuits.
Packages
64-Lead MQFP
68-Lead PLCC
Typical Connection
15V
3
3
VCC
LIN1,2,3
VB1,2,3
HOP1,2,3
HIN1,2,3
HON1,2,3
SD
FAULT
FLTCLR
ITRIP
BRIN
HSSD1,2,3
uP,Control
DC
BUS
3
2137/
2237
W
V
U
Motor
DESAT1,2,3
VS1,2,3
LOP1,2,3
BR
COM
LON1,2,3
LSSD1,2,3
LS1,2,3
GND
VSS
Current Feedback
(Refer to Lead Assignments for correct pin configuration). This/These diagram(s) show electrical connections only.
Please refer to our Application Notes and DesignTips for proper circuit board layout.
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1
IR2137/IR2237
(J)(Q)
Absolute Maximum Ratings
Absolute maximum ratings indicate sustained limits beyond which damage to the device may occur. All voltage parameters
are absolute voltages referenced to COM. The thermal resistance and power dissipation ratings are measured under board
mounted and still air conditions.
Symbol
V
S1,2,3
V
B1,2,3
V
HO
V
CC
V
SS
V
LO1,2,3
V
IN
High side offset voltage
Definition
High side floating supply voltage (IR2137)
(IR2237)
High side floating output voltage (HOP, HON, HSSD)
Low side and logic fixed supply voltage
Logic ground
Low side output voltage (LOP, LON, LSSD)
Logic input voltage (HIN, LIN,SD, ITRIP, FLTCLR, BRIN)
Min.
V
B1,2,3
-25
-0.3
-0.3
V
S1,2,3
- 0.3
-0.3
V
CC
- 25
V
LS1,2,3
-0.3
V
SS
- 0.3
Max.
V
B1,2,3
+0.3
625
1225
V
B1,2,3
+ 0.3
25
V
CC
+ 0.3
V
CC
+ 0.3
(V
SS
+ 15) or
(V
CC
+ 0.3)
which ever is
lower
V
CC
+ 0.3
V
B1,2,3
+ 0.3
V
CC
+ 0.3
V
CC
+ 0.3
50
2.0
3.0
Units
V
V
FLT
V
DESAT
V
BR
V
LS1,2,3
dV/dt
P
D
Rth
JA
T
J
T
S
T
L
FAULT output voltage
DESAT input voltage
BRAKE output voltage
Low side output return voltage
Allowable offset supply voltage slew rate
Package power dissipation @ T
A
≤
+25
°
C
Thermal resistance, junction to ambient
Junction temperature
Storage temperature
Lead temperature (soldering, 10 seconds)
(MQFP64)
(PLCC68)
(MQFP64)
(PLCC68)
V
SS
- 0.3
V
S1,2,3
- 0.3
- 0.3
V
CC
- 25
—
—
—
—
—
-55
—
V/ns
W
°
C/W
60
40
150
150
300
°
C
Recommended Operating Conditions
The Input/Output logic timing diagram is shown in figure 1. For proper operation the device should be used within the recom-
mended conditions. All voltage parameters are absolute voltages referenced to COM. The V
S
offset rating is tested with all
supplies biased at 15V differential.
Symbol
V
B1,2,3
V
S1,2,3
V
HO1,2,3
V
LO1,2,3
V
CC
V
SS
V
IN
V
BR
Definition
High side floating supply voltage
High side floating supply offset voltage
(IR2137)
(IR2237)
High side output voltage (HOP, HON, HSSD)
Low side output voltage (LOP, LON, LSSD)
Low side and logic fixed supply voltage
Logic ground
Logic input voltage (HIN, LIN,SD, ITRIP, FLTCLR, BRIN)
BRAKE output voltage
Min.
V
S1,2,3
+ 13
Note 1
Note 1
V
S1,2,3
V
LS1,2,3
12.5
-5
V
SS
0
Max.
V
S1,2,3
+ 20
600
1200
V
S1,2,3
+ 20
V
CC
20
+5
V
SS
+ 5
V
CC
Units
V
2
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IR2137/IR2237
(J)(Q)
Recommended Operating Conditions
The Input/Output logic timing diagram is shown in figure 1. For proper operation the device should be used within the recom-
mended conditions. All voltage parameters are absolute voltages referenced to COM. The V
S
offset rating is tested with all
supplies biased at 15V differential.
Symbol
V
FLT
V
LS1,2,3
V
DESAT
T
A
FAULT output voltage
Definition
Low side output return voltage
DESAT pin input voltage
Ambient temperature
Min.
V
SS
-5.0
V
S1,2,3
-40
Max.
V
CC
+5.0
V
B1,2,3
125
Units
V
°
C
Note 1: Logic operational for V
S
of COM -5 to COM +600V/+1200V. Logic state held for V
S
of COM -5V to -COM V
BS
.
Note 2: All input pins are internally clamped with a 5.2V zener diode.
Static Electrical Characteristics
V
BIAS
(V
CC
, V
BS
1,2,3) = 15V and TA = 25
o
C unless otherwise specified. The V
IN
, V
TH
and I
IN
parameters are
referenced to V
SS
/COM and are applicable to all six channels (HOP/HON1,2,3 and LOP/LON1,2,3). The V
O
and I
O
parameters are referenced to V
LS
1,2,3 and V
S
1,2,3 and are applicable to the respective output leads: H
O1,2,3
and
L
O1,2,3.
V
DESAT
and I
DESAT
parameters are referenced to V
S1,2,3
Symbol
V
CCUV+
V
CCUV-
V
CCUVH
V
BSUV+
V
BSUV-
V
BSUVH
I
LK
Definition
V
CC
supply undervoltage positive going threshold
V
CC
supply undervoltage negative going threshold
V
CC
supply undervoltage lockout hysteresis
V
BS
supply undervoltage positive going threshold
V
BS
supply undervoltage negative going threshold
V
BS
supply undervoltage lockout hysteresis
Offset supply leakage current
(IR2137)
(IR2237)
Min. Typ. Max. Units Test Conditions
10.3
9.5
—
10.3
9.5
—
—
—
—
—
3.15
11.4
10.4
1.0
11.4
10.4
1.0
—
—
120
2
—
12.5
11.3
—
12.5
11.3
—
50
µA
50
200
6
—
mA
V
B1,2,3
= V
S1,2,3
= 600V
V
B1,2,3
= V
S1,2,3
= 1200V
V
I
QBS
I
QCC
V
IH
V
IL
Vt
+
Vt
-
V
T
Quiescent V
BS
supply current
Quiescent V
CC
supply current
Logic “0” input voltage (OUT=LO)
(HIN,LIN,ITRIP,SD,BRIN,FLTCLR)
Logic “1” input voltage (OUT=HI)
(HIN,LIN,ITRIP,SD,BRIN,FLTCLR)
Logic input positive going threshold
(HIN,LIN,ITRIP,SD,BRIN,FLTCLR)
Logic input negative going threshold
(HIN,LIN,ITRIP,SD,BRIN,FLTCLR)
Logic input hysteresis
(HIN,LIN,ITRIP,SD,BRIN,FLTCLR)
—
—
0.8
V
V
CC
= 12.5 to 20V
1.6
2.5
3.1
0.9
1.5
2.4
0.7
1.0
—
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3
IR2137/IR2237
(J)(Q)
Static Electrical Characteristics - cont.
V
BIAS
(V
CC
, V
BS
1,2,3) = 15V and TA = 25
o
C unless otherwise specified. The V
IN
, V
TH
and I
IN
parameters are
referenced to V
SS
/COM and are applicable to all six channels (HOP/HON1,2,3 and LOP/LON1,2,3). The V
O
and I
O
parameters are referenced to V
LS
1,2,3 and V
S
1,2,3 and are applicable to the respective output leads: H
O1,2,3
and
L
O1,2,3.
V
DESAT
and I
DESAT
parameters are referenced to V
S1,2,3
Symbol
V
OH
V
OL
I
IN+
I
IN-
I
DESAT+
I
DESAT-
I
O+
I
O-
I
OBR+
I
OBR-
V
OHB
V
OLB
R
ON,SS
R
ON,FLT
V
DESAT+
Definition
High level output voltage, V
BIAS
- V
O
(normal switching) HOP, LOP
Low level output voltage, V
O
(normal switching) HON, LON
Logic “1” input bias current
Logic “0” input bias current
“high” DESAT input bias current
“low” DESAT input bias current
Output high short circuit pulsed current
Output low short circuit pulsed current
Min. Typ. Max. Units Test Conditions
—
—
100
mV
I
O
= 1 mA
—
—
100
—
—
—
—
220
460
150
80
—
—
300
550
—
—
15
.1
—
—
mA
µA
V
IN
= 0V
V
IN
= 5V
V
DESAT
= 15V
V
DESAT
= 0V
V
O
= 0V, V
IN
= 0V
PW
≤
10
µ
s
V
O
= 15V, V
IN
= 5V
PW
≤
10
µ
s
V
BR
=0V, V
BRIN
=0V
PW
≤
10
µ
s
V
BR
=15V,V
BRIN
=5V
PW
≤
10
µ
s
BR output high short circuit pulsed current
40
75
—
BR output low short circuit pulsed current
80
120
—
BR high level output voltage, V
BIAS
-V
BR
BR low level output voltage, V
BR
Soft shutdown on resistance
FAULT low on resistance
High DESAT input threshold voltage
—
—
—
—
—
—
—
500
60
5.2
300
150
—
—
—
Ω
V
mV
I
BR
= 1mA
ITRIP = 0V
4
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IR2137/IR2237
(J)(Q)
AC Electrical Characteristics
V
BIAS
(V
CC,
V
BS )
= 15V, V
S1,2,3
= V
SS
, TA = 25
o
C and C
L
= 1000 pF unless otherwise specified.
Symbol
Definition
Propagation Delay Characteristics
ton
toff
tr
tf
tITRIP
tSD
tDESAT1
tDESAT2
tFLT, IT
Turn-on propagation delay
Turn-off propagation delay
Turn-on rise time
Turn-off fall time
ITRIP to output shutdown propagation delay
Min.
150
150
—
—
—
Typ.
400
400
115
25
1000
Max. Units Test Conditions
600
600
—
—
1400
V
IN
= 0 & 5V
V
S1,2,3
= 0 to 600V
or 1200V
HOP=HON,LOP=LON
Figure 4
V
IN
,V
DESAT
=0
V
SD
= 5V
V
IN
,V
DESAT
= 0
V
ITRIP
= 5V, fig. 7
V
S1,2,3
= 0=to 600V
ITRIP 5V
or 1200V
V
HIN
= 0V,
V
SD
, V
ITRIP
= 5V,
V
DESAT
= 15V, fig. 5
V
IN
,V
ITRIP
=0V,
ns
V
SD
= 5V,
V
DESAT
= 0V, fig. 7
V
SD
= 5V,
V
DESAT
= 0V, fig. 7
SD to output shutdown propagation delay
—
1200
1500
DESAT to output shutdown propagation delay
at HOPx turn-on
DESAT to output shutdown propagation delay
after blanking
ITRIP to FAULT output delay
1400
2800
4200
600
1150
1700
—
800
1100
tFLTCLR
FLTCLR to FAULT output delay
—
1100
1400
tFLT,DESAT1 DESAT to FAULT output delay propagation delay
at HOPx turn-on
tFLT,DESAT2 DESAT to FAULT output delay propagation delay
after blanking
tBL
tonBR
toffBR
trBR
tfBR
DT
MDT
DESAT blanking time at turn-on
BR output turn-on propagation delay
BR output turn-off propagation delay
BR output turn-on rise time
BR output turn-off fall time
—
2500
—
—
850
—
—
—
—
—
—
2000
120
85
300
150
—
200
150
—
—
V
S1,2,3
= 0 to 600V
or 1200V
V
IN
= 0V,
V
SD
, V
ITRIP
= 5V,
V
DESAT
= 15V,
Figure 5
Figure 4
Deadtime/Delay Matching Characteristics
Deadtime
Matching delay, max (ton,toff) - min (ton,toff),
(ton,toff are applicable to all six channels)
Output pulse width matching, IPWin - PWoutl
(exclude BRIN/BR)
—
—
300
0
—
75
ns
—
0
75
Figure 6
External dead time
>400nsec
External dead time
>400nsec, Fig. 4
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