NCP718
Low Dropout Regulator, Wide
Input Voltage, Low Iq,
300 mA
The NCP718 is 300 mA LDO Linear Voltage Regulator. It is a very
stable and accurate device with ultra−low quiescent current
consumption (typ. 4
mA
over the full temperature range) and a wide
input voltage range (up to 24 V). The regulator incorporates several
protection features such as Thermal Shutdown and Current Limiting.
Features
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MARKING
DIAGRAMS
WDFN6
MT SUFFIX
CASE 511BR
1
XX = Specific Device Code
M = Date Code
TSOT−23−5
SN SUFFIX
CASE 419AE
XX MG
G
1
1
XX M
•
•
•
•
•
•
•
•
•
•
•
•
•
•
Operating Input Voltage Range: 2.5 V to 24 V
Fixed Voltage Options Available: 1.2 V to 5 V (upon request)
Adjustable Voltage Option from 1.2 V to 5 V
Ultra−Low Quiescent Current: typ. 4
mA
over Temperature
±2%
Accuracy Over Full Load, Line and Temperature Variations
PSRR: 60 dB at 1 kHz
Noise: typ. 36
mV
RMS
from 100 Hz to 100 kHz
Stable with Small 1
mF
Ceramic Capacitor
Soft−start to Reduce Inrush Current and Overshoots
Thermal Shutdown and Current Limit Protection
SOA Limiting for High Vin / High Iout – Static / Dynamic
Active Discharge Option Available (upon request)
Available in TSOT−23−5 and WDFN6 2x2 mm Packages
These Devices are Pb−Free, Halogen Free/BFR Free and are RoHS
Compliant
1
XX = Specific Device Code
M = Date Code*
G
= Pb−Free Package
(Note: Microdot may be in either location)
*Date Code orientation and/or position may
vary depending upon manufacturing location.
Typical Applications
PIN CONNECTIONS
OUT
NC/ADJ
GND
IN
OUT
NCP718
EN
ON
GND
NC
C
OUT
V
OUT
1
mF
Ceramic
1
2
3
6
•
Wireless Chargers
•
Portable Equipment
•
Communication Systems
V
IN
IN
NC
EN
GND
5
4
WDFN6 2x2 mm
(Top View)
C
IN
1
mF
Ceramic
OFF
IN
GND
OUT
Figure 1. Typical Application Schematic
EN
TSOT−23−5
(Top View)
NC/ADJ
ORDERING INFORMATION
See detailed ordering and shipping information in the package
dimensions section on page 7 of this data sheet.
©
Semiconductor Components Industries, LLC, 2017
November, 2018
−
Rev. 7
1
Publication Order Number:
NCP718/D
NCP718
IN
EN
BANDGAP
REFERENCE
ENABLE
LOGIC
THERMAL
SHUTDOWN
IN
EN
BANDGAP
REFERENCE
ENABLE
LOGIC
THERMAL
SHUTDOWN
INTEGRATED
SOFT−
START
MOSFET
DRIVER WITH
CURRENT LIMIT
INTEGRATED
SOFT−
START
MOSFET
DRIVER WITH
CURRENT LIMIT
OUT
* ACTIVE DISCHARGE
Version A only
* ACTIVE DISCHARGE
Version A only
OUT
ADJ
EN
EN
GND
GND
Fixed Version
Adjustable Version
Figure 2. Simplified Block Diagram
Table 1. PIN FUNCTION DESCRIPTION
Pin No.
(WDFN6)
6
3, EXP
4
2
Pin No.
(TSOT−23−5)
1
2
3
4
Pin Name
IN
GND
EN
NC / ADJ
Description
Input pin. A small capacitor is needed from this pin to ground to assure stability.
Power supply ground.
Enable pin. Driving this pin high turns on the regulator. Driving EN pin low puts the regulator
into shutdown mode.
Fixed Version: No connection. This pin can be tied to ground to improve thermal dissipation
or left disconnected.
Adjustable Version: Feedback pin for set−up output voltage. Use resistor divider for voltage
selection.
Regulated output voltage pin. A small 1
mF
ceramic capacitor is needed from this pin to
ground to assure stability.
No connection. This pin can be tied to ground to improve thermal dissipation or left dis-
connected.
1
5
5
−
OUT
N/C
Table 2. ABSOLUTE MAXIMUM RATINGS
Rating
Input Voltage (Note 1)
Enable Voltage
Output Voltage
Output Short Circuit Duration
Maximum Junction Temperature
Storage Temperature
ESD Capability, Human Body Model (Note 2)
ESD Capability, Charged Device Model (Note 2)
Symbol
V
IN
V
EN
V
OUT
t
SC
T
J(MAX)
T
STG
ESD
HBM
ESD
CDM
Value
−0.3
to 24
−0.3
to V
IN+0.3
−0.3
to V
IN+0.3
(max. 6)
Indefinite
150
−55
to 150
2000
1000
Unit
V
V
V
s
°C
°C
V
V
Stresses exceeding those listed in the Maximum Ratings table may damage the device. If any of these limits are exceeded, device functionality
should not be assumed, damage may occur and reliability may be affected.
1. Refer to ELECTRICAL CHARACTERISTICS and APPLICATION INFORMATION for Safe Operating Area.
2. This device series incorporates ESD protection and is tested by the following methods:
ESD Human Body Model tested per AEC−Q100−002 (EIA/JESD22−A114)
ESD Charged Device Model tested per EIA/JESD22−C101, Field Induced Charge Model.
Latch up Current Maximum Rating tested per JEDEC standard: JESD78. Latch−up is not guaranteed on ENABLE pin.
Table 3. THERMAL CHARACTERISTICS
Rating
Thermal Characteristics, WDFN6, 2 mm x 2 mm
Thermal Resistance, Junction−to−Air
Thermal Characteristics, TSOT−23−5
Thermal Resistance, Junction−to−Air
Symbol
R
qJA
R
qJA
Value
65
235
Unit
°C/W
°C/W
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2
NCP718
Table 4. ELECTRICAL CHARACTERISTICS
-40°C
≤
T
J
≤
125°C; V
IN
= 2.5 V or (V
OUT
+ 1.0 V), whatever is greater; I
OUT
= 1 mA,
C
IN
= C
OUT
= 1
mF,
unless otherwise noted. Typical values are at T
J
= +25°C. (Note 3)
Parameter
Operating Input Voltage
Output Voltage Accuracy
(fixed versions)
Reference Voltage
Reference Voltage Accuracy
Line Regulation
Load Regulation
Dropout Voltage
(Package TSOT−23−5)
−40°C
≤
T
J
≤
125°C,
V
OUT
< 1.8 V
V
OUT
+ 1 V < V
IN
< 16 V,
0.1 mA < I
OUT
< 300 mA (Note 5) V
OUT
≥
1.8 V
−40°C
≤
T
J
≤
125°C,
V
OUT
+ 1 V < V
IN
< 16 V
−40°C
≤
T
J
≤
125°C,
V
OUT
+ 1 V < V
IN
< 16 V
V
OUT
+ 1 V
≤
V
IN
≤
16 V, Iout = 1 mA
I
OUT
= 0.1 mA to 300 mA
V
DO
= V
IN
– (V
OUT(NOM)
– 3%),
I
OUT
= 300 mA (Note 4)
2.1 V – 2.4 V
2.5 V
−
2.7 V
2.8 V
−
3.2 V
3.3 V – 4.9 V
5V
Dropout Voltage
(Package WDFN6)
V
DO
= V
IN
– (V
OUT(NOM)
– 3%),
I
OUT
= 300 mA (Note 4)
2.1 V – 2.4 V
2.5 V
−
2.7 V
2.8 V
−
3.2 V
3.3 V – 4.9 V
5V
Maximum Output Current
Disable Current
Quiescent Current
Ground current
V
IN
= V
OUT
+ 1 V (Note 5)
V
EN
= 0 V, V
IN
= 5 V
I
OUT
=
0
mA,
−40°C
≤
T
J
≤
125°C
I
OUT
= 10 mA
I
OUT
= 300 mA
Power Supply Rejection Ratio
V
IN
= 3.5 V + 100 mVpp
V
OUT
= 2.5 V
I
OUT
= 1 mA, Cout = 1
mF
f = 1 kHz
PSRR
I
LIM
I
DIS
I
Q
I
GND
300
0.1
4.0
50
300
60
dB
V
DO
Test Conditions
Symbol
V
IN
V
OUT
Min
2.5
−3%
−2%
V
ADJ
V
OUT
Reg
LINE
Reg
LOAD
V
DO
−2%
10
10
480
320
295
275
250
490
335
305
285
260
505
475
450
395
800
1.0
8.0
mA
mA
mA
mA
490
465
440
380
mV
1.2
+2%
Typ
Max
24
+3%
+2%
V
V
mV
mV
mV
Unit
V
V
Output Noise Voltage
Enable Input Threshold Voltage
V
OUT
= 1.2 V, I
OUT
= 10 mA
f = 100 Hz to 100 kHz
Voltage increasing
Voltage decreasing
V
N
V
EN_HI
V
EN_LO
I
ADJ
I
EN
Rdis
T
SD
T
SDH
−
1.2
−
36
−
−
0.1
100
100
165
25
−
−
0.4
1.0
mV
rms
V
ADJ Pin Current
EN Pin Current
Active Output Discharge
Resistance
Thermal Shutdown Temperature
(Note 6)
Thermal Shutdown Hysteresis
(Note 6)
V
IN
= V
OUT
+ 1 V
V
EN
= 5.5 V
V
IN
= 5.5 V, V
EN
= 0 V
Temperature increasing from T
J
= +25°C
Temperature falling from T
SD
mA
nA
W
°C
°C
Product parametric performance is indicated in the Electrical Characteristics for the listed test conditions, unless otherwise noted. Product
performance may not be indicated by the Electrical Characteristics if operated under different conditions.
3. Performance guaranteed over the indicated operating temperature range by design and/or characterization production tested at T
J
= T
A
=
25°C. Low duty cycle pulse techniques are used during testing to maintain the junction temperature as close to ambient as possible.
4. Voltage dropout for voltage variants below 2.1 V is given by minimum input voltage 2.5 V.
5. Respect SOA
6. Guaranteed by design and characterization.
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3
NCP718
TYPICAL CHARACTERISTICS
1.220
V
OUT
, OUTPUT VOLTAGE (V)
1.216
1.212
1.208
1.204
1.200
1.196
1.192
1.188
1.184
1.180
−40
−20
0
20
40
60
80
100
120
4.0
I
Q
, QUIESCENT CURRENT (mA)
3.8
3.6
3.4
3.2
3.0
2.8
2.6
2.4
2.2
2.0
V
OUT
= 1.2 V
C
IN
= 1
mF
C
OUT
= 1
mF
2
4
6
8
10
12
14
16
18
20
22 24
125°C
25°C
−40°C
V
IN
= 2.5 V
V
OUT
= 1.2 V
C
IN
= 1
mF
C
OUT
= 1
mF
I
OUT
= 1 mA
T
J
, JUNCTION TEMPERATURE (°C)
V
IN
, INPUT VOLTAGE (V)
Figure 3. Output Voltage vs. Temperature
−
V
OUT
= 1.2 V
1.0
I
DIS
, DISABLE CURRENT (mA)
0.9
0.8
0.7
0.6
0.5
0.4
0.3
0.2
0.1
0
−40 −20
V
IN
= 24 V
C
IN
= 1
mF
C
OUT
= 1
mF
0.10
0.09
I
EN
, ENABLE CURRENT (mA)
0.08
0.07
0.06
0.05
0.04
0.03
0.02
Figure 4. Quiescent Current vs. Input Voltage
V
EN
= V
IN
V
OUT
= 1.2 V
I
OUT
= 10 mA
C
IN
= 1
mF
C
OUT
= 1
mF
V
IN
= 24 V
V
IN
= 2.5 V
V
IN
= 2.5 V
0
20
40
60
80
100
120
0.01
0
−40
−20
0
20
40
60
80
100
120
T
J
, JUNCTION TEMPERATURE (°C)
T
J
, JUNCTION TEMPERATURE (°C)
Figure 5. Disable Current vs. Temperature
30
I
GND
, GROUND CURRENT (mA)
27
24
21
18
15
12
9
6
3
0
V
IN
= 2.5 V
V
OUT
= 1.2 V
C
IN
= 1
mF
C
OUT
= 1
mF
640
620
600
580
560
540
520
500
480
Figure 6. Current to Enable Pin vs.
Temperature
I
SC
, SHORT CIRCUIT CURRENT (mA)
V
IN
= 2.5 V
V
OUT
= 1.2 V
C
IN
= 1
mF
C
OUT
= 1
mF
0
1
2
3
4
5
6
7
8
9
10
460
440
−40 −20
0
20
40
60
80
100
120
I
OUT
, OUTPUT CURRENT (mA)
T
J
, JUNCTION TEMPERATURE (°C)
Figure 7. Ground Current vs. Output Current
−
V
OUT
= 1.2 V
Figure 8. Short Circuit Current vs.
Temperature
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4
NCP718
TYPICAL CHARACTERISTICS
600
V
DROP
, DROPOUT VOLTAGE (mV)
SOA CURRENT LIMITATION (mA)
540
480
420
360
300
240
180
120
60
0
f = 50 Hz
Duty = 20%
C
IN
= 1
mF
C
OUT
= 1
mF
0
2
4
6
8
10 12
14 16
18
20
22
24
0.40
0.36
0.32
0.28
0.24
0.20
0.16
0.12
0.08
0.04
0
−40°C
V
OUT
= 2.5 V
C
IN
= 1
mF
C
OUT
= 1
mF
125°C
25°C
0 0.04 0.08 0.12 0.16 0.20 0.24 0.28 0.32 0.36 0.40
I
OUT
, OUTPUT CURRENT (mA)
V
DIF
, DIFFERENTIAL VOLTAGE V
IN
−
V
OUT
(V)
Figure 9. SOA Current Limit vs. Differential
Voltage
90
RR, RIPPLE REJECTION (dB)
1 mA
10 mA
RR, RIPPLE REJECTION (dB)
80
70
60
50
40
30
20
10
0
V
IN
= 3.5 V
V
OUT
= 2.5 V
C
IN
= 1
mF
C
OUT
= 1
mF
MLCC, X7R, 0805
10
100
1K
10K
100K
100 mA
90
80
70
60
50
40
30
20
10
0
Figure 10. Dropout Voltage vs. Output Current
−
V
OUT
= 2.5 V
1 mA
10 mA
V
IN
= 12 V
V
OUT
= 2.5 V
C
IN
= 1
mF
C
OUT
= 1
mF
MLCC, X7R, 0805
10
100
1K
10K
100K
100 mA
1M
10M
1M
10M
FREQUENCY (Hz)
FREQUENCY (Hz)
Figure 11. Power Supply Rejection Ratio vs.
Current, V
IN
= 3.5 V, C
OUT
= 1
mF
100K
OUTPUT VOLTAGE NOISE (nV/√Hz)
OUTPUT VOLTAGE NOISE (nV/√Hz)
100K
Figure 12. Power Supply Rejection Ratio vs.
Current, V
IN
= 12 V, C
OUT
= 1
mF
10K
10K
1K
V
IN
= 2.5 V
V
OUT
= 1.2 V
I
OUT
= 10 mA
C
IN
= 1
mF
C
OUT
= 1
mF
MLCC, X7R, 0805
10
100
1K
10K
100K
1M
1K
100
100
V
IN
= 2.8 V
V
OUT
= 1.8 V
I
OUT
= 10 mA
C
IN
= 1
mF
C
OUT
= 1
mF
MLCC, X7R, 0805
10
100
1K
10K
100K
1M
10
10
FREQUENCY (Hz)
FREQUENCY (Hz)
Figure 13. Output Voltage Noise Spectral
Density for V
OUT
= 1.2 V, I
OUT
= 10 mA,
C
OUT
= 1
mF
Figure 14. Output Voltage Noise Spectral
Density for V
OUT
= 1.8 V, I
OUT
= 10 mA,
C
OUT
= 1
mF
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