MiWi click
PID: MIKROE-2924
Weight: 24 g
MiWi click
is a subgigahertz radio transceiver click board™, which offers a reliable FSK or
OOK communication solution, with the maximum data rates of 40kbps and 16kbps, respectively.
The radio transceiver module used on this click board™ has plenty of features that make it a
perfect choice for compact designs: It has very good reception sensitivity, an onboard PCB
antenna, high level of components integration, built in packet handling routines with automatic
CRC generation, 64 bytes of transmit/receive FIFO buffer, built in Sync Word recognition,
clock/data synchronisation and recovery and many more.
Armed with such a powerful, compact and fully configurable radio transceiver module, MiWi
click offers highly reliable radio communication over a short distance, which can be utilized in
many applications. It can be used for developing home/industrial/building automation
applications, data loggers, applications for remote keyless access, alarms, wireless remote
control and a wide variety of similar short-range radio applications.
Note:
This click board complies with European (ETSI EN 300-220) regulatory standards. For the
United States (FCC Part 15.247 and 15.249) regulatory standards compliant click board, please
visit the product page of the MiWi 2 click.
How does it work?
MiWi click features the MRF89XAM8A, a compact low-power sub-gigahertz radio transceiver
module from Microchip, that operates at a frequency range between 863MHz and 870MHz. This
module has all the necessary components onboard, including a small trace PCB antenna and
matching electronics, allowing compact design, while maintaining the flexibility. It supports
OOK and FSK signal modulation with data rates limited to 16kbps and 40kbps respectively, in
order to be compliant with the ETSI standards. The MRF89XAM8A module is based upon a
base architecture of the generic MRF89XA module, with a few modifications, applied in order to
make this module ETSI compliant.
The module uses the SPI communication protocol. However, it uses two chips select lines,
#CSCON - config block select and #CSDATA - data block select, used to access a different
group of internal registers. These two lines are routed to the mikroBUS™ AN and CS pins,
respectively. It should be noted that the device only supports SPI mode 0, 0 - which means that
the serial clock signal (SCK) is idle LOW. Pulling the #CSCON line to a LOW logic level will
enable communication with the configuration registers. Pulling the #CSDATA will enable host
communication with the FIFO buffer. If both chip select lines are pulled to a LOW logic level,
the #CSCON will have a priority over the #CSDATA.
The data processing section is used to interface the data from the MODEM
(modulator/demodulator) section, with the host MCU access point sections (SPI and IRQ
sections). The data processing section contains several control blocks that manage the data
traffic. The data processing section supports 2 modes of operation of which are available on the
MiWi click:
•
•
Buffered mode - the transmitting or received data is stored in the FIFO buffer and available via
the SPI
Packet mode - packets of certain structure are stored in the FIFO buffer, max 64 bytes
These modes affect the host MCU processing overhead. In the Buffered mode, the host MCU has
to manage sending or receiving of the preamble, Sync Word, and the actual payload, relying on
the IRQs to get the FIFO buffer status and manually managing the number of sent/received
bytes.
The FIFO (First In First Out) register performs parallel operations and it is 8 bits wide. However,
the RF demodulator section works only with serial data, sending and receiving the information
bit by bit, with the programmed rate. To interface FIFO buffer with the demodulator section, a
shift register has to be employed. The FIFO register serves as a buffer for both data transmission
and reception.
Two interrupt request lines (IRQ0 and IRQ1) of the MRF89XAM8A module are routed to the
mikroBUS™ pins INT and PWM, respectively. These pins can be configured to generate an
interrupt request to the host MCU, depending on the selected events. There are many interrupt
sources that can be selected to trigger an interrupt. Before using interrupts, they have to be
unmasked and enabled. All the interrupt sources and flags are configured through the Interrupt
Configuration registers.
RESET line from the module is routed to the mikroBUS™ RST pin and it is used to reset the
device. After the reset, the device is unavailable for about 5ms. To reset the device, this pin has
to be pulled to a HIGH logic level for at least 100 µs. It is pulled to a LOW logic level by the
pull-down resistor.
The OOK and FSK modulation protocols are commonly used subgigahertz protocols and each
has its own benefits. In OOK mode (On-Off Keying), the carrier signal is amplitude modulated
by switching between no carrier signal for the logical 0 and full carrier amplitude signal for the
logical 1. The FSK (Frequency Shift Keying) modulation is basically frequency modulation with
two different frequency values for the logical 0s and 1s. The MiWi click is able to modulate and
demodulate signals by using both of these protocols.
The provided libraries contain functions for an easy and simplified configuration of the MiWi
click. The included demo application can be used as a reference for future design and it
demonstrates usage of the provided functions.
Specifications
Type
RF Sub 1GHz
MiWi click can be used for developing home/industrial/building automation applications,
data loggers, applications for remote keyless access, alarms, wireless remote control and
a wide variety of similar short-range radio applications.
MRF89XAM8A, a compact low-power sub-gigahertz radio transceiver module from
Microchip
Applications
On-board
modules
MiWi click is a compact low power subgigahertz transceiver, loaded with functions such
Key Features as automatic packet handling, CRC generation, 64 bytes long FIFO buffer, great reception,
clock/data recovery, clock signal synchronization...
Interface
GPIO,SPI
Input Voltage 3.3V
Click board
size
L (57.15 x 25.4 mm)
Pinout diagram
This table shows how the pinout on
MiWi click
corresponds to the pinout on the
mikroBUS™ socket (the latter shown in the two middle columns).
Notes
Config Block CS
Reset
Data Block CS
SPI Clock
SPI Data Out
SPI Data In
Power supply
Ground
Pin
CSC
RST
CS
SCK
SDO
SDI
+3.3V
GND
1
2
3
4
5
6
7
8
AN
RST
CS
SCK
MISO
MOSI
3.3V
GND
PWM
INT
RX
TX
SCL
SDA
5V
GND
16
15
14
13
12
11
10
9
IN1
IN0
NC
NC
NC
NC
NC
GND
Ground
Pin
Notes
IRQ pin 1
IRQ pin 0
MiWi click specifications
Description
Frequency Range
Bit Rate (FSK)
Min
863
1.56
Typ
Max
870
40
Unit
MHz
kbps
Bit Rate (OOK)
SPI Configure Clock Frequency
SPI Configure Data Frequency
FSK reception sensitivity at 25kbps
OOK reception sensitivity at 2 kbps
Typical output power
1.56
16
6
1
-107
-113
+10
kbps
MHz
MHz
dBm
dBm
dBm
Onboard settings and indicators
Label Name Default
LD1 PWR -
Description
Power LED indicator
Software support
We provide a library for MiWi click on our Libstock page, as well as a demo application
(example), developed using MikroElektronika compilers and mikroSDK. The provided click
library is mikroSDK standard compliant. The demo application can run on all the main
MikroElektronika development boards.
Library Description
Library carries generic functions which are enough to have complete control over MiWi click.
Key functions
void miwi_writeReg(uint8_t address, uint8_t value)
- Writes
uint8_t miwi_readReg(uint8_t address)
- Reads
void miwi_writeFIFO(uint8_t Data)
- Writes
uint8_t miwi_readFIFO()
- Reads
data to register
data from register
data to FIFO buffer
data from FIFO buffer
Examples Description
Demo application is modified version of Microchip's application for MRF89XA
devices. Application is in the form of a console app with simple UI which allows operations such
as register_read or write but also TX and RX routines.
京公网安备 11010802033920号
Copyright © 2005-2026 EEWORLD.com.cn, Inc. All rights reserved
电子工程世界
