3958
DMOS FULL-BRIDGE PWM MOTOR DRIVER
A3958SLB
CP
CP
2
CP
1
PHASE
OSC
GROUND
GROUND
LOGIC SUPPLY
ENABLE
DATA
CLOCK
STROBE
CHARGE PUMP
1
2
3
4
5
θ
24
23
NC
22
21
V
BB
20
19
18
V
REG
RANGE
NO
CONNECTION
OUT
B
LOAD SUPPLY
GROUND
GROUND
SENSE
OUT
A
NO
CONNECTION
MODE
REF
Dwg. PP-069A
Designed for pulse-width modulated (PWM) current control of dc
motors, the A3958SB and A3958SLB are capable of continuous output
currents to ±2 A and operating voltages to 50 V. Internal fixed off-
time PWM current-control timing circuitry can be programmed via a
serial interface to operate in slow, fast, and mixed current-decay
modes.
PHASE and ENABLE input terminals are provided for use in
controlling the speed and direction of a dc motor with externally
applied PWM-control signals. The ENABLE input can be
programmed via the serial port to PWM the bridge in fast or slow
current decay. Internal synchronous rectification control circuitry is
provided to reduce power dissipation during PWM operation.
Internal circuit protection includes thermal shutdown with
hysteresis, and crossover-current protection. Special power-up
sequencing is not required.
The A3958SB/SLB is supplied in a choice of two power
packages, a 24-pin plastic DIP with a copper batwing tab (package
suffix ‘B’), and a 24-pin plastic SOIC with a copper batwing tab
(package suffix ‘LB’). In both cases, the power tab is at ground
potential and needs no electrical isolation. Each package type is
available in a lead-free version (100% matte tin leadframe).
Data Sheet
29319.31D
6
7
8
9
9
V
DD
LOGIC
17
16
SERIAL PORT
10
11
12
NC
15
14
÷
13
Note that the A3958SLB(SOIC) and A3958SB
(DIP) do not share a common terminal
assignment.
FEATURES
±2 A, 50 V Continuous Output Rating
Low
r
DS(on)
Outputs (270 mΩ, Typical)
Programmable Mixed, Fast, and Slow Current-Decay Modes
Serial Interface Controls Chip Functions
Synchronous Rectification for Low Power Dissipation
Internal UVLO and Thermal-Shutdown Circuitry
Crossover-Current Protection
R
θJA
(°C/W)
40
40
77
R
θJT
(°C/W)
6
6
6
ABSOLUTE MAXIMUM RATINGS
Load Supply Voltage, V
BB
......................
50 V
Output Current, I
OUT
.............................
±2.0 A
Logic Supply Voltage, V
DD
....................
7.0 V
Input Voltage, V
IN
.......
-0.3 V to V
DD
+ 0.3 V
Sense Voltage, V
S
...................................
0.5 V
Reference Voltage, V
REF
........................
2.7 V
Package Power Dissipation (T
A
= 25°C), P
D
A3958SB ......................................
3.1 W*
A3958SLB ....................................
1.6 W*
Operating Temperature Range,
T
A
....................................
-20°C to +85°C
Junction Temperature,
T
J
..................................................
+150°C
Storage Temperature Range,
T
S
..................................
-55°C to +150°C
Output current rating may be limited by duty cycle,
ambient temperature, and heat sinking. Under any
set of conditions, do not exceed the specified
current rating or a junction temperature of 150°C.
* Per SEMI G42-88 Specification.
Part Number
A3958SB-T
A3958SLB-T
A3958SLBTR-T
*
Pb-free*
Yes
Yes
Yes
Package
16-Pin DIP
16-Lead SOIC
16-Lead SOIC
Packing
25 per Tube
47 per Tube
1000 per reel
Pb-based variants are being phased out of the product line. The variants cited in this
footnote are in production but have been determined to be LAST TIME BUY. This
classification indicates that sale of this device is currently restricted to existing
customer applications. The variants should not be purchased for new design
applications because obsolescence in the near future is probable. Samples are no
longer available. Status change: October 31, 2006. Deadline for receipt of LAST
TIME BUY orders: April 27, 2007. These variants include: A3958SB, A3958SLB and
A3958SLBTR.
3958
DMOS FULL-BRIDGE
PWM MOTOR DRIVER
FUNCTIONAL BLOCK DIAGRAM
V
DD
LOGIC
SUPPLY
CHARGE PUMP
BANDGAP
V
DD
C
REG
TSD
V
BB
+
CP1
CP2
LOAD
SUPPLY
BANDGAP
REGULATOR
V
REG
UNDER-
VOLTAGE &
FAULT DETECT
CHARGE
PUMP
CONTROL LOGIC
OUT
A
PHASE
ENABLE
SYNC RECT MODE
SYNC RECT DISABLE
PWM MODE INT
PWM MODE EXT
MODE
PHASE
ENABLE
GATE DRIVE
CP
OUT
B
SENSE
ZERO
CURRENT
DETECT
C
S
R
S
OSC
FIXED OFF
PROGRAMMABLE
BLANK
DECAY
PWM TIMER
CLOCK
DATA
STROBE
RANGE
SERIAL
PORT
SLEEP
MODE
CURRENT
SENSE
RANGE
REFERENCE
BUFFER &
DIVIDER
REF
V
REF
Dwg. FP-048
CP
2
CP
1
PHASE
OSC
GROUND
GROUND
GROUND
GROUND
LOGIC
SUPPLY
ENABLE
DATA
CLOCK
1
2
3
4
5
θ
CHARGE PUMP
24
23
22
21
V
BB
20
19
18
17
CP
V
REG
RANGE
OUT
B
LOAD
SUPPLY
GROUND
GROUND
SENSE
OUT
A
MODE
REF
STROBE
Dwg. PP-069-1A
A3958SB
Note that the A3958SLB (SOIC) and A3958SB
(DIP) do not share a common terminal
assignment.
6
7
8
9
9
10
11
12
V
DD
LOGIC
16
15
÷
SERIAL PORT
14
13
2
115 Northeast Cutoff, Box 15036
Worcester, Massachusetts 01615-0036 (508) 853-5000
Copyright © 2000, 2002 Allegro MicroSystems, Inc.
3958
DMOS FULL-BRIDGE
PWM MOTOR DRIVER
ELECTRICAL CHARACTERISTICS at T
A
= +25
°
C, V
BB
= 50 V, V
DD
= 5.0 V, V
SENSE
= 0.5 V,
f
PWM
< 50 kHz (unless noted otherwise)
Limits
Characteristics
Output Drivers
Load Supply Voltage Range
Output Leakage Current
Output On Resistance
Body Diode Forward Voltage
Load Supply Current
V
BB
I
DSS
r
DS(on)
V
F
I
BB
Operating
During sleep mode
V
OUT
= V
BB
V
OUT
= 0 V
Source driver, I
OUT
= -2 A
Sink driver, I
OUT
= 2 A
Source diode, I
F
= -2 A
Sink diode, I
F
= 2 A
f
PWM
< 50 kHz
Charge pump on, outputs disabled
Sleep Mode
Control Logic
Logic Supply Voltage Range
Logic Input Voltage
Logic Input Current
(all inputs except ENABLE)
ENABLE Input Current
OSC input frequency
OSC input duty cycle
OSC input hysteresis
Input Hysterisis
Reference Input Volt. Range
Reference Input Current
Comparator Input Offset Volt.
V
DD
V
IN(1)
V
IN(0)
I
IN(1)
I
IN(0)
I
IN(1)
I
IN(0)
f
OSC
dc
OSC
–
–
V
REF
I
REF
V
IO
V
IN
= 2.0 V
V
IN
= 0.8 V
V
IN
= 2.0 V
V
IN
= 0.8 V
Operating
Operating
Operating
All digital inputs except OSC
Operating
V
REF
= 2.5 V
V
REF
= 0 V
Operating
4.5
2.0
–
–
–
–
–
2.9
40
200
50
0.0
–
–
5.0
–
–
<1.0
<-2.0
40
16
–
–
–
–
–
–
0
5.5
–
0.8
20
-20
100
40
6.1
60
400
100
2.6
±0.5
±5.0
V
V
V
µA
µA
µA
µA
MHz
%
mV
mV
V
µA
mV
20
0
–
–
–
–
–
–
–
–
–
–
–
<1.0
<-1.0
270
270
1.2
1.2
4.0
2.0
–
50
50
20
-20
300
300
1.6
1.6
7.0
5.0
20
V
V
µA
µA
mΩ
mΩ
V
V
mA
mA
µA
Symbol Test Conditions
Min. Typ. Max.
Units
Continued next page …
www.allegromicro.com
3
3958
DMOS FULL-BRIDGE
PWM MOTOR DRIVER
ELECTRICAL CHARACTERISTICS at T
A
= +25
°
C, V
BB
= 50 V, V
DD
= 5.0 V, V
SENSE
= 0.5 V,
f
PWM
< 50 kHz (unless noted otherwise), continued.
Limits
Characteristics
Control Logic
Buffer Input Offset Volt.
Reference Divider Ratio
Propagation Delay Times
V
IO
–
t
pd
D14 = High
D14 = Low
PWM change to source ON
PWM change to source OFF
PWM change to sink ON
PWM change to sink OFF
Phase change to sink ON
Phase change to sink OFF
Phase change to source ON
Phase change to source OFF
Thermal Shutdown Temp.
Thermal Shutdown Hysteresis
UVLO Enable Threshold
UVLO Hysteresis
Logic Supply Current
T
J
∆T
J
UVLO
∆UVLO
I
DD
f
PWM
< 50 kHz
Sleep Mode, Inputs < 0.5 V
Increasing V
DD
–
9.9
4.95
–
–
–
–
–
–
–
–
–
–
3.90
0.05
–
–
0
10
5.0
600
100
600
100
600
100
600
100
165
15
4.2
0.10
6.0
–
±15
10.2
5.05
–
–
–
–
–
–
–
–
–
–
4.45
–
10
2.0
mV
–
–
ns
ns
ns
ns
ns
ns
ns
ns
°C
°C
V
V
mA
mA
Symbol Test Conditions
Min. Typ. Max.
Units
NOTES: 1. Typical Data is for design information only.
2. Negative current is defined as coming out of (sourcing) the specified device terminal.
4
115 Northeast Cutoff, Box 15036
Worcester, Massachusetts 01615-0036 (508) 853-5000
3958
DMOS FULL-BRIDGE
PWM MOTOR DRIVER
FUNCTIONAL DESCRIPTION
Serial Interface.
The A3958 is controlled via a 3-wire
(clock, data, strobe) serial port. The programmable
functions allow maximum flexibility in configuring the
PWM to the motor drive requirements. The serial data is
clocked in starting with D19.
Bit
D0
D1
D2
D3
D4
D5
D6
D7
D8
D9
D10
D11
D12
D13
D14
D15
D16
D17
D18
D19
Function
Blank Time LSB
Blank Time MSB
Off Time LSB
Off Time Bit 1
Off Time Bit 2
Off Time Bit 3
Off Time MSB
Fast Decay Time LSB
Fast Decay Time Bit 1
Fast Decay Time Bit 2
Fast Decay Time MSB
Sync. Rect. Mode
Sync. Rect. Enable
External PWM Mode
Enable
Phase
Reference Range Select
Internal PWM Mode
Test Use Only
Sleep Mode
D7 – D10 Fast Decay Time.
A four-bit word sets the
fast-decay portion of the fixed-off time for the internal
PWM control circuitry. This will only have impact if the
mixed-decay mode is selected (via bit D17 and the MODE
input terminal). For t
fd
> t
off
, the device will effectively
operate in the fast-decay mode. The fast decay portion is
defined by
t
fd
= (8[1 + N]/f
osc
) - 1/f
osc
where N = 0 … 15
For example, with an oscillator frequency of 4 MHz, the
fast decay time will be adjustable from 1.75
µs
to
31.75
µs
in increments of 2
µs.
D11 Synchronous Rectification Mode.
The active
mode prevents reversal of load current by turning off
synchronous rectification when a zero current level is
detected. The passive mode will allow reversal of current
but will turn off the synchronous rectifier circuit if the
load current inversion ramps up to the current limit set by
V
REF
/R
S
.
D11
0
1
Mode
Active
Passive
D12 Synchronous Rectification Enable.
D12
0
1
Synchronous Rect.
Disabled
Enabled
D0 – D1 Blank Time.
The current-sense comparator is
blanked when any output driver is switched on, according
to the table below. f
osc
is the oscillator input frequency.
D1
0
0
1
1
D0
0
1
0
1
Blank Time
4/f
osc
6/f
osc
12/f
osc
24/f
osc
D13 External PWM Decay Mode.
Bit D13 determines
the current-decay mode when using ENABLE chopping
for external PWM current control.
D13
0
1
Mode
Fast
Slow
D2 – D6 Fixed-Off Time.
A five-bit word sets the
fixed-off time for internal PWM current control. The off
time is defined by
t
off
= (8[1 + N]/f
osc
) - 1/f
osc
where N = 0 … 31
For example, with an oscillator frequency of 4 MHz, the
off time will be adjustable from 1.75
µs
to 63.75
µs
in
increments of 2
µs.
D14 Enable Logic.
Bit D14, in conjunction with
ENABLE, determines if the output drivers are in the
chopped (OFF)(ENABLE = D14) or ON (ENABLE
≠
D14) state.
ENABLE
0
1
0
1
D14
0
0
1
1
Mode
Chopped
On
On
Chopped
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