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SIT8256AC-81-25S-156.250000Y

产品描述LVCMOS/TTL Output Clock Oscillator,
产品类别无源元件    振荡器   
文件大小337KB,共10页
制造商SiTime
标准  
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SIT8256AC-81-25S-156.250000Y概述

LVCMOS/TTL Output Clock Oscillator,

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SiT8256
0.3 ps Jitter Oscillator for Networking
The Smart Timing Choice
The Smart Timing Choice
Features
Applications
156.250000 MHz, 156.253906 MHz, 156.257800 MHz,
156.257812 MHz, 156.261718 MHz for Ethernet applications
100% pin-to-pin drop-in replacement to quartz-based oscillators
Ultra low phase jitter: 0.3 ps
Frequency stability as low as ±10 PPM
Industrial or extended commercial temperature range
LVCMOS/LVTTL compatible output
Standby or output enable modes
Standard 4-pin packages: 2.5 x 2.0, 3.2 x 2.5, 5.0 x 3.2, 7.0 x 5.0 mm
2
Outstanding silicon reliability of 2 FIT or 500 million hour MTBF
Pb-free, RoHS and REACH compliant
Ultra short lead time
SATA, SAS, Ethernet, 10Gb Ethernet, XAUI
Computing, storage, networking, telecom, industrial control
Electrical Characteristics
Parameter
Output Frequency Range
Symbol
f
Min.
Typ.
Max.
Unit
MHz
PPM
PPM
PPM
PPM
°C
°C
V
V
V
V
mA
mA
mA
mA
A
A
%
ns
ns
ns
Vdd
Vdd
Vdd
Vdd
kΩ
MΩ
ms
ns
ms
ps
ps
ps
PPM
PPM
In standby mode, measured from the time ST pin crosses
50% threshold. Refer to
Figure 5.
Vdd = 2.5V, 2.8V or 3.3V
Vdd = 1.8V
IEEE802.3-2005 10GbE jitter measurement specifications
25°C
25°C
15 pF load, 10% - 90% Vdd
30 pF load, 10% - 90% Vdd
45 pF load, 10% - 90% Vdd
IOH = -6 mA, IOL = 6 mA, (Vdd = 3.3V, 2.8V, 2.5V)
IOH = -3 mA, IOL = 3 mA, (Vdd = 1.8V)
Pin 1, OE or ST
Pin 1, OE or ST
Pin 1, OE logic high or logic low, or ST logic high
Pin 1, ST logic low
Measured from the time Vdd reaches its rated minimum value
No load condition, Vdd = 2.5V, 2.8V or 3.3V
No load condition, Vdd = 1.8V
Vdd = 2.5V, 2.8V or 3.3V, OE = GND, output is Weakly Pulled Down
Vdd = 1.8 V. OE = GND, output is Weakly Pulled Down
Vdd = 2.5V, 2.8V or 3.3V, ST = GND, output is Weakly Pulled Down
Vdd = 1.8 V. ST = GND, output is Weakly Pulled Down
Condition
156.250000, 156.253906
156.257800, 156.257812
156.261718
-10
-20
-25
-50
1.8
2.5
2.8
3.3
31
29
1.2
2.2
3.4
100
7
6
1.5
2
0.25
+10
+20
+25
+50
+70
+85
1.89
2.75
3.08
3.63
33
31
31
30
70
10
55
2
10%
30%
250
10
150
10
2
3
0.3
+1.5
+5
Frequency Stability
F_stab
Inclusive of Initial tolerance at 25 °C, and variations over
operating temperature, rated power supply voltage and load
Operating Temperature Range
Supply Voltage
T_use
Vdd
-20
-40
1.71
2.25
2.52
2.97
Extended Commercial
Industrial
Supply voltages between 2.5V and 3.3V can be supported.
Contact
SiTime
for additional information.
Current Consumption
OE Disable Current
Standby Current
Duty Cycle
Rise/Fall Time
Idd
I_OD
I_std
DC
Tr, Tf
45
Output Voltage High
Output Voltage Low
Input Voltage High
Input Voltage Low
Input Pull-up Impedance
Startup Time
OE Enable/Disable Time
Resume Time
RMS Period Jitter
RMS Phase Jitter (random)
First year Aging
10-year Aging
VOH
VOL
VIH
VIL
Z_in
T_start
T_oe
T_resume
T_jitt
T_phj
F_aging
90%
70%
2
-1.5
-5
Notes:
1. All electrical specifications in the above table are specified with 15 pF output load and for all Vdd(s) unless otherwise stated.
2. Contact
SiTime
for custom drive strength to drive higher or multiple load, or SoftEdge™ option for EMI reduction.
SiTime Corporation
Rev. 1.11
990 Almanor Avenue
Sunnyvale, CA 94085
(408) 328-4400
www.sitime.com
Revised March 4, 2013
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