19-0324; Rev 2; 12/97
1Gbps, High-Speed Limiting Amplifier with
Chatter-Free Loss-of-Signal Detection
________________General Description
The MAX3262 limiting amplifier with its high gain and
wide bandwidth is ideal for use as a post amplifier in
fiber-optic receivers with data rates up to 1Gbps. The
amplifier’s gain can be adjusted between 33dB and
48dB. At maximum gain, signals as small as 6mVp-p
can be amplified to drive devices with PECL inputs.
The MAX3262 has complementary loss-of-signal out-
puts for interfacing with open-fiber-control (OFC) cir-
cuitry. These outputs can be programmed to assert
with input levels between 9mVp-p and 48mVp-p. LOS
hysteresis for any programmed level is nominally
3.0dB, preserving a balance between noise immunity
and dynamic range.
____________________________Features
o
900MHz Bandwidth
o
48dB Maximum Gain
o
Chatter-Free LOS
o
Programmable LOS Threshold
o
Single +5V Power Supply
o
Fully Differential Architecture
MAX3262
_______________Ordering Information
PART
MAX3262CAG
MAX3262C/D
TEMP. RANGE
0°C to +70°C (T
A
)
0°C to +100°C (T
J
)
PIN-PACKAGE
24 SSOP
Dice*
________________________Applications
1062Mbps Fibre Channel
622Mbps SONET
Pin Configuration appears at end of data sheet.
*Dice are designed to operate over this range but are tested and
guaranteed only at T
A
= +25°C.
____________________________________________________Typical Operating Circuit
C
AZ
CZP
CZN
FILTER
C
IN
DIN+
MAX3260
INPUT
OUTPUT
DIN-
V
CC
GND
50Ω
+5V
+5V
C1
0.01µF
V
CC
A
V
CC
B
V
CC
C
V
CC
D
V
CC
E
V
CC
C
IN
ENB
DOUT+
RECEIVER WITH
PECL TERMINATIONS
(50Ω TO V
CC
- 2V)
MAX3262
DOUT-
LOS
+5V
LOSB
V
LOS
GND
DIV2
R
4.7k
R
4.7k
LOS
+5V
C1
0.01µF
+5V
R1
R2
LOSB
________________________________________________________________
Maxim Integrated Products
1
For free samples & the latest literature: http://www.maxim-ic.com, or phone 1-800-998-8800.
For small orders, phone 408-737-7600 ext. 3468.
1Gbps, High-Speed Limiting Amplifier with
Chatter-Free Loss-of-Signal Detection
MAX3262
ABSOLUTE MAXIMUM RATINGS
Power Supply, V
CC
- V
EE
......................................................6.0V
Input Voltage, DIN+, DIN- .....................................................6.0V
CZN, CZP, ENB, VLOS, DIV2, LOS+, LOS-.....-0.3V, V
CC
+ 0.3V
DOUT+, DOUT- (with 50Ω load) .......................2.5V, V
CC
+ 0.3V
Continuous Power Dissipation (T
A
= +70°C)
SSOP (derate 10mW/°C above +70°C) ....................500mW°C
Junction Operating Temperature ......................-55°C to +150°C
Storage Temperature Range .............................-55°C to +175°C
Processing Temperature (Die).........................................+400°C
Stresses beyond those listed under “Absolute Maximum Ratings” may cause permanent damage to the device. These are stress ratings only, and functional
operation of the device at these or any other conditions beyond those indicated in the operational sections of the specifications is not implied. Exposure to
absolute maximum rating conditions for extended periods may affect device reliability.
DC ELECTRICAL CHARACTERISTICS
(V
CC
= +5V, R
LOAD
= 50Ω to V
CC
- 2V (equivalent), T
A
= 0°C to +70°C. Typical values are at V
CC
= 5V and T
A
= +25°C.)
PARAMETER
Power-Supply Current
Enable Input Current
V
LOS
Input Current
Common-Mode Output Voltage
LOS+, LOS- Output Low
Voltage
DIV2 Short-Circuit Current
Differential Output Offset,
DOUT+ to DOUT-
Input Bias Voltage
V
DIN
2.5
SYMBOL
I
VCC
I
ENB
I
LOS
V
CC
= 5.0V
I
OUT
= -1.0mA
DIV2 = 0V
0.5
±35
3.0
3.5
120
3.7
3.8
0.5
No output load
CONDITIONS
MIN
TYP
MAX
60
150
UNITS
mA
µA
µA
V
V
mA
mV
V
AC ELECTRICAL CHARACTERISTICS
(V
CC
= +5V, R
LOAD
= 50Ω to 3V, AC parameters are not tested, T
A
= +25°C, unless otherwise noted.)
PARAMETER
Power-Supply Rejection Ratio
LOS Release Time,
Minimum Input
LOS Release Time,
Maximum Input
LOS Assert Time
Input Voltage Range
LOS Sensitivity Range
LOS Hysteresis
Differential Input Noise
Pulse-Width Distortion
Output Edge Speed
Output Voltage Amplitude
Small-Signal Bandwidth
SYMBOL
PSRR
t
OFFL
t
OFFH
t
ONL
V
ID
V
SR
HYS
V
n
PWD
t
R,
t
F
V
OUT
BW
V
OH
- V
OL
MAX3262C/D
MAX3262CAG
400
800
750
600
925
810
CONDITIONS
Input referred, 55MHz
(Note 1)
(Note 2)
(Note 1)
Peak-to-peak
Differential inputs,
peak-to-peak
MAX3262C/D
MAX3262CAG
0.006
9
10
1.5
3.0
80
40
250
730
0.2
0.020
MIN
TYP
35
0.5
0.5
0.5
1.8
48
48
5.0
MAX
UNITS
dB
µs
µs
µs
V
mV
dB
µV
ps
ps
mV
MHz
V
LOS
= 5V, Pattern 2
7
- 1PRBS
V
LOS
= 5V, DIV2 = GND (Note 3)
1Gbps, 8mVp-p input
Note 1:
Input is a 200MHz square wave, t
R
< 300ps, 8mVp-p.
Note 2:
Input is a 200MHz square wave, t
R
< 300ps, 1.8Vp-p.
Note 3:
Input-referred noise = RMS output noise/low-frequency gain.
2
_______________________________________________________________________________________
1Gbps, High-Speed Limiting Amplifier with
Chatter-Free Loss-of-Signal Detection
__________________________________________Typical Operating Characteristics
(V
CC
= 5V, T
A
= +25°C, unless otherwise noted.)
V
CC
SUPPLY CURRENT
(NO OUTPUT LOAD) vs. TEMPERATURE
MAX3262-01
MAX3262
LOS HYSTERESIS
vs. TEMPERATURE
MAX3262-02
LOS SENSITIVITY
vs. FREQUENCY
7.5
SENSITIVITY (mVp-p)
7.0
6.5
6.0
5.5
5.0
4.5
4.0
PRBS 2
7
-1
K28.5 SEQUENCE
(FIBRE CHANNEL IDLE PATTERN)
1-0 PATTERN
MAX3262-03
70
65
SUPPLY CURRENT (mA)
60
55
50
45
40
0
5.25V
8
1Gbps WITH 1,0 PATTERN
7
6
HYSTERESIS (dB)
5
4
3
2
8.0
5.0V
4.75V
1
0
10 20 30 40 50 60 70 80 90 100
TEMPERATURE (°C)
0
20
40
60
80
100
120
400
600
800
1000
TEMPERATURE (°C)
FREQUENCY (Mbps)
LOS HYSTERESIS vs. V
LOS
1Gbps
DIV2 = 0
1,0 PATTERN
MAX3262-04
FREQUENCY RESPONSE
V
LOS
= 5V
DIV2 = GND
V
LOS
= 5V
DIV2 OPEN
V
LOS
= 3.4V
DIV2 OPEN
37
V
LOS
= 3.0V
DIV2 OPEN
MAX3262-05
5.0
4.0
HYSTERESIS (dB)
55
49
43
2.0
GAIN (dB)
3.0
1.0
31
0
3.2 3.4 3.6 3.8 4.0 4.2 4.4 4.6 4.8 5.0
V
LOS
(V)
25
0
200
400
600
800 1000 1200 1400
FREQUENCY (MHz)
EYE DIAGRAM
MAX3262-07
1Gbps
R
LOAD
= 50Ω to V
CC
- 2V (EQUIVALENT)
V
IN
= 250mV, V
CC
= +5V, DIV2 = GND, V
LOS
= V
CC
100mV/div
V
LOS
= V
CC
-500mV
225ps/div
2µs/div
_______________________________________________________________________________________
MAX3262-06
+500mV
LOS OPERATION
LOS
OUTPUT
DATA
INPUT
3
1Gbps, High-Speed Limiting Amplifier with
Chatter-Free Loss-of-Signal Detection
MAX3262
_____________________________________________________
__________Pin Description
PIN
1
2
3
NAME
V
CC
B
V
LOS
CZP
Positive supply for internal gain stages
Power detect/LOS level set. Use this input to program the required threshold level for LOS assertion.
Offset-correction loop compensation capacitor. This pin should be connected to the CZN pin through a
100nF to 330nF capacitor, which provides the dominant pole for the offset-correction loop.
Offset-correction loop compensation capacitor. This pin should be connected to the CZP pin through a
100nF to 330nF capacitor, which provides the dominant pole for the offset-correction loop.
Power supply for the input stage amplifier
Data Input
Inverting Data Input
Ground for the input stage amplifier
Output Enable. Output gain stage is disabled and LOS circuitry remains functional.
Input stage gain adjust. Grounding this pin forces the input stage gain to maximum (11dB) for applications
where the LOS threshold level will be set for input signals in the 9mVp-p to 20mVp-p range. Leaving this pin
open forces the gain of the input stage to be divided by two (6dB) for applications where the LOS threshold
level will be set for input signal levels in the 15mVp-p to 48mVp-p range.
Comparator threshold voltage for test only. Leave unconnected.
Positive supply for the power detect/LOS circuitry
Ground for the power detect/LOS circuitry
Ground for the LOS+/LOS- buffer circuitry
Positive supply for the LOS+/LOS- buffer circuitry
Loss-of-Signal detect. This pin is asserted low when input power drops below the LOS threshold level.
Loss-of-Signal detect. This pin is asserted high when input power drops below the LOS threshold level.
Inverting Data Output
Data Output
Substrate Ground
Positive supply for bias generators
Ground for bias generators
Positive supply for output buffers
Ground for internal gain stages
FUNCTION
4
5
6
7
8
9
CZN
V
CC
A
DIN+
DIN-
GND
ENB
10
DIV2
11
12
13
14
15
16
17
18
19
20
21
22
23
24
VTH
V
CC
E
GND
GND
V
CC
D
LOS-
LOS+
DOUT-
DOUT+
GND
V
CC
C
GND
V
CC
GND
4
_______________________________________________________________________________________
1Gbps, High-Speed Limiting Amplifier with
Chatter-Free Loss-of-Signal Detection
MAX3262
C
AZ
V
LOS
OFFSET
CORRECTION
20k
DIN+
5dB/11dB
DIN-
RMS
DETECT
BIAS
0dB to 11dB
10dB
10dB
6dB
DOUT-
ENB
20k
DOUT+
DIV2
MAX3262
REFERENCE
LOS+
LOS-
Figure 1. Functional Diagram
_______________ Detailed Description
The MAX3262 is an integrated limiting amplifier intend-
ed for high-frequency fiber-optic applications. The cir-
cuit connects to typical transimpedance amplifiers
found within a fiber-optic link. The linear signal output
from a transimpedance amplifier can contain significant
amounts of noise, and may vary in amplitude over time.
The MAX3262 limiting amplifier quantizes the signal,
and outputs a voltage-limited waveform over a 48dB
input dynamic range.
The MAX3262 provides an offset correction function
that effectively reduces the offset voltage to negligible
levels. In communications systems using NRZ data with
a 50% duty cycle, pulse-width distortion present in the
signal or generated by the transimpedance amplifier
appears as input offset and is partially removed by the
offset correction function. An external capacitor is
required between CZP and CZN to compensate the off-
set correction loop, determining the lower 3dB point.
Loss-of-Signal Function
The MAX3262 incorporates a chatter-free loss-of-signal
function, which is used to detect that the input signal
has dropped below the level necessary for acceptable
bit error rate performance, or to indicate an open-fiber
condition. The loss-of-signal function is implemented
with a rectifying peak detector, which samples the sig-
nal entering the output stage. The output from the peak
detector is compared against an internally generated
threshold, and is used to assert the LOS+ and LOS-
outputs.
The loss-of-signal threshold is adjusted by varying the
amplifier gain. The MAX3262 is configurable for gains
between 33dB and 48dB, allowing LOS thresholds
between 9mVp-p and 48mVp-p. Figure 2 shows the
LOS threshold as a function of the DIV2 and V
LOS
pins.
The DIV2 pin provides a coarse adjustment of 6dB of
gain, while the V
LOS
pin provides a fine gain adjust-
ment between 0dB and 11dB.
_______________________________________________________________________________________
5
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