NCV7429
System Basis Chip with
LIN, LS and HS Switches
Description
The NCV7429 is a monolithic LIN System-Basis-Chip with
enhanced feature set useful in Automotive Body Control systems.
Besides the LIN bus interface the IC features a 5 V voltage regulator,
high-side and low-side switches to control LEDs and relays, and
supervision functionality like a window watchdog. This allows
a highly integrated solution by replacing external discrete components
while maintaining the system flexibility. As a consequence, the board
space and ECU weight can be minimized.
Features
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TSSOP−20 EP
CASE 948AB
•
Main Supply Functional Operating Range from 5 V to 28 V
•
Main Supply Parametrical Operating Range 6 V to 18 V
•
LIN Physical Layer According to ISO 17987−4 (backwards
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compatible to LIN 1.3, LIN 2.x) and SAE J2602
Power Management Through Operating Modes: Normal, Standby,
Sleep and Flash
Software Development Mode for Software Debugging
Low Drop Voltage Regulator VR1: 5 V/150 mA, 2%
One Wake-up Input, e.g. for Contact Monitoring
Wake-up Logic with Cyclic Contact Monitoring
Wake-up Source Recognition
Independent PWM Functionality for All Outputs
(Integrated PWM Registers)
Window Watchdog with Programmable Times
2x Low-side Driver (typ. 1.5
W)
with Over-load Protection
and Active Clamp; e.g. for Relays
3x High-side Driver (typ. 5
W)
with Over- and Under-load Detection;
e.g. for LED’s and Switches
24-bit SPI Interface
Protection against Short Circuit, Over-voltage and Over-temperature
TSSOP−20 EP Package
NCV Prefix for Automotive and Other Applications Requiring
Unique Site and Control Change Requirements; AEC−Q100
Qualified and PPAP Capable
These Devices are Pb-Free, Halogen Free/BFR Free and are
RoHS Compliant
MARKING DIAGRAM
NV74
29−5
ALYWG
G
A
L
Y
W
G
= Assembly Location
= Wafer Lot
= Year
= Work Week
= Pb-Free Package
(Note: Microdot may be in either location)
PIN ASSIGNMENT
1
GND1
SWDM
NRES
VR1
TxDL
RxDL/INTN
SDI
SDO
SCLK
CSN
20
LS2
LS1
GND2
LIN
VS
VS_OUT
OUT1
OUT2
OUT3/FSO
WU
NCV7429
(Top View)
ORDERING INFORMATION
Device
Package
Shipping
†
2500 / Tape &
Reel
Typical Applications
•
De-centralized Door Electronic Systems
NCV7429DE5R2G TSSOP−20
(Pb-Free)
†For information on tape and reel specifications,
including part orientation and tape sizes, please
refer to our Tape and Reel Packaging Specification
Brochure, BRD8011/D.
©
Semiconductor Components Industries, LLC, 2017
1
March, 2017 − Rev. 0
Publication Order Number:
NCV7429/D
NCV7429
BLOCK DIAGRAM
VS_OUT
15
16
VS
VS
NCV7429
19
Low−
Side
LS1
VR1
4
VR1
5 V / 150 mA
Protection :
Short circuit
Open load
Over −temperature
Under/over voltage
20
Low−
Side
LS2
NRES
CSN
SCLK
SDI
SDO
3
Watchdog
VS_OUT
10
9
7
8
CONTROL_0
CONTROL_1
CONTROL_2
CONTROL_3
STATUS _0
STATUS _1
STATUS _2
PWM_1/2
PWM_3
ROM
High−
Side
14
OUT1
Logic
SPI
VS_OUT
High−
Side
13
OUT2
VS_OUT
SWDM
2
High−
Side
12
OUT3/FSO
Timer 1/2
VS
VS_OUT
TxDL
RxDL/INTN
5
6
LIN
PWM
Local
wakeup
detector
11
WU
17
1
18
LIN
GND1
Figure 1. Block Diagram
Table 1. PIN DESCRIPTION
Pin No.
1
2
3
4
5
6
7
8
9
10
11
12
13
Pin Name
GND1
SWDM
NRES
VR1
TxDL
RxDL/INTN
SDI
SDO
SCLK
CSN
WU
OUT3/FSO
OUT2
Ground
HV Digital Input with
Pull-down
Digital Open-drain Output
with Internal Pull-up
5 V Regulator Output
Digital Input with Pull-up
Digital Push-pull Output
Digital Input with Pull-down
Digital Push-pull Output,
Tristate
Digital Input with Pull-down
Digital Input with Pull-up
HV Input
HS Driver
HS Driver
Pin Type
Ground connection
Software development mode entry input
Reset signal to the MCU
2%, 150 mA
Transmitter data input of the LIN transceiver
Receiver output of the LIN transceiver/Interrupt output
SPI data input
SPI data output
SPI clock input
SPI chip select input
Voltage-sense input (threshold typ. VS_OUT/2), switched pull-up/down
Resistive loads, Ron 5
W
typ, Ilim > 140 mA / FSO output
Resistive loads, Ron 5
W
typ, Ilim > 140 mA
Description
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2
GND2
NCV7429
Table 1. PIN DESCRIPTION
(continued)
Pin No.
14
15
16
17
18
19
20
Pin Name
OUT1
VS_OUT
VS
LIN
GND2
LS1
LS2
Exposed
Pad
HS Driver
Battery Supply Input
Battery Supply Input
LIN Bus Interface
Ground
LS Driver
LS Driver
Ground
Pin Type
Description
Resistive loads, Ron 5/20
W
typ, Ilim > 140/35 mA, two configurations
Power-supply of the high-side drivers OUT1−3 and WU input
Principle power-supply of the device
LIN bus pin, low in dominant state
Ground connection
Low-side Driver, Ron 1.5
W
typ, Ilim > 250 mA, active clamp to ground
Low-side Driver, Ron 1.5
W
typ, Ilim > 250 mA, active clamp to ground
Substrate; Exposed pad has to be connected to both GND pins
APPLICATION INFORMATION
KL30
+12 V
VBAT
Cbuf_VS
Cbuf_VSOUT
(100nF)
VS_OUT
VS
(100nF)
VBAT
16
15
(1k)
NCV7429
19
VS
lift1
LS1
RELAY
Low−
Side
VR1
4
VR1
5 V / 150 mA
Protection:
Short circuit
Open load
Over −temperature
Under/over voltage
20
M
LS2
Cload_VR1
(2.2uF)
Low−
Side
lift2
NRES
CSN
3
Watchdog
VS_OUT
10
9
7
8
CONTROL_0
CONTROL_1
CONTROL_2
CONTROL_3
STATUS _0
STATUS _1
STATUS _2
PWM_1/2
PWM_3
ROM
High−
Side
14
OUT1
(10−
22nF)
out1
MCU
SCLK
SDI
SDO
Logic
SPI
VS_OUT
High−
Side
13
OUT2
(10−
22nF)
out2
VS_OUT
SWDM
2
High−
Side
12
OUT3/FSO
(10−
22nF)
out3
wake
SWITCHES
Timer1/2
VS
VS_OUT
TxDL
RxDL/INTN
5
LIN
6
PWM
Local
wakeup
detector
11
WU
(1−
10k)
(10nF)
17
1
18
LIN
GND1
Cload_LIN
(220pF)
LIN
GND2
LIN BUS
Figure 2. Example Application Diagram
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3
NCV7429
Table 2. ABSOLUTE MAXIMUM RATINGS
Symbol
Vmax_VS,
Vmax_VS_OUT
Vmax_WU
Vmax_OUT1−3
Vmax_LS1/2
Wmax_LS1/2
Imax_LS1/2
Power Supply Voltage
Wake Pin Voltage Range
High-side Output OUT1−3 Voltage Range
LS1/2 Pin Voltage Range DC
(Voltage Internally Limited during Flyback)
Maximum LS1/2 Clamping Energy
Maximum LS1/2 Pin Current
Maximum LS1/2 Pin Current, Transient or without VS and
VS_OUT Supply
Vmax_LIN
Vmax_VR1
Vmax_digIO
Vmax_SWDM
ESD Human Body
Model Following
EIA−JESD22
(100 pF, 1500
W)
ESD Following IEC
61000−4−2
(150pF, 330W)
DC Voltage on LIN Pin
Stabilized Supply Voltage, Logic Supply
DC Voltage at Digital Pins (NRES, TxDL, RxDL/INTN, SDI,
SDO, SCLK, CSN)
DC Voltage at SWDM Input
All Pins
Pin LIN to GND
Pins OUT1−3, LS1/2 to GND
Valid for Pins VS, VS_OUT, LIN, OUT1−3, WU
− VS, VS_OUT pins with reverse-protection and filtering
capacitor
− OUT1−3 pins with parallel capacitor 10 nF
− WU pin stressed through a serial resistor > 10 kW
All Pins
Corner Pins
Junction Temperature
Storage Temperature Range
Moisture Sensitivity Level (max. 260°C Processing)
−120
−40
−0.3
−0.3
−0.3
−2
−4
−4
−6
40
min(5.5, VS + 0.3)
VR1 + 0.3
40
+2
+4
+4
+6
kV
Parameter
Min
−0.3
−0.3
−0.3
−0.3
Max
40
VS_OUT + 0.3
VS_OUT + 0.3
40
36
500
Unit
V
V
V
V
mJ
mA
mA
V
V
V
V
kV
ESD Charged
Device Model
Following
JESD22−C101/AE
C−Q100−011
T
j_mr
T
stg
MSL
−500
−750
−40
−55
2
+500
+750
+170
+150
V
V
°C
°C
Stresses exceeding those listed in the Maximum Ratings table may damage the device. If any of these limits are exceeded, device functionality
should not be assumed, damage may occur and reliability may be affected.
Table 3. THERMAL CHARACTERISTICS
Symbol
R
qJC
R
qJA
R
qJA
Parameter
Thermal Characteristics
Thermal Resistance, Junction-to-Case
Thermal Resistance, Junction-to-Ambient, 1S0P PCB (Note 1)
Thermal Resistance, Junction-to-Ambient, 2S2P PCB (Note 2)
Value
8.3
70
40
Unit
°C/W
1. Value based on test board according to JESD51−3 standard, signal layer with 10% trace coverage.
2. Value based on test board according to JESD51−7 standard, signal layers with 20% trace coverage, inner planes with 90% coverage.
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4
NCV7429
Table 4. RECOMMENDED OPERATING RANGES
Symbol
Vop_VS_par,
Vop_VS_OUT_par
Vop_VS_func,
Vop_VS_OUT_func
Vop_WU
Vop_OUT1−3
Vop_LS1/2
Vop_LIN
Vop_VR1
Vop_digIO
Vop_SWDM
T
j_op
Parameter
Power Supply Voltage for Valid Parameter Specifications
Power Supply for Correct Functional Behavior
Wake Pin Voltage Range
High-side Output OUT1−3 Voltage Range
LS1/2 Pin Voltage Range DC
(voltage internally limited during flyback)
LIN Pin Voltage Range
Stabilized Supply Voltage, Logic Supply
DC Voltage at Digital Pins (NRES, TxDL, RxDL/INTN, SDI,
SDO, SCLK, CSN)
DC Voltage at SWDM Input
Junction Temperature
Min
6
5
0
0
0
0
4.9
0
0
−40
Max
18
28
VS_OUT
VS_OUT
VS_OUT
VS
5.1
VR1
VS
+150
Unit
V
V
V
V
V
V
V
V
V
°C
Functional operation above the stresses listed in the Recommended Operating Ranges is not implied. Extended exposure to stresses beyond
the Recommended Operating Ranges limits may affect device reliability.
Table 5. ELECTRICAL CHARACTERISTICS
(6 V
≤
V
s
≤
18 V, 6 V
≤
V
s_out
≤
18 V, −40°C
≤
T
j
≤
150°C; unless otherwise specified)
Symbol
VS SUPPLY
VS, VS_OUT
Supply Voltage
Functional, Voltage Regulators with
Deteriorated Performance
Parameter Specification
VS_PORH
VS_PORL
VS_OUT_UV
VS_OUT_UV_hyst
VS_OUT_OV
VS_OUT_OV_hyst
I_VS_norm
VS POR Threshold
VS POR Threshold
VS_OUT UV-threshold Voltage
Undervoltage Hysteresis
VS_OUT OV-threshold Voltage
Overvoltage Hysteresis
VS Consumption in Normal Mode
Normal mode,
VR1 on (not loaded),
bus communication off,
TxDL not active
Standby mode,
VS = 12 V, VR1 on (not loaded),
no LIM bus communication,
no wake-up request pending,
WU wakeup disabled,
T
j
= 85°C (Note 3)
Sleep mode,
VS = 12 V, VR1 off,
no LIM bus communication,
no wake-up request pending,
WU wakeup disabled,
T
j
= 85°C (Note 3)
Normal/Standby mode,
VR1 loaded
N = 1 – 2
…
number of LSx drivers
active
VS Rising
VS Rising
VS Falling
VS Falling
5
6
3.4
2.1
5.1
0.1
20
0.3
0.5
0.6
28
18
4.1
3.0
5.8
0.5
22
0.8
1.1
V
V
V
V
V
V
mA
V
Parameter
Conditions
Min
Typ
Max
Unit
I_VS_stby
VS Consumption in Standby Mode
(Static Sense)
28
60
mA
I_VS_sleep
VS Consumption in Sleep Mode
(Static Sense)
15
30
mA
I_VS_add_VR1
I_VS_add_LS
VR1 Current Consumption from VS
Added LSx Drivers Current
Consumption from VS
0.005 ·
I_VR1
15 +
20·N
110
mA
mA
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