DATASHEET
SPREAD SPECTRUM CLOCK GENERATOR
Description
The ICS7152-01, -02, -11, and -12 are clock generators for
EMI (Electro Magnetic Interference) reduction (see below
for frequency ranges and multiplier ratios). Spectral peaks
can be attenuated by slightly modulating the oscillation
frequency. Both down and center spread profiles are
selectable. Center spread maintains an average frequency
equal to an unspread clock. Down spread meets maximum
frequency specs over the entire modualtion cycle.
ICS7152
Features
•
•
•
•
•
Operating voltage of 3.3 V ±0.3 V
Packaged in 8-pin SOIC
Input frequency range of 16.6 to 134.0 MHz
Output frequency range of 16.6 to 134.0 MHz
Provides a spread spectrum clock output (±0.5%, ±1.5%
center spread; -1.0%, -3.0% down spread)
•
Advanced, low-power CMOS process
•
Industrial temperature range available
•
Pb (lead) free package, RoHS compliant
Block Diagram
VDD
SEL
FREQ
XENS
XIN
Clock Buffer/
Crystal
Ocsillator
XOUT
External caps required with crystal for
accurate tuning of the clock
PLL Clock
Synthesis
and Spread
Spectrum
Circuitry
CKOUT
GND
Product Lineup
Product
Input Frequency Range
Modulation Type
Modulation Enable Pin
ICS7152M-01, ICS7152MI-01
ICS7152M-02, ICS7152MI-02
ICS7152M-11, ICS7152MI-11
ICS7152M-12, ICS7152MI-12
16.6 MHz to 67 MHz
40.0 MHz to 134.0 MHz
16.6 MHz to 67.0 MHz
40.0 MHz to 134.0 MHz
Down spread
Yes
Center spread
IDT®
SPREAD SPECTRUM CLOCK GENERATOR
1
ICS7152
REV K 062911
ICS7152
SPREAD SPECTRUM CLOCK GENERATOR
SSCG
Pin Assignment
XIN
XOUT
GND
SEL
1
2
3
4
8
7
6
5
8 pin (150 mil) SOIC
XENS
FREQ
VDD
CKOUT
SEL Modulation Rate Setting Table
SEL
Pin 4
(note1)
Spread
Direction
Spread
Percentage (%)
Part Number
0
Center
Down
±0.5
-1.0
±1.5
-3.0
1
Center
Down
ICS7152M-11,
ICS7152M-12
ICS7152M-01,
ICS7152M-02
ICS7152M-11,
ICS7152M-12
ICS7152M-01,
ICS7152M-02
Modulation Enable Setting Table
XENS
Pin 8
0
1
Spread Spectrum
ON
OFF
Frequency Setting Table
FREQ
Pin 7
Frequency
0
16.6 to 40 MHz
40 to 80 MHz
1
33 to 67 MHz
66 to 134 MHz
ICS7152M-01,
ICS7152M-11
ICS7152M-02,
ICS7152M-12
ICS7152M-01,
ICS7152M-11
ICS7152M-02,
ICS7152M-12
Pin Descriptions
Pin
Number
Pin
Name
Pin Type
Pin Description
1
2
3
4
5
6
7
8
XIN
XOUT
GND
SEL
CKOUT
VDD
FREQ
XENS
Input
Output
Power
Input
Output
Power
Input
Input
Crystal resonator connection pin/clock input pin.
Crystal resonator connection pin.
Connect to ground.
Modulation rate setting pin.
Modulated clock output pin.
Connect to +3.3 V.
Frequency setting pin.
Modulation enable setting pin.
IDT®
SPREAD SPECTRUM CLOCK GENERATOR
2
ICS7152
REV K 062911
ICS7152
SPREAD SPECTRUM CLOCK GENERATOR
SSCG
External Components
The ICS7152 requires a minimum number of external
components for proper operation.
Spread Spectrum Profile
The ICS7152 low EMI clock generator uses a triangular
frequency modulation profile for optimal down stream
tracking of zero delay buffers and other PLL devices. The
frequency modulation amplitude is constant with variations
of the input frequency.
Decoupling Capacitor
A decoupling capacitor of 0.01µF must be connected
between GND and VDD on pin 6, as close to this pin as
possible. For optimum device performance, the decoupling
capacitor should be mounted on the component side of the
PCB. Avoid the use of vias in the decoupling circuit.
Modulation Rate
Series Termination Resistor
Series termination should be used on the clock output. To
series terminate a 50Ω trace (a commonly used trace
impedance) place a 27Ω resistor in series with the clock line,
as close to the clock output pin as possible. The nominal
impedance of the clock output is 25Ω
.
Frequency
Time
PCB Layout Recommendations
For optimum device performance and lowest output phase
noise, the following guidelines should be observed.
1) An optimum layout is one with all components on the
same side of the board, minimizing vias through other signal
layers. Other signal traces should be routed away from the
ICS7152. This includes signal traces just underneath the
device, or on layers adjacent to the ground plane layer used
by the device.
Crystal Information
The crystal used should be a fundamental mode, parallel
resonant. Crystal capacitors should be connected from pins
X1 to ground and X2 to ground to optimize the initial
accuracy. The value of these capacitors is given by the
following equation:
Crystal caps (pF) = (C
L
- 6) x 2
In the equation, C
L
is the crystal load capacitance. So, for a
crystal with a 16 pF load capacitance, two 20 pF [(16-6) x 2]
capacitors should be used.
IDT®
SPREAD SPECTRUM CLOCK GENERATOR
3
ICS7152
REV K 062911
ICS7152
SPREAD SPECTRUM CLOCK GENERATOR
SSCG
Absolute Maximum Ratings
Stresses above the ratings listed below can cause permanent damage to the ICS7152. These ratings, which are
standard values for IDT commercially rated parts, are stress ratings only. Functional operation of the device at these
or any other conditions above those indicated in the operational sections of the specifications is not implied.
Exposure to absolute maximum rating conditions for extended periods can affect product reliability. Electrical
parameters are guaranteed only over the recommended operating temperature range.
Item
Supply Voltage, VDD
All Inputs and Outputs (referenced to GND)
Ambient Operating Temperature
Storage Temperature
Junction Temperature
Soldering Temperature
Overshoot (V
IOVER
)
Undershoot (V
IUNDER
)
7V
Rating
-0.5 V to VDD+0.5 V
-40 to +85° C
-55 to +125° C
-40 to +125° C
260° C
VDD + 1.0 V (t
OVER
< 50 ns) max
GND - 1.0 V (t
UNDER
< 50 ns) min
Overshoot/Undershoot
t
UNDER
< 50 ns
V
IOVER
< V
DD
+ 1.0 V
V
DD
Input pin
GND
V
IUNDER
< GND - 1.0 V
t
OVER
< 50 ns
Recommended Operation Conditions
Parameter
Ambient Operating Temperature
Power Supply Voltage (measured in respect to GND)
Min.
-40
+3.0
Typ.
3.3
Max.
+85
3.6
Units
°
C
V
IDT®
SPREAD SPECTRUM CLOCK GENERATOR
4
ICS7152
REV K 062911
ICS7152
SPREAD SPECTRUM CLOCK GENERATOR
SSCG
DC Electrical Characteristics
Unless stated otherwise,
VDD = 3.3 V ±0.3 V,
Ambient Temperature -40 to +85° C
Parameter
Operating Voltage
Supply Current
Input High Voltage
Symbol
VDD
IDD
V
IH
Conditions
No load, at 3.3 V
SEL, FREQ, XENS
XIN, Input slew rate
3 V/ns, 16.6 to 100
MHz
XIN, Input slew rate
3 V/ns, 100 to 134
MHz
Min.
3.0
VDD x 0.8
VDD x 0.8
Typ.
3.3
14
Max.
3.6
28
VDD + 0.3
VDD + 0.3
Units
V
mA
V
V
VDD x 0.9
VDD + 0.3
V
Input Low Voltage
V
IL
SEL, FREQ, XENS
XIN, Input slew rate
3 V/ns, 16.6 to 100
MHz
XIN, Input slew rate
3 V/ns, 100 to 134
MHz
GND
GND
VDD x 0.20
VDD x 0.20
V
V
GND
VDD x 0.10
V
Output High Voltage
Output Low Voltage
Input Capacitance
V
OH
V
OL
C
IN
CKOUT, I
OH
= -4 mA
CKOUT, I
OL
= 4 mA
XIN, SEL, XENS
CKOUT, 16.6 to 67
MHz
VDD - 0.5
GND
VDD
0.4
16
15
10
7
25
V
V
pF
pF
pF
pF
Ω
Load Capacitance
C
L
CKOUT, 67 to 100
MHz
CKOUT, 100 to 134
MHz
Output Impedance
Z
O
CKOUT, 16.6 to 134
MHz
IDT®
SPREAD SPECTRUM CLOCK GENERATOR
5
ICS7152
REV K 062911
FPGA/CPLD
京公网安备 11010802033920号
Copyright © 2005-2026 EEWORLD.com.cn, Inc. All rights reserved
电子工程世界
