NCL30388
Product Preview
Power Factor Corrected
LED Driver Featuring
Primary Side CC / CV
Control
The NCL30388 is a power factor corrected controller targeting
isolated and non−isolated constant current LED drivers. Designed to
support flyback, buck−boost and SEPIC topologies, the controller
operates in a quasi−resonant mode to provide high efficiency. Due to a
novel control method, the device is able to tightly regulate a constant
LED current from the primary side and provides near−unity power
factor. This removes the need for secondary side feedback circuitry, its
biasing and for an optocoupler.
The device is highly integrated with a minimum number of external
components. A robust suite of safety protection is built in to simplify
the design. This device is specifically intended for very compact space
efficient designs and also provides a constant voltage regulation of the
output if no load is connected to the LED driver.
Features
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MARKING
DIAGRAM
8
L30388x
ALYWX
G
1
SOIC−7
CASE 751U
L30388
x
A
L
Y
W
G
•
•
•
•
•
•
•
•
•
•
High Voltage Startup
Quasi−resonant Peak Current−mode Control Operation
Primary Side Feedback
CC / CV Control
Tight LED Constant Current Regulation of
±2%
Typical
Digital Power Factor Correction
Cycle by Cycle Peak Current Limit
Wide Operating V
CC
Range
−40
to + 125°C
Robust Protection Features
♦
Brown−Out
♦
OVP on V
CC
♦
Constant Voltage / LED Open Circuit Protection
♦
Winding Short Circuit Protection
♦
Secondary Diode Short Protection
♦
Output Short Circuit Protection
♦
Thermal Shutdown
= Specific Device Code
= Version
= Assembly Location
= Wafer Lot
= Year
= Work Week
= Pb−Free Package
PIN CONNECTIONS
COMP
ZCD
1
2
3
4
8
HV
CS
GND
6
5
ORDERING INFORMATION
See detailed ordering and shipping information on page 15 of
this data sheet.
Typical Applications
•
Integral LED Bulbs
•
LED Power Driver Supplies
•
LED Light Engines
This document contains information on a product under development. ON Semiconductor
reserves the right to change or discontinue this product without notice.
©
Semiconductor Components Industries, LLC, 2018
September, 2018
−
Rev. P2
1
Publication Order Number:
NCL30388/D
NCL30388
.
.
.
NCL30388
1
2
3
4
6
5
8
Figure 1. Typical Application Schematic in a Flyback Converter
PIN FUNCTION DESCRIPTION NCL30388
Pin No
1
2
Pin Name
COMP
ZCD
Function
OTA output for CV loop
Zero crossing Detection
V
aux
sensing
Pin Description
This pin receives a compensation network to stabilize the CV loop
This pin connects to the auxiliary winding and is used to detect the
core reset event.
This pin also senses the auxiliary winding voltage for accurate out-
put voltage control
This pin monitors the primary peak current.
The controller ground
The driver’s output to an external MOSFET
This pin is connected to an external auxiliary voltage.
This pin connects after the diode bridge to provide the startup cur-
rent and internal high voltage sensing function.
3
4
5
6
8
CS
GND
DRV
VCC
HV
Current sense
−
Driver output
Supplies the controller
High Voltage sensing
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2
NCL30388
INTERNAL CIRCUIT ARCHITECTURE
CS_shorted
Enable
Internal
Thermal
Shutdown
STOP
OFF
V
DD
V
REF
Fault
Management
UVLO
Latch
VCC
VCC Management
COM
P
Aux_SCP
Ipkmax
Constant Voltage Control
V
CV
W OD_SCP
BO_NOK
V
HVdiv
V
HVdiv
V
REF
BO_NOK
ZCD
HV
VCC_max
VCC Ov er Voltage
Protection
HV
STUP
Qdrv
FF_mode
Brown−Out
Zero Crossing Detection Logic
(ZCD Blanking , Time−Out, ...)
Aux. W inding Short Circuit Prot.
V
HVdiv
Aux_SCP
Valley
Selection
Frequency
Foldback
FF_mode
VCC
Clamp
Circuit
DRV
S
Q
V
VLY
R
Q
Qdrv
Line
feed-fo rw
ard
STOP
V
REF(PFC)
CS
Leading
Edge
Blanking
Constant-C urrent Control
CS_reset
Ipkmax
Enable
STOP
V
CV
Max. Peak
Current
Limit
Ipkmax
VREF
setpoint
V
REF
CS Short
Protection
CS_shorted
GND
W inding and
Output diode
Short Circuit
Protection
W OD_SCP
V
HVdiv
Generation of the
Reference Voltage
for Power
Factor Corr.
V
REF(PFC)
Figure 2. Internal Circuit Architecture NCL30388
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3
NCL30388
MAXIMUM RATINGS TABLE
Symbol
V
CC(MAX)
I
CC(MAX)
Rating
Maximum Power Supply voltage, VCC pin, continuous voltage
Maximum current for VCC pin
Value
−0.3
to 30
Internally limited
−0.3,
V
DRV
(Note 1)
−300,
+500
−0.3,
+500
±20
−0.3,
5.5 (Notes 2 and 6)
−2,
+5
180
150
−40
to +125
−60
to +150
2
300
1
Unit
V
mA
V
mA
V
mA
V
mA
°C/W
°C
°C
°C
kV
V
kV
V
DRV(MAX)
Maximum driver pin voltage, DRV pin, continuous voltage
I
DRV(MAX)
Maximum current for DRV pin
V
HV(MAX)
I
HV(MAX)
V
MAX
I
MAX
R
θJ−A
T
J(MAX)
Maximum voltage on HV pin
Maximum current for HV pin (dc current self−limited if operated within the allowed range)
Maximum voltage on low power pins (except pins HV, DRV and VCC)
Current range for low power pins (except pins HV, DRV and VCC)
Thermal Resistance Junction−to−Air
Maximum Junction Temperature
Operating Temperature Range
Storage Temperature Range
ESD Capability, HBM model (Note 3)
ESD Capability, MM model (Note 3)
ESD Capability, CDM model (Note 3)
Stresses exceeding those listed in the Maximum Ratings table may damage the device. If any of these limits are exceeded, device functionality
should not be assumed, damage may occur and reliability may be affected.
1. V
DRV
is the DRV clamp voltage V
DRV(high)
when V
CC
is higher than V
DRV(high)
. V
DRV
is V
CC
otherwise.
2. This level is low enough to guarantee not to exceed the internal ESD diode and 5.5 V ZENER diode. More positive and negative voltages
can be applied if the pin current stays within the
−2
mA / 5 mA range.
3. This device series contains ESD protection and exceeds the following tests: Human Body Model 2000 V per Mil−Std−883, Method 3015.
Charged Device Model 2000 V per JEDEC Standard JESD22−C101D
4. This device contains latch−up protection and exceeds 100 mA per JEDEC Standard JESD78.
ELECTRICAL CHARACTERISTICS
(Unless otherwise noted: For typical values T
J
= 25°C, V
CC
= 12 V, V
ZCD
= 0 V, , V
CS
= 0 V) For min/max values
T
J
=
−40°C
to +125°C, Max T
J
= 150°C, V
CC
= 12 V)
Description
HIGH VOLTAGE SECTION
High voltage current source
High voltage current source
V
CC
level for I
HV(start1)
to I
HV(start2)
transition
Minimum startup voltage
HV source leakage current
Maximum rms input voltage for correct operation of the PFC
loop (T
J
=
−20°C
to 125°C)
V
CC
= 0 V
V
HV
= 450 V
V
CC
= V
CC(on)
– 200 mV
V
CC
= 0 V
I
HV(start2)
I
HV(start1)
V
CC(TH)
V
HV(MIN)
I
HV(leak)
V
HV(OL)
265
−
3.3
4.7
300
2
17
4.5
−
10
6.1
mA
mA
V
V
mA
Vrms
Test Condition
Symbol
Min
Typ
Max
Unit
SUPPLY SECTION
Supply Voltage
Startup Threshold
Threshold for turning off DSS (Note 5)
Minimum Operating Voltage
Hysteresis V
CC(on)
– V
CC(off)
Internal logic reset
Over Voltage Protection
V
CC
OVP threshold
V
CC(off)
noise filter (Note 6)
V
CC(reset)
noise filter− (Note 6)
Supply Current
Device Disabled/Fault
Device Enabled/No output load on pin 5
Device Switching (F
sw
= 65 kHz)
Device switching (F
sw
= 15 kHz)
V
CC
> V
CC(off)
F
sw
= 65 kHz
C
DRV
= 470 pF,
F
sw
= 65 kHz
V
REFX
= 10%of max value
V
CC
increasing
V
CC
increasing
V
CC
decreasing
V
CC
decreasing
V
CC(on)
V
CC(on2)
V
CC(off)
V
CC(HYS)
V
CC(reset)
V
CC(OVP)
t
VCC(off)
t
VCC(reset)
I
CC1
I
CC2
I
CC3
I
CC4
16
9.77
8.2
7.8
4
25.0
−
−
1.2
–
−
−
18
10.50
8.8
−
5
26.5
5
20
1.5
3.0
3.3
2.9
20
11.24
9.4
−
6
28
−
−
1.8
3.5
4.0
3.4
V
V
ms
mA
5. Refer to ordering table option at the end of the document
6. Guaranteed by design.
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4
NCL30388
ELECTRICAL CHARACTERISTICS
(Unless otherwise noted: For typical values T
J
= 25°C, V
CC
= 12 V, V
ZCD
= 0 V, , V
CS
= 0 V) For min/max values
T
J
=
−40°C
to +125°C, Max T
J
= 150°C, V
CC
= 12 V)
Description
CURRENT SENSE
Maximum Internal current limit
Leading Edge Blanking Duration for V
ILIM
Propagation delay from current detection to gate off−state
Maximum on−time (option B)
Maximum on−time (option A)
Threshold for immediate fault protection activation (140% of V
ILIM
)
Leading Edge Blanking Duration for V
CS(stop)
Current source for CS to GND short detection
Current sense threshold for CS to GND short detection
V
CS
rising
V
ILIM
t
LEB
t
ILIM
t
on(MAX)
t
on(MAX2)
V
CS(stop)
t
BCS
I
CS(short)
V
CS(low)
1.31
270
−
29
16
1.91
−
400
20
1.38
330
100
39
20
1.99
170
500
60
1.45
390
150
49
24
2.07
−
600
100
V
ns
ns
ms
ms
V
ns
mA
mV
Test Condition
Symbol
Min
Typ
Max
Unit
GATE DRIVE
Drive Resistance
DRV Sink
DRV Source
Drive current capability
DRV Sink (Note GBD)
DRV Source (Note GBD)
Rise Time (10 % to 90 %)
Fall Time (90 % to 10 %)
DRV Low Voltage
C
DRV
= 470 pF
C
DRV
= 470 pF
V
CC
= V
CC(off)
+0.2 V
C
DRV
= 470 pF,
R
DRV
=33 kW
V
CC
= V
CC(MAX)
C
DRV
= 470 pF,
R
DRV
=33 kW
W
R
SNK
R
SRC
I
SNK
I
SRC
t
r
t
f
V
DRV(low)
−
−
−
−
–
–
8
13
30
500
300
30
20
–
−
−
mA
−
−
−
−
−
ns
ns
V
DRV High Voltage
V
DRV(high)
10
12
14
V
ZERO VOLTAGE DETECTION CIRCUIT
Upper ZCD threshold voltage
Lower ZCD threshold voltage
ZCD hysteresis
Propagation Delay from valley detection to DRV high
Blanking delay after on−time (ZCD blank option B)
Blanking Delay at light load (ZCD blank option B)
Blanking delay after on−time (ZCD blank option A)
Blanking Delay at light load (ZCD blank option A)
Timeout after last DEMAG transition
Pulling−down resistor
V
ZCD
= V
ZCD(falling)
V
ZCD
decreasing
V
REFX
> 0.35 V
V
REFX
< 0.25 V
V
REFX
> 0.35 V
V
REFX
< 0.25 V
V
ZCD
rising
V
ZCD
falling
V
ZCD(rising)
V
ZCD(falling)
V
ZCD(HYS)
t
ZCD(DEM)
t
ZCD(blank1)B
t
ZCD(blank2)B
t
ZCD(blank1)A
t
ZCD(blank2)A
t
TIMO
R
ZCD(pd)
−
35
15
−
1.1
0.6
0.75
0.45
5
90
55
−
−
1.5
0.8
1.0
0.6
6.5
200
150
−
−
150
1.9
1.0
1.25
0.75
8
mV
mV
mV
ns
ms
ms
ms
ms
ms
kW
CONSTANT CURRENT CONTROL
Reference Voltage at T
J
= 25°C to 85°C
Reference Voltage T
J
=
−40°C
to 125°C
Current sense lower threshold for detection of the leakage in-
ductance reset time
Blanking time for leakage inductance reset detection
V
CS
falling
V
REF
V
REF
V
CS(low)
t
CS(low)
0.326
0.323
20
−
0.333
0.333
50
120
0.340
0.343
100
−
V
V
mV
ns
CONSTANT VOLTAGE SECTION
Internal voltage reference for constant voltage regulation
T
J
= 25°C
V
REF(CV)
V
REF(CV)
2.42
2.38
2.48
2.48
2.54
2.58
V
V
Internal voltage reference for constant voltage regulation
T
J
=
−40°C
to 125°C
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