PL502-30
750kHz – 800MHz Low Phase Noise VCXO (for 12 to 25MHz Crystals)
FEATURES
750kHz to 800MHz output range
Low phase noise output
-127dBc/Hz for 155.52MHz @ 10kHz offset
-115dBc/Hz for 622.08MHz @ 10kHz offset
Selectable LVCMOS, LVPECL or LVDS output
Selectable High Drive or Standard Drive LVCMOS
12MHz to 25MHz crystal input
No external load capacitor or varicap required
Output Enable selector
Wide pull range (±200ppm)
3.3V operation
Available in Die form (65 mil x 62 mil)
DIE CONFIGURATION
65 mil
OUTSEL0^
OUTSEL1^
SEL0^
SEL1^
VDD
VDD
VDD
VDD
(1550,1475)
17
16
25
24
23
22
21
20
19
18
GNDBUF
LVCMOS
LVDSB
LVPECLB
VDDBUF
VDDBUF
LVPECL
LVDS
OE_SEL^
XIN
26
XOUT
SEL3^
62 mil
27
Die ID:
B3535-43
15
28
14
13
SEL2^
29
12
11
OE_CTRL
30
C502
10
VCON
31
1
2
3
4
5
6
7
8
9
GND
GND
GND
GND
GND
N/C
GND
DESCRIPTION
The PL502-30 is a monolithic low jitter and low
phase noise VCXO IC with LVCMOS, LVDS and
LVPECL output capabilities, covering the 750kHz to
800MHz output range. It allows the control of the
output frequency with an input voltage (VCON),
using a low cost 12MHz to 25MHz crystal.
This one IC can be used to produce a VCXO with
output frequencies ranging from F
XIN
/ 16 to F
XIN
x 32
thanks to the four frequency selector pads. This
makes the PL502-30 ideal as a universal die for
applications ranging from ADSL to SONET.
Y
X
(0,0)
Note: ^ denotes internal pull up
OUTPUT SELECTION AND ENABLE
OUTSEL1
(Pad #18)
0
0
1
1
OE_SELECT
(Pad #9)
OUTSEL0
(Pad #25)
0
1
0
1
Selected Output
High Drive LVCMOS
Standard Drive LVCMOS
LVPECL
LVDS
State
Output enabled
Tri-state
Tri-state
Output enabled
DIE SPECIFICATIONS
Name
Size
Reverse side
Pad dimensions
Thickness
Value
62 x 65 mil
GND
80 micron x 80 micron
8 mil
OE_CTRL
(Pad #30)
0 (Default)
1
0
1 (Default)
0
1 (Default)
Pad # 9:
Bond to GND to set to “0”, bond to VDD to set to “1”
Pad # 30: Logical states defined by PECL levels if OE_SELECT is “0”
Logical states defined by CMOS levels if OE_SELECT is “1”
Micrel Inc. • 2180 Fortune Drive • San Jose, CA 95131 • USA • tel +1(408) 944 -0800 • fax +1(408) 474-1000 •
www.micrel.com
Rev 5/16/11 Page 1
GNDBUF
PL502-30
750kHz – 800MHz Low Phase Noise VCXO (for 12 to 25MHz Crystals)
BLOCK DIAGRAM
VCON
Varicap
XIN
XOUT
Xtal Osc
VCO
Divider
Charge
Pump
+
Loop
Filter
SEL[3:0]
Reference
Divider
Phase
Detector
VCO
CLKBAR
CLK
OE
FREQUENCY SELECTION TABLE
SEL3
(Pad #28)
0
0
0
0
0
0
0
0
1
1
1
1
1
1
1
1
SEL2
(Pad #29)
0
0
0
0
1
1
1
1
0
0
0
0
1
1
1
1
SEL1
(Pad #19)
0
0
1
1
0
0
1
1
0
0
1
1
0
0
1
1
SEL0
(Pad #20)
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
Selected Multiplier
Reserved
Reserved
Reserved
Fin x 32
Reserved
Reserved
Fin / 8
Fin x 2
Reserved
Fin / 2
Fin / 16
Fin x 4
Fin / 4
Fin x 8
Fin x 16
No multiplication
All pads have internal pull-ups (default value is 1). Bond to GND to set to 0.
Micrel Inc. • 2180 Fortune Drive • San Jose, CA 95131 • USA • tel +1(408) 944 -0800 • fax +1(408) 474-1000 •
www.micrel.com
Rev 5/16/11 Page 2
PL502-30
750kHz – 800MHz Low Phase Noise VCXO (for 12 to 25MHz Crystals)
ELECTRICAL SPECIFICATIONS
1. Absolute Maximum Ratings
PARAMETERS
Supply Voltage
Input Voltage, DC
Output Voltage, DC
Storage Temperature
Ambient Operating Temperature*
Junction Temperature
Lead Temperature (soldering, 10s)
ESD Protection, Human Body Model
SYMBOL
V
DD
V
I
V
O
T
S
T
A
T
J
-0.5
-0.5
-65
-40
MIN.
MAX.
4.6
V
DD
+0.5
V
DD
+0.5
150
85
125
260
2
UNITS
V
V
V
C
C
C
C
kV
Exposure of the device under conditions beyond the limits specified by Maximum Ratings for extended periods may cause permanent damage to the
device and affect product reliability. These conditions represent a stress rating only, and functional operations of the dev ice at these or any other
conditions above the operationa l limits noted in this specification is not implied. Operating Temperature is guaranteed by design for all parts
(COMMERCIAL and INDUSTRIAL), but tested for COMMERCIAL grade only.
2. Crystal Specifications
PARAMETERS
Crystal Resonator Frequency
Crystal Loading Rating
Crystal Pullability
Recommended ESR
SYMBOL
F
XIN
C
L (x ta l)
C
0
/C
1 (x ta l)
R
E
CONDITIONS
Parallel Fundamental Mode
at VCON = 1.65V
AT cut
AT cut
MIN.
12
9.5
250
30
TYP.
MAX.
25
UNITS
MHz
pF
-
Ω
Note:
Crystal Loading rating: 9.5pF is the loading the crystal sees from the VCXO chip at VCON = 1.65V. It is assumed that the crystal will be at
nominal frequency at this load. If the crystal requires more load to be at nominal frequency, the additional load must be add ed externally. This
however may reduce the pull range.
3. Voltage Control Crystal Oscillator
PARAMETERS
VCXO Stabilization Time *
VCXO Tuning Range
CLK Output Pullability
VCXO Tuning Characteristic
Pull Range Linearity
VCON Pin Input Impedance
VCON Modulation BW
0V
VCON
3.3V, -3dB
2000
10
SYMBOL
T
VCXOSTB
CONDITIONS
From power valid
F
XIN
= 12MHz to 25MHz;
XTAL C
0
/C
1
< 250
0V
VCON
3.3V
VCON=1.65V,
1.65V
200
150
10
500
MIN.
TYP.
MAX.
10
UNITS
ms
ppm
ppm
ppm/V
%
kΩ
kHz
Note:
Parameters denoted wi th an asterisk (*) represent nominal characterization data and are not production tested to any specific limits.
Micrel Inc. • 2180 Fortune Drive • San Jose, CA 95131 • USA • tel +1(408) 944 -0800 • fax +1(408) 474-1000 •
www.micrel.com
Rev 5/16/11 Page 3
PL502-30
750kHz – 800MHz Low Phase Noise VCXO (for 12 to 25MHz Crystals)
4. General Electrical Specifications
PARAMETERS
Supply Current, Dynamic
(with loaded outputs,
15pF)
Operating Voltage
Output Clock Duty Cycle
SYMBOL
I
DD
V
DD
@ 50% V
DD
(LVCMOS)
@ 1.25V (LVDS)
@ V
DD
– 1.3V (LVPECL)
CONDITIONS
Fout<24MHz
LVPECL/
LVDS/
24MHz<Fout<96MHz
LVCMOS
96MHz<Fout<700MHz
2.97
45
50
MIN.
TYP.
MAX.
60/28/15
65/45/30
100/80/40
3.63
55
V
%
mA
UNITS
5. Jitter Specifications
PARAMETERS
Period Jitter,
RMS
Period Jitter,
Peak-to-Peak
Integrated Jitter,
RMS
CONDITIONS
With capacitive decoupling
between V
DD
and GND.
Over 10,000 cycles.
With capacitive decoupling
between V
DD
and GND.
Over 10,000 cycles.
Integrated 12 kHz to 20 MHz
FREQUENCY
155.52MHz
622.08MHz
155.52MHz
622.08MHz
155.52MHz
622.08MHz
MIN.
TYP.
4.3
5.0
35
45
2.4
2.5
MAX.
UNITS
ps
ps
ps
6. Phase Noise Specifications
PARAMETERS
Phase Noise,
relative to carrier
(typical)
FREQUENCY
155.52MHz
622.08MHz
@10Hz
-63
-52
@100Hz
-93
-83
@1kHz
-117
-105
@10kHz
-126
-113
@100kHz
-123
-110
UNITS
dBc/Hz
Note: Phase Noise measured at VCON = 0V
7. LVCMOS Electrical Characteristics
PARAMETERS
Output Drive Current
(Standard Drive)
Output Drive Current
(High Drive)
Output Clock Rise/Fall Time
(Standard Drive)
Output Clock Rise/Fall Time
(High Drive)
SYMBOL
I
OH
I
OL
I
OH
I
OL
CONDITIONS
V
OH
= V
DD
-0.4V, V
DD
=3.3V
V
OL
= 0.4V, V
DD
= 3.3V
V
OH
= V
DD
-0.4V, V
DD
=3.3V
V
OL
= 0.4V, V
DD
= 3.3V
0.3V ~ 3.0V with 15 pF load
0.3V ~ 3.0V with 15 pF load
MIN.
6
6
18
18
2.4
ns
1.2
TYP.
MAX.
UNITS
mA
mA
mA
mA
Micrel Inc. • 2180 Fortune Drive • San Jose, CA 95131 • USA • tel +1(408) 944 -0800 • fax +1(408) 474-1000 •
www.micrel.com
Rev 5/16/11 Page 4
PL502-30
750kHz – 800MHz Low Phase Noise VCXO (for 12 to 25MHz Crystals)
8. LVDS Electrical Characteristics
PARAMETERS
Output Differential Voltage
V
DD
Magnitude Change
Output High Voltage
Output Low Voltage
Offset Voltage
Offset Magnitude Change
Power-Off Leakage
Output Short Circuit Current
9. LVDS Switching Characteristics
PARAMETERS
Differential Clock Rise Time
Differential Clock Fall Time
LVDS Levels Test Circuit
OUT
SYMBOL
V
OD
V
OD
V
OH
V
OL
V
OS
V
OS
I
OXD
I
OSD
CONDITIONS
MIN.
247
-50
TYP.
355
1.4
MAX.
454
50
1.6
1.375
25
10
-8
UNITS
mV
mV
V
V
V
mV
uA
mA
R
L
= 100 Ω
(see figure)
0.9
1.125
0
1.1
1.2
3
1
-5.7
V
ou t
= V
DD
or GND
V
DD
= 0V
SYMBOL
t
r
t
f
CONDITIONS
R
L
= 100 Ω
C
L
= 10 pF
(see figure)
MIN.
TYP.
0.7
0.7
MAX.
1.0
1.0
UNITS
ns
ns
LVDS Switching Test Circuit
OUT
50?
C
L
= 10pF
V
OD
V
OS
V
DIFF
R
L
= 100?
50?
C
L
= 10pF
OUT
OUT
LVDS Transistion Time Waveform
OUT
0V (Differential)
OUT
80%
V
DIFF
20%
0V
80%
20%
t
R
t
F
Micrel Inc. • 2180 Fortune Drive • San Jose, CA 95131 • USA • tel +1(408) 944 -0800 • fax +1(408) 474-1000 •
www.micrel.com
Rev 5/16/11 Page 5
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