74LVC2G125-Q100
Dual bus buffer/line driver; 3-state
Rev. 3 — 10 September 2018
Product data sheet
1. General description
The 74LVC2G125-Q100 provides a dual non-inverting buffer/line driver with 3-state output. The
output enable input (pin nOE) controls the 3-state output. A HIGH-level at pin nOE causes the
output to assume a high-impedance OFF-state. Schmitt trigger action at all inputs makes the circuit
highly tolerant of slower input rise and fall times.
Inputs can be driven from either 3.3 V or 5 V devices. This feature allows the use of these devices
as translators in a mixed 3.3 V and 5 V environment.
This device is fully specified for partial power-down applications using I
OFF
. The I
OFF
circuitry
disables the output, preventing a damaging backflow current through the device when it is powered
down.
This product has been qualified to the Automotive Electronics Council (AEC) standard Q100
(Grade 1) and is suitable for use in automotive applications.
2. Features and benefits
•
•
•
•
•
•
Automotive product qualification in accordance with AEC-Q100 (Grade 1)
•
Specified from -40 °C to +85 °C and from -40 °C to +125 °C
Wide supply voltage range from 1.65 V to 5.5 V
5 V tolerant input/output for interfacing with 5 V logic
High noise immunity
Complies with JEDEC standard:
•
JESD8-7 (1.65 V to 1.95 V)
•
JESD8-5 (2.3 V to 2.7 V)
•
JESD8-B/JESD36 (2.7 V to 3.6 V)
ESD protection:
•
MIL-STD-883, method 3015 exceeds 2000 V
•
HBM JESD22-A114F exceeds 2000 V
•
MM JESD22-A115-A exceeds 200 V (C = 200 pF, R = 0 Ω)
±24 mA output drive (V
CC
= 3.0 V)
CMOS low-power consumption
Latch-up performance exceeds 250 mA
Direct interface with TTL levels
Inputs accept voltages up to 5 V
•
•
•
•
•
•
3. Ordering information
Table 1. Ordering information
Type number
Package
Temperature range
74LVC2G125DP-Q100
74LVC2G125DC-Q100
-40 °C to +125 °C
-40 °C to +125 °C
Name
TSSOP8
VSSOP8
Description
Version
plastic thin shrink small outline package; 8 leads; SOT505-2
body width 3 mm; lead length 0.5 mm
plastic very thin shrink small outline package;
8 leads; body width 2.3 mm
SOT765-1
Nexperia
74LVC2G125-Q100
Dual bus buffer/line driver; 3-state
4. Marking
Table 2. Marking codes
Type number
74LVC2G125DP-Q100
74LVC2G125DC-Q100
[1]
Marking code
[1]
V25
V25
The pin 1 indicator is located on the lower left corner of the device, below the marking code.
5. Functional diagram
74LVC2G125
1A
1OE
2A
2OE
mna941
74LVC2G125
1Y
EN1
2Y
1
EN2
2
001aae009
Fig. 1.
Logic symbol
Fig. 2.
IEC logic symbol
6. Pinning information
6.1. Pinning
74LVC2G125-Q100
1OE
1A
2Y
GND
1
2
3
4
aaa-007380
8
7
6
5
V
CC
2OE
1Y
2A
Fig. 3.
Pin configuration SOT505-2 (TSSOP8) and SOT765-1 (VSSOP8)
6.2. Pin description
Table 3. Pin description
Symbol
1OE, 2OE
1A, 2A
GND
1Y, 2Y
V
CC
Pin
1, 7
2, 5
4
6, 3
8
Description
output enable input (active LOW)
data input
ground (0 V)
data output
supply voltage
74LVC2G125_Q100
All information provided in this document is subject to legal disclaimers.
©
Nexperia B.V. 2018. All rights reserved
Product data sheet
Rev. 3 — 10 September 2018
2 / 12
Nexperia
74LVC2G125-Q100
Dual bus buffer/line driver; 3-state
7. Functional description
Table 4. Function table
H = HIGH voltage level; L = LOW voltage level; X = don’t care; Z = high-impedance OFF-state.
Control
nOE
L
L
H
Input
nA
L
H
X
Output
nY
L
H
Z
8. Limiting values
Table 5. Limiting values
In accordance with the Absolute Maximum Rating System (IEC 60134). Voltages are referenced to GND (ground 0 V).
Symbol Parameter
V
CC
I
IK
V
I
I
OK
V
O
supply voltage
input clamping current
input voltage
output clamping current
output voltage
V
O
> V
CC
or V
O
< 0 V
Enable mode
Disable mode
Power-down mode; V
CC
= 0 V
I
O
I
CC
I
GND
T
stg
P
tot
[1]
[2]
Conditions
V
I
< 0 V
[1]
[1]
[1]
[1]
Min
-0.5
-50
-0.5
-
-0.5
-0.5
-0.5
-
-
-100
-65
Max
+6.5
-
+6.5
±50
+6.5
+6.5
±50
100
-
+150
300
Unit
V
mA
V
mA
V
V
mA
mA
mA
°C
mW
V
CC
+ 0.5 V
output current
supply current
ground current
storage temperature
total power dissipation
V
O
= 0 V to V
CC
T
amb
= -40 °C to +125 °C
[2]
-
The input and output voltage ratings may be exceeded if the input and output current ratings are observed.
For TSSOP8 package: above 55 °C the value of P
tot
derates linearly with 2.5 mW/K.
For VSSOP8 package: above 110 °C the value of P
tot
derates linearly with 8 mW/K.
For XSON8, XQFN8 packages: above 118 °C the value of P
tot
derates linearly with 7.8 mW/K.
9. Recommended operating conditions
Table 6. Operating conditions
Symbol Parameter
V
CC
V
I
V
O
supply voltage
input voltage
output voltage
V
CC
= 1.65 V to 5.5 V; Enable mode
V
CC
= 1.65 V to 5.5 V; Disable mode
V
CC
= 0 V; Power-down mode
T
amb
Δt/ΔV
ambient temperature
input transition rise and fall rate
V
CC
= 1.65 V to 2.7 V
V
CC
= 2.7 V to 5.5 V
Conditions
Min
1.65
0
0
0
0
-40
-
-
Max
5.5
5.5
V
CC
5.5
5.5
+125
20
10
Unit
V
V
V
V
V
°C
ns/V
ns/V
74LVC2G125_Q100
All information provided in this document is subject to legal disclaimers.
©
Nexperia B.V. 2018. All rights reserved
Product data sheet
Rev. 3 — 10 September 2018
3 / 12
Nexperia
74LVC2G125-Q100
Dual bus buffer/line driver; 3-state
10. Static characteristics
Table 7. Static characteristics
At recommended operating conditions; voltages are referenced to GND (ground 0 V).
Symbol Parameter
Conditions
T
amb
= -40 °C to +85 °C
Min
V
IH
HIGH-level
input voltage
V
CC
= 1.65 V to 1.95 V
V
CC
= 2.3 V to 2.7 V
V
CC
= 2.7 V to 3.6 V
V
CC
= 4.5 V to 5.5 V
V
IL
LOW-level
input voltage
V
CC
= 1.65 V to 1.95 V
V
CC
= 2.3 V to 2.7 V
V
CC
= 2.7 V to 3.6 V
V
CC
= 4.5 V to 5.5 V
V
OL
LOW-level
output voltage
V
I
= V
IH
or V
IL
I
O
= 100 μA;
V
CC
= 1.65 V to 5.5 V
I
O
= 4 mA; V
CC
= 1.65 V
I
O
= 8 mA; V
CC
= 2.3 V
I
O
= 12 mA; V
CC
= 2.7 V
I
O
= 24 mA; V
CC
= 3.0 V
I
O
= 32 mA; V
CC
= 4.5 V
V
OH
HIGH-level
output voltage
V
I
= V
IH
or V
IL
I
O
= -100 μA;
V
CC
= 1.65 V to 5.5 V
I
O
= -4 mA; V
CC
= 1.65 V
I
O
= -8 mA; V
CC
= 2.3 V
I
O
= -12 mA; V
CC
= 2.7 V
I
O
= -24 mA; V
CC
= 3.0 V
I
O
= -32 mA; V
CC
= 4.5 V
I
I
I
OZ
I
OFF
I
CC
ΔI
CC
C
I
[1]
T
amb
=
Unit
-40 °C to +125 °C
Min
0.65V
CC
1.7
2.0
0.7V
CC
-
-
-
-
-
-
-
-
-
-
V
CC
- 0.1
0.95
1.7
1.9
2.0
3.4
-
-
-
-
-
-
Max
-
-
-
-
0.7
0.8
V
V
V
V
V
V
Typ
[1]
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
±0.1
±0.1
±0.1
0.1
5
2
Max
-
-
-
-
0.35V
CC
0.7
0.8
0.3V
CC
0.1
0.45
0.3
0.4
0.55
0.55
-
-
-
-
-
-
±1
±2
±2
4
500
-
0.65V
CC
1.7
2.0
0.7V
CC
-
-
-
-
-
-
-
-
-
-
V
CC
- 0.1
1.2
1.9
2.2
2.3
3.8
-
-
-
-
-
-
0.35V
CC
V
0.3V
CC
V
0.1
0.70
0.45
0.60
0.80
0.80
-
-
-
-
-
-
±1
±2
±2
4
500
-
V
V
V
V
V
V
V
V
V
V
V
V
μA
μA
μA
μA
μA
pF
input leakage
current
OFF-state
output current
power-off
leakage current
supply current
additional
supply current
input capacitance
V
I
= 5.5 V or GND;
V
CC
= 0 V to 5.5 V
V
I
= V
IH
or V
IL
;
V
O
= 5.5 V or GND; V
CC
= 3.6 V
V
I
or V
O
= 5.5 V; V
CC
= 0 V
V
I
= 5.5 V or GND;
V
CC
= 1.65 V to 5.5 V; I
O
= 0 A
per pin; V
I
= V
CC
- 0.6 V;
I
O
= 0 A; V
CC
= 2.3 V to 5.5 V
Typical values are measured at V
CC
= 3.3 V and at T
amb
= 25 °C.
74LVC2G125_Q100
All information provided in this document is subject to legal disclaimers.
©
Nexperia B.V. 2018. All rights reserved
Product data sheet
Rev. 3 — 10 September 2018
4 / 12
Nexperia
74LVC2G125-Q100
Dual bus buffer/line driver; 3-state
11. Dynamic characteristics
Table 8. Dynamic characteristics
Voltages are referenced to GND (ground 0 V); for test circuit see
Fig. 6.
Symbol Parameter
Conditions
T
amb
= -40 °C to +85 °C
Min
t
pd
propagation
delay
nA to nY; see
Fig. 4
V
CC
= 1.65 V to 1.95 V
V
CC
= 2.3 V to 2.7 V
V
CC
= 2.7 V
V
CC
= 3.0 V to 3.6 V
V
CC
= 4.5 V to 5.5 V
t
en
enable time
nOE to nY; see
Fig. 5
V
CC
= 1.65 V to 1.95 V
V
CC
= 2.3 V to 2.7 V
V
CC
= 2.7 V
V
CC
= 3.0 V to 3.6 V
V
CC
= 4.5 V to 5.5 V
t
dis
disable time
nOE to nY; see
Fig. 5
V
CC
= 1.65 V to 1.95 V
V
CC
= 2.3 V to 2.7 V
V
CC
= 2.7 V
V
CC
= 3.0 V to 3.6 V
V
CC
= 4.5 V to 5.5 V
C
PD
power dissipation per buffer; V
I
= GND to V
CC
capacitance
output enabled
output disabled
[1]
[2]
[3]
[4]
[5]
Typical values are measured at nominal V
CC
and at T
amb
= 25 °C.
t
pd
is the same as t
PLH
and t
PHL
.
t
en
is the same as t
PZH
and t
PZL
.
t
dis
is the same as t
PLZ
and t
PHZ
.
C
PD
is used to determine the dynamic power dissipation (P
D
in μW).
2
2
P
D
= C
PD
× V
CC
× f
i
× N + Σ(C
L
× V
CC
× f
o
) where:
f
i
= input frequency in MHz;
f
o
= output frequency in MHz;
C
L
= output load capacitance in pF;
V
CC
= supply voltage in V;
N = number of inputs switching;
2
Σ(C
L
× V
CC
× f
o
) = sum of outputs.
T
amb
=
Unit
-40 °C to +125 °C
Min
1.0
0.5
1.0
0.5
0.5
1.5
1.0
1.5
0.5
0.5
1.0
0.5
1.0
1.0
0.5
-
-
Max
11.4
6.0
6.0
5.5
4.6
12.4
7.0
7.1
5.9
4.8
14.1
7.6
6.2
5.9
4.6
-
-
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
pF
pF
Typ
[1]
3.7
2.5
2.7
2.3
1.9
4.3
2.8
3.3
2.4
2.0
3.5
1.8
2.7
2.7
1.8
18
5
Max
9.1
4.8
4.8
4.3
3.7
9.9
5.6
5.7
4.7
3.8
11.6
5.8
4.8
4.6
3.4
-
-
[2]
1.0
0.5
1.0
0.5
0.5
[3]
1.5
1.0
1.5
0.5
0.5
[4]
1.0
0.5
1.0
1.0
0.5
[5]
-
-
74LVC2G125_Q100
All information provided in this document is subject to legal disclaimers.
©
Nexperia B.V. 2018. All rights reserved
Product data sheet
Rev. 3 — 10 September 2018
5 / 12
聊聊、笑笑、闹闹
京公网安备 11010802033920号
Copyright © 2005-2026 EEWORLD.com.cn, Inc. All rights reserved
电子工程世界
