2Gb, 1.8V Multiple I/O Serial Flash Memory
Features
Micron Serial NOR Flash Memory
1.8V, Multiple I/O, 64KB Sector Erase
MT25QU02GCBB
Features
•
•
•
•
•
•
Stacked device (four 512Mb die)
SPI-compatible serial bus interface
Single and double transfer rate (STR/DTR)
Clock frequency
– 166 MHz (MAX) for all protocols in STR
– 90 MHz (MAX) for all protocols in DTR
Dual/quad I/O commands for increased through-
put up to 90 MB/s
Supported protocols in both STR and DTR
– Extended I/O protocol
– Dual I/O protocol
– Quad I/O protocol
Execute-in-place (XIP)
PROGRAM/ERASE SUSPEND operations
Volatile and nonvolatile configuration settings
Software reset
Additional reset pin for selected part numbers
3-byte and 4-byte address modes: enable memory
access beyond 128Mb
Dedicated 64-byte OTP area outside main memory
– Readable and user-lockable
– Permanent lock with PROGRAM OTP command
Erase capability
– Die erase
– Sector erase 64KB uniform granularity
– Subsector erase 4KB, 32KB granularity
Security and write protection
– Volatile and nonvolatile locking and software
write protection for each 64KB sector
– Nonvolatile configuration locking
– Password protection
– Hardware write protection: nonvolatile bits
(BP[3:0] and TB) define protected area size
– Program/erase protection during power-up
– CRC detects accidental changes to raw data
Electronic signature
– JEDEC-standard 3-byte signature (BB22h)
– Extended device ID: two additional bytes identify
device factory options
JESD47H-compliant
– Minimum 100,000 ERASE cycles per sector
– Data retention: 20 years (TYP)
Options
• Voltage
– 1.7–2.0V
• Density
– 2Gb
• Device stacking
– 4 die stacked
• Device generation
• Die revision
• Pin configuration
– RESET# and HOLD#
• Sector Size
– 64KB
• Packages – JEDEC-standard, RoHS-
compliant
– 24-ball T-PBGA 05/6mm x 8mm
(TBGA24)
• Standard security
• Special options
– Standard
– Automotive
• Operating temperature range
– From –40°C to +85°C
– From –40°C to +105°C
Marking
U
02G
C
B
B
8
E
12
0
S
A
IT
AT
•
•
•
•
•
•
•
•
•
•
•
09005aef8661dc96
mt25q-qlkt-U02-CBB-S-IT.pdf - Rev. G 10/18 EN
1
Products and specifications discussed herein are subject to change by Micron without notice.
Micron Technology, Inc. reserves the right to change products or specifications without notice.
© 2015 Micron Technology, Inc. All rights reserved.
2Gb, 1.8V Multiple I/O Serial Flash Memory
Features
Part Number Ordering
Micron Serial NOR Flash devices are available in different configurations and densities. Verify valid part numbers
by using Micron’s part catalog search at www.micron.com. To compare features and specifications by device type,
visit www.micron.com/products. Contact the factory for devices not found.
Figure 1: Part Number Ordering Information
MT 25Q L
Micron Technology
Part Family
25Q = SPI NOR
Voltage
L = 2.7–3.6V
U = 1.7–2.0V
Density
064 = 64Mb (8MB)
128 = 128Mb (16MB)
256 = 256Mb (32MB)
512 = 512Mb (64MB)
01G = 1Gb (128MB)
02G = 2Gb (256MB)
Stack
A = 1 die/1 S#
B = 2 die/1 S#
C = 4 die/1 S#
Device Generation
B = 2nd generation
Die Revision
A = Rev. A
B = Rev. B
Pin Configuration Option
1 = HOLD# pin
3 = RESET# pin
8 = RESET# and HOLD# pin
xxx
A
BA
1
E
SF - 0
S
IT
ES
Production Status
Blank = Production
ES = Engineering samples
QS = Qualification samples
Operating Temperature
IT = –40°C to +85°C
AT = –40°C to +105°C
UT = –40°C to +125°C
Special Options
S = Standard
A = Automotive grade AEC-Q100
Security Features
0 = Standard default security
Package Codes
12 = 24-ball T-PBGA, 05/6 x 8mm (5 x 5 array)
14 = 24-ball T-PBGA, 05/6 x 8mm (4 x 6 array)
SC = 8-pin SOP2, 150 mils
SE = 8-pin SOP2, 208 mils
SF = 16-pin SOP2, 300 mils
W7 = 8-pin W-PDFN, 6 x 5mm
W9 = 8-pin W-PDFN, 8 x 6mm
5x = WLCSP package
1
Sector size
E = 64KB sectors, 4KB and 32KB subsectors
Note:
1. WLCSP package codes, package size, and availability are density-specific. Contact the factory for availability.
09005aef8661dc96
mt25q-qlkt-U02-CBB-S-IT.pdf - Rev. G 10/18 EN
2
Micron Technology, Inc. reserves the right to change products or specifications without notice.
© 2015 Micron Technology, Inc. All rights reserved.
2Gb, 1.8V Multiple I/O Serial Flash Memory
Features
Contents
Important Notes and Warnings ......................................................................................................................... 8
Device Description ........................................................................................................................................... 9
Device Logic Diagram ................................................................................................................................. 10
Advanced Security Protection ..................................................................................................................... 10
Signal Assignments – Package Code: 12 ........................................................................................................... 11
Signal Descriptions ......................................................................................................................................... 12
Package Dimensions – Package Code: 12 ......................................................................................................... 13
Memory Map – 2Gb Density ............................................................................................................................ 15
Status Register ................................................................................................................................................ 16
Block Protection Settings ............................................................................................................................ 17
Flag Status Register ......................................................................................................................................... 18
Extended Address Register .............................................................................................................................. 19
Internal Configuration Register ....................................................................................................................... 20
Nonvolatile Configuration Register .................................................................................................................. 21
Volatile Configuration Register ........................................................................................................................ 23
Supported Clock Frequencies ..................................................................................................................... 24
Enhanced Volatile Configuration Register ........................................................................................................ 28
Security Registers ........................................................................................................................................... 29
Sector Protection Security Register .................................................................................................................. 30
Nonvolatile and Volatile Sector Lock Bits Security ............................................................................................ 31
Volatile Lock Bit Security Register .................................................................................................................... 31
Device ID Data ............................................................................................................................................... 32
Serial Flash Discovery Parameter Data ............................................................................................................. 33
Command Definitions .................................................................................................................................... 34
Software RESET Operations ............................................................................................................................ 40
RESET ENABLE and RESET MEMORY Commands ....................................................................................... 40
READ ID Operations ....................................................................................................................................... 41
READ ID and MULTIPLE I/O READ ID Commands ...................................................................................... 41
READ SERIAL FLASH DISCOVERY PARAMETER Operation .............................................................................. 42
READ SERIAL FLASH DISCOVERY PARAMETER Command ......................................................................... 42
READ MEMORY Operations ............................................................................................................................ 43
4-BYTE READ MEMORY Operations ................................................................................................................ 44
READ MEMORY Operations Timings ............................................................................................................... 45
WRITE ENABLE/DISABLE Operations ............................................................................................................. 52
READ REGISTER Operations ........................................................................................................................... 53
WRITE REGISTER Operations ......................................................................................................................... 55
CLEAR FLAG STATUS REGISTER Operation ..................................................................................................... 57
PROGRAM Operations .................................................................................................................................... 58
4-BYTE PROGRAM Operations ........................................................................................................................ 59
PROGRAM Operations Timings ....................................................................................................................... 59
ERASE Operations .......................................................................................................................................... 62
SUSPEND/RESUME Operations ..................................................................................................................... 64
PROGRAM/ERASE SUSPEND Operations .................................................................................................... 64
PROGRAM/ERASE RESUME Operations ...................................................................................................... 64
ONE-TIME PROGRAMMABLE Operations ....................................................................................................... 66
READ OTP ARRAY Command ...................................................................................................................... 66
PROGRAM OTP ARRAY Command .............................................................................................................. 66
ADDRESS MODE Operations .......................................................................................................................... 68
ENTER and EXIT 4-BYTE ADDRESS MODE Command ................................................................................ 68
DEEP POWER-DOWN Operations ................................................................................................................... 68
09005aef8661dc96
mt25q-qlkt-U02-CBB-S-IT.pdf - Rev. G 10/18 EN
3
Micron Technology, Inc. reserves the right to change products or specifications without notice.
© 2015 Micron Technology, Inc. All rights reserved.
2Gb, 1.8V Multiple I/O Serial Flash Memory
Features
ENTER DEEP POWER-DOWN Command ....................................................................................................
RELEASE FROM DEEP POWER-DOWN Command .......................................................................................
DEEP POWER-DOWN Timings ....................................................................................................................
QUAD PROTOCOL Operations ........................................................................................................................
ENTER or RESET QUAD INPUT/OUTPUT MODE Command .......................................................................
CYCLIC REDUNDANCY CHECK Operations ....................................................................................................
Cyclic Redundancy Check ...........................................................................................................................
State Table .....................................................................................................................................................
XIP Mode .......................................................................................................................................................
Activate and Terminate XIP Using Volatile Configuration Register .................................................................
Activate and Terminate XIP Using Nonvolatile Configuration Register ..........................................................
Confirmation Bit Settings Required to Activate or Terminate XIP ..................................................................
Terminating XIP After a Controller and Memory Reset .................................................................................
Power-Up and Power-Down ............................................................................................................................
Power-Up and Power-Down Requirements ..................................................................................................
Active, Standby, and Deep Power-Down Modes ................................................................................................
Power Loss and Interface Rescue .....................................................................................................................
Recovery ....................................................................................................................................................
Power Loss Recovery ...................................................................................................................................
Interface Rescue .........................................................................................................................................
Initial Delivery Status .....................................................................................................................................
Absolute Ratings and Operating Conditions .....................................................................................................
DC Characteristics and Operating Conditions ..................................................................................................
AC Characteristics and Operating Conditions ..................................................................................................
AC Reset Specifications ...................................................................................................................................
Program/Erase Specifications .........................................................................................................................
Revision History .............................................................................................................................................
Rev. G - 10/18 .............................................................................................................................................
Rev. F - 01/18 ..............................................................................................................................................
Rev. E - 12/17 ..............................................................................................................................................
Rev. D- 10/16 ..............................................................................................................................................
Rev. C - 06/16 .............................................................................................................................................
Rev. B - 9/15 ...............................................................................................................................................
Rev. A – 08/15 .............................................................................................................................................
68
68
69
71
71
72
72
74
75
75
75
76
76
77
77
79
79
79
80
80
80
81
83
85
88
92
93
93
93
93
93
93
93
93
09005aef8661dc96
mt25q-qlkt-U02-CBB-S-IT.pdf - Rev. G 10/18 EN
4
Micron Technology, Inc. reserves the right to change products or specifications without notice.
© 2015 Micron Technology, Inc. All rights reserved.
2Gb, 1.8V Multiple I/O Serial Flash Memory
Features
List of Figures
Figure 1: Part Number Ordering Information .................................................................................................... 2
Figure 2: Block Diagram .................................................................................................................................. 9
Figure 3: Logic Diagram ................................................................................................................................. 10
Figure 4: 24-Ball T-BGA, 5 x 5 (Balls Down) ..................................................................................................... 11
Figure 5: 24-Ball T-PBGA (5 x 5 ball grid array) – 6mm x 8mm .......................................................................... 13
Figure 6: Internal Configuration Register ........................................................................................................ 20
Figure 7: Sector and Password Protection ....................................................................................................... 29
Figure 8: RESET ENABLE and RESET MEMORY Command ............................................................................. 40
Figure 9: READ ID and MULTIPLE I/O READ ID Commands ........................................................................... 41
Figure 10: READ SERIAL FLASH DISCOVERY PARAMETER Command – 5Ah ................................................... 42
Figure 11: READ – 03h/13h
3
........................................................................................................................... 45
Figure 12: FAST READ – 0Bh/0Ch
3
................................................................................................................. 45
Figure 13: DUAL OUTPUT FAST READ – 3Bh/3Ch
3
......................................................................................... 46
Figure 14: DUAL INPUT/OUTPUT FAST READ – BBh/BCh
3
............................................................................ 46
Figure 15: QUAD OUTPUT FAST READ – 6Bh/6Ch
3
........................................................................................ 47
Figure 16: QUAD INPUT/OUTPUT FAST READ – EBh/ECh
3
............................................................................ 47
Figure 17: QUAD INPUT/OUTPUT WORD READ – E7h
3
................................................................................. 48
Figure 18: DTR FAST READ – 0Dh/0Eh
3
.......................................................................................................... 49
Figure 19: DTR DUAL OUTPUT FAST READ – 3Dh
3
........................................................................................ 49
Figure 20: DTR DUAL INPUT/OUTPUT FAST READ – BDh
3
............................................................................ 50
Figure 21: DTR QUAD OUTPUT FAST READ – 6Dh
3
........................................................................................ 51
Figure 22: DTR QUAD INPUT/OUTPUT FAST READ – EDh
3
............................................................................ 51
Figure 23: WRITE ENABLE and WRITE DISABLE Timing ................................................................................. 52
Figure 24: READ REGISTER Timing ................................................................................................................ 53
Figure 25: WRITE REGISTER Timing .............................................................................................................. 56
Figure 26: CLEAR FLAG STATUS REGISTER Timing ........................................................................................ 57
Figure 27: PAGE PROGRAM Command .......................................................................................................... 59
Figure 28: DUAL INPUT FAST PROGRAM Command ...................................................................................... 60
Figure 29: EXTENDED DUAL INPUT FAST PROGRAM Command ................................................................... 60
Figure 30: QUAD INPUT FAST PROGRAM Command ..................................................................................... 61
Figure 31: EXTENDED QUAD INPUT FAST PROGRAM Command ................................................................... 61
Figure 32: SUBSECTOR , SECTOR ERASE and DIE ERASE Timing .................................................................... 63
Figure 33: PROGRAM/ERASE SUSPEND and RESUME Timing ........................................................................ 65
Figure 34: READ OTP ARRAY Command Timing ............................................................................................. 66
Figure 35: PROGRAM OTP Command Timing ................................................................................................. 67
Figure 36: ENTER DEEP POWER-DOWN Timing ............................................................................................. 69
Figure 37: RELEASE FROM DEEP POWER-DOWN Timing ............................................................................... 70
Figure 38: XIP Mode Directly After Power-On .................................................................................................. 75
Figure 39: Power-Up Timing .......................................................................................................................... 78
Figure 40: AC Timing Input/Output Reference Levels ...................................................................................... 82
Figure 41: Reset AC Timing During PROGRAM and ERASE Cycle ..................................................................... 89
Figure 42: Reset Enable and Reset Memory Timing ......................................................................................... 89
Figure 43: Serial Input Timing STR ................................................................................................................. 89
Figure 44: Serial Input Timing DTR ................................................................................................................ 90
Figure 45: Write Protect Setup and Hold During WRITE STATUS REGISTER Operation (SRWD = 1) ................... 90
Figure 46: Hold Timing .................................................................................................................................. 90
Figure 47: Output Timing for STR ................................................................................................................... 91
Figure 48: Output Timing for DTR .................................................................................................................. 91
09005aef8661dc96
mt25q-qlkt-U02-CBB-S-IT.pdf - Rev. G 10/18 EN
5
Micron Technology, Inc. reserves the right to change products or specifications without notice.
© 2015 Micron Technology, Inc. All rights reserved.