74AC16244 • 74ACT16244 16-Bit Buffer/Line Driver with 3-STATE Outputs
August 1999
Revised May 2005
74AC16244 • 74ACT16244
16-Bit Buffer/Line Driver with 3-STATE Outputs
General Description
The AC16244 and ACT16244 contain sixteen non-inverting
buffers with 3-STATE outputs designed to be employed as
a memory and address driver, clock driver, or bus oriented
transmitter/receiver. The device is nibble controlled. Each
nibble has separate 3-STATE control inputs which can be
shorted together for full 16-bit operation.
Features
s
Separate control logic for each byte and nibble
s
16-bit version of the AC244/ACT244
s
Outputs source/sink 24 mA
s
ACT16244 has TTL-compatible inputs
Ordering Code:
Order Number
74AC16244SSC
74ACT16244SSC
74ACT16244MTD
Package Number
MS48A
MS48A
MTD48
Package Description
48-Lead Small Shrink Outline Package (SSOP), JEDEC MO-118, 0.300" Wide
48-Lead Small Shrink Outline Package (SSOP), JEDEC MO-118, 0.300" Wide
48-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 6.1mm Wide
Device also available in Tape and Reel. Specify by appending suffix letter “X” to the ordering code.
Logic Symbol
Connection Diagram
Pin Descriptions
Pin Names
OE
n
I
0
- I
15
O
0
- 0
15
Description
Output Enable Input (Active LOW)
Inputs
Outputs
FACT
¥
is a trademark of Fairchild Semiconductor Corporation.
© 2005 Fairchild Semiconductor Corporation
DS500295
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74AC16244 • 74ACT16244
Functional Description
The AC16244 and ACT16244 contain sixteen non-inverting
buffers with 3-STATE standard outputs. The device is nib-
ble (4 bits) controlled with each nibble functioning identi-
cally, but independent of the other. The control pins can be
shorted together to obtain full 16-bit operation. The
3-STATE outputs are controlled by an Output Enable (OE
n
)
input for each nibble. When OE
n
is LOW, the outputs are in
2-state mode. When OE
n
is HIGH, the outputs are in the
high impedance mode, but this does not interfere with
entering new data into the inputs.
Truth Tables
Inputs
OE
1
L
L
H
I
0
–I
3
L
H
X
Outputs
O
0
–O
3
L
H
Z
OE
2
L
L
H
Inputs
I
4
–I
7
L
H
X
Outputs
O
4
–O
7
L
H
Z
Inputs
OE
3
L
L
H
L LOW Voltage Level
H HIGH Voltage Level
Outputs
I
8
–I
11
L
H
X
O
8
–O
11
L
H
Z
X
Z
Inputs
OE
4
L
L
H
Immaterial
High Impedance
Outputs
I
12
–I
15
L
H
X
O
12
–O
15
L
H
Z
Logic Diagram
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2
74AC16244 • 74ACT16244
Absolute Maximum Ratings
(Note 1)
Supply Voltage (V
CC
)
DC Input Diode Current (I
IK
)
V
I
V
I
V
O
0.5V to
7.0V
20 mA
20 mA
Recommended Operating
Conditions
Supply Voltage (V
CC
)
AC
ACT
Input Voltage (V
I
)
Output Voltage (V
O
)
Operating Temperature (T
A
)
Minimum Input Edge Rate (
'
V/
'
t)
AC Devices
V
IN
from 30% to 70%
V
CC
@ 3.3V, 4.5V, 5.5V
Minimum Input Edge Rate (
'
V/
'
t)
ACT Devices
V
IN
from 0.8V to 2.0V
V
CC
@ 4.5V, 5.5V
125 mV/ns
Note 1:
Absolute maximum ratings are those values beyond which damage
to the device may occur. The databook specifications should be met, with-
out exception to ensure that the system design is reliable over its power
supply, temperature, and output/input loading variables. Fairchild does not
recommend operation of FACT
¥
circuits outside databook specifications.
0.5V
V
CC
0.5V
0.5V
V
CC
0.5V
2.0V to 6.0V
4.5V to 5.5V
0V to V
CC
0V to V
CC
DC Output Diode Current (I
OK
)
20 mA
20 mA
V
O
0.5V to V
CC
0.5V
DC Output Voltage (V
O
)
DC Output Source/Sink Current (I
O
)
r
50 mA
DC V
CC
or Ground Current
per Output Pin
Junction Temperature
Storage Temperature
40
q
C to
85
q
C
r
50 mA
140
q
C
65
q
C to
150
q
C
125 mV/ns
DC Electrical Characteristics for AC
Symbol
V
IH
Parameter
Minimum HIGH Input Voltage
V
CC
(V)
3.0
4.5
5.5
V
IL
Maximum LOW Input Voltage
3.0
4.5
5.5
V
OH
Minimum HIGH Output Voltage
3.0
4.5
5.5
3.0
4.5
5.5
V
OL
Maximum LOW Output Voltage
3.0
4.5
5.5
3.0
4.5
5.5
I
OZ
Maximum 3-STATE Leakage Current
5.5
0.002
0.001
0.001
T
A
Typ
1.5
2.25
2.75
1.5
2.25
2.75
2.99
4.49
5.49
2.1
3.15
3.85
0.9
1.35
1.65
2.9
4.4
5.4
2.56
3.86
4.86
0.1
0.1
0.1
0.36
0.36
0.36
0.50
25
q
C
T
A
40
q
C to
85
q
C
2.1
3.15
3.85
0.9
1.35
1.65
2.9
4.4
5.4
2.46
3.76
4.76
0.1
0.1
0.1
0.44
0.44
0.44
Guaranteed Limits
Units
V
OUT
V
Conditions
0.1V
or V
CC
0.1V
V
OUT
0.1V
V
or V
CC
0.1V
V
I
OUT
I
OH
50
P
A
-12 mA
V
I
OH
I
OH
24 mA
24 mA (Note 2)
50
P
A
12 mA
24 mA
24 mA (Note 2)
V
IL
, V
IH
V
CC
, GND
V
CC
, GND
V
CC
, GND
V
CC
or GND
1.65V Max
3.85V Min
V
I
OUT
I
OL
V
I
OL
I
OL
r
5.0
P
A
V
I
(OE)
V
I
V
O
I
IN
I
CC
I
OLD
I
OHD
Maximum Input Leakage Current (Note 3)
Max Quiescent Supply Current (Note 3)
Minimum Dynamic
Output Current (Note 4)
5.5
5.5
5.5
5.5
r
0.1
8.0
r
1.0
80.0
75
P
A
P
A
mA
mA
V
I
V
IN
V
OLD
V
OHD
75
Note 2:
All outputs loaded; thresholds associated with output under test.
Note 3:
I
IN
and I
CC
@ 3.0V are guaranteed to be less than or equal to the respective limit @ 5.5V V
CC
.
Note 4:
Maximum test duration 2.0 millisecond; one output loaded at a time.
3
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74AC16244 • 74ACT16244
DC Electrical Characteristics for ACT
Symbol
V
IH
V
IL
V
OH
Parameter
Minimum HIGH Input Voltage
Maximum LOW Input Voltage
Minimum HIGH Output Voltage
V
CC
(V)
4.5
5.5
4.5
5.5
4.5
5.5
4.5
5.5
V
OL
Maximum LOW Output Voltage
4.5
5.5
4.5
5.5
I
OZ
I
IN
I
CCT
I
CC
I
OLD
I
OHD
Maximum 3-STATE Leakage Current
Maximum Input Leakage Current
Maximum I
CC
/Input
Max Quiescent Supply Current
Minimum Dynamic
Output Current (Note 6)
5.5
5.5
5.5
5.5
5.5
0.6
8.0
0.001
0.001
T
A
Typ
1.5
1.5
1.5
1.5
4.49
5.49
2.0
2.0
0.8
0.8
4.4
5.4
3.86
4.86
0.1
0.1
0.36
0.36
25
q
C
T
A
40
q
C to
85
q
C
2.0
2.0
0.8
0.8
4.4
5.4
3.76
4.76
0.1
0.1
0.44
0.44
Guaranteed Limits
Units
V
V
V
V
OUT
V
OUT
Conditions
0.1V
0.1V
or V
CC
0.1V
or V
CC
0.1V
I
OUT
V
IN
50
P
A
V
IL
or V
IH
V
I
OH
I
OH
24 mA
24 mA (Note 5)
50
P
A
V
IL
or V
IH
24 mA
24 mA (Note 5)
V
IL
, V
IH
V
CC
, GND
V
CC
, GND
V
CC
2.1V
V
CC
or GND
1.65V Max
3.85V Min
V
I
OUT
V
IN
V
I
OH
I
OH
V
I
V
O
V
I
V
I
V
IN
V
OLD
V
OHD
r
0.5
r
0.1
r
5.0
r
1.0
1.5
80.0
75
P
A
P
A
mA
P
A
mA
mA
75
Note 5:
All outputs loaded; thresholds associated with output under test.
Note 6:
Maximum test duration 2.0 millisecond; one output loaded at a time.
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4
74AC16244 • 74ACT16244
AC Electrical Characteristics for AC
V
CC
Symbol
t
PLH
t
PHL
t
PZH
t
PZL
t
PHZ
t
PLZ
Parameter
Propagation Delay
Data to Output
Propagation Delay
Data to Output
Output Enable Time
Output Enable Time
Output Disable Time
Output Disable Time
(V)
(Note 7)
3.3
5.0
3.3
5.0
3.3
5.0
3.3
5.0
3.3
5.0
3.3
5.0
Note 7:
Voltage Range 5.0 is 5.0V
r
0.5V.
Voltage Range 3.3 is 3.3V
r
0.3V.
T
A
C
L
Min
2.0
1.6
2.4
2.0
2.2
1.7
2.9
2.2
3.1
1.9
2.4
1.7
25
q
C
50 pF
Typ
6.3
4.6
5.7
4.3
6.2
4.6
6.4
4.7
5.5
3.9
4.7
3.6
Max
9.4
6.5
10.7
7.0
10
6.7
13.0
8.1
8.4
7.8
8.1
7.2
T
A
40
q
C to
85
q
C
C
L
50 pF
Max
10.8
7.1
11.8
7.9
11.5
7.5
14.6
9.0
9.1
8.4
8.8
7.6
ns
ns
ns
ns
ns
ns
Units
Min
2.0
1.6
2.4
2.0
2.2
1.7
2.9
2.2
3.1
1.9
2.4
1.7
AC Electrical Characteristics for ACT
V
CC
Symbol
Parameter
(V)
(Note 8)
t
PLH
t
PHL
t
PZH
t
PZL
t
PHZ
t
PLZ
Propagation Delay
Data to Output
Output Enable
Time
Output Disable
Time
5.0
5.0
5.0
Min
3.0
2.5
2.5
2.7
2.3
2.0
T
A
C
L
25
q
C
50 pF
Typ
5.2
4.8
5.0
4.6
5.0
4.6
Max
7.3
6.8
7.4
7.5
7.9
7.4
T
A
40
q
C to
85
q
C
C
L
50 pF
Max
7.8
7.3
7.9
8.0
8.2
7.9
ns
ns
ns
Units
Min
3.0
2.5
2.5
2.7
2.3
2.0
Note 8:
Voltage Range 5.0 is 5.0V
r
0.5V.
Capacitance
Symbol
C
IN
C
OUT
C
PD
Input Pin Capacitance
Output Pin Capacitance
Power Dissipation Capacitance
74AC16244
74ACT16244
Parameter
Typ
4.5
12
35
30
Units
pF
pF
pF
V
CC
V
CC
V
CC
5.0V
5.0V
5.0V
Conditions
5
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