MC74AC257, MC74ACT257
Quad 2-Input Multiplexer
with 3-State Outputs
The MC74AC257/74ACT257 is a quad 2−input multiplexer with
3−state outputs. Four bits of data from two sources can be selected
using a Common Data Select input. The four outputs present the
selected data in true (noninverted) form. The outputs may be switched
to a high impedance state by placing a logic HIGH on the common
Output Enable (OE) input, allowing the outputs to interface directly
with bus−oriented systems.
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MARKING
DIAGRAMS
16
16
1
SOIC−16
D SUFFIX
CASE 751B
1
16
16
1
TSSOP−16
DT SUFFIX
CASE 948F
1
xxx
= AC or ACT
A
= Assembly Location
WL or L = Wafer Lot
Y
= Year
WW or W = Work Week
G or
G
= Pb−Free Package
(Note: Microdot may be in either location)
xxx
257
ALYWG
G
xxx257G
AWLYWW
•
•
•
•
•
Multiplexer Expansion by Tying Outputs Together
Noninverting 3−State Outputs
Outputs Source/Sink 24 mA
′ACT257
Has TTL Compatible Inputs
These are Pb−Free Devices
V
CC
16
OE
15
I
0c
14
I
1c
13
Z
c
12
I
0d
11
I
1d
10
Z
d
9
1
S
2
I
0a
3
I
1a
4
Z
a
5
I
0b
6
I
1b
7
Z
b
8
GND
Figure 1. Pinout: 16−Lead Packages Conductors
(Top View)
ORDERING INFORMATION
See detailed ordering and shipping information in the package
dimensions section on page 7 of this data sheet.
©
Semiconductor Components Industries, LLC, 2015
1
March, 2015 − Rev. 8
Publication Order Number:
MC74AC257/D
MC74AC257, MC74ACT257
PIN NAME
PIN
S
OE
I
0a
−I
0d
I
1a
−I
1d
Z
a
−Z
d
FUNCTION
Common Data Select Input
3−State Output Enable Input
Data Inputs from Source 0
Data Inputs from Source 1
3−State Multiplexer Outputs
FUNCTIONAL DESCRIPTION
The MC74AC257/74ACT257 is a quad 2−input
multiplexer with 3−state outputs. It selects four bits of data
from two sources under control of a Common Data Select
input. When the Select input is LOW, the I
0x
inputs are
selected and when Select is HIGH, the I
1x
inputs are
selected. The data on the selected inputs appears at the
outputs in true (noninverted) form. The device is the logic
implementation of a 4−pole, 2−position switch where the
position of the switch is determined by the logic levels
supplied to the Select input. The logic equations for the
outputs are shown below:
Z
a
= OE
•
(I
1a
•
S+I
0a
•
S)
Z
b
= OE
•
(I
1b
•
S+I
0b
•
S)
Z
c
= OE
•
(I
1c
•
S+I
0c
•
S)
Z
d
= OE
•
(I
1d
•
S+I
0d
•
S)
When the Output Enable input (OE) is HIGH, the outputs
are forced to a high impedance state. If the outputs are tied
together, all but one device must be in the high impedance
state to avoid high currents that would exceed the maximum
ratings. Designers should ensure the Output Enable signals
to 3−state devices whose outputs are tied together are
designed so there is no overlap.
TRUTH TABLE
Output
Enable
OE
H
L
L
L
L
H = HIGH Voltage Level
L = LOW Voltage Level
X = Immaterial
Z = High Impedance
Select
Input
S
X
H
H
L
L
Data
Inputs
I
0
X
X
X
L
H
I
1
X
L
H
X
X
Outputs
Z
Z
L
H
L
H
OE I
0a
I
1a
I
0b
I
1b
I
0c
I
1c
I
0d
I
1d
S
Z
a
Z
b
Z
c
Z
d
Figure 2. Logic Symbol
OE
I
0a
I
1a
I
0b
I
1b
I
0c
I
1c
I
0d
I
1d
S
Z
a
NOTE:
Z
b
Z
c
Z
d
This diagram is provided only for the understanding of logic operations
and should not be used to estimate propagation delays.
Figure 3. Logic Diagram
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2
MC74AC257, MC74ACT257
MAXIMUM RATINGS
Symbol
V
CC
V
I
V
O
I
IK
I
OK
I
O
I
CC
I
GND
T
STG
T
L
T
J
q
JA
P
D
MSL
F
R
V
ESD
DC Supply Voltage
DC Input Voltage
DC Output Voltage (Note 1)
DC Input Diode Current
DC Output Diode Current
DC Output Sink/Source Current
DC Supply Current per Output Pin
DC Ground Current per Output Pin
Storage Temperature Range
Lead temperature, 1 mm from Case for 10 Seconds
Junction temperature under Bias
Thermal Resistance (Note 2)
Power Dissipation in Still Air at 65°C (Note 3)
Moisture Sensitivity
Flammability Rating
ESD Withstand Voltage
Oxygen Index: 30% − 35%
Human Body Model (Note 4)
Machine Model (Note 5)
Charged Device Model (Note 6)
Above V
CC
and Below GND at 85°C (Note 7)
SOIC
TSSOP
SOIC
TSSOP
Parameter
Value
−0.5 to +7.0
*0.5
≤
V
CC
+0.5
*0.5
≤
V
CC
+0.5
±20
±50
±50
±50
±50
−65 to +150
260
+150
69.1
103.8
500
500
Level 1
UL 94 V−0 @ 0.125 in
> 2000
> 200
> 1000
±100
V
Unit
V
V
V
mA
mA
mA
mA
mA
°C
°C
°C
°C/W
mW
I
Latch−Up
Latch−Up Performance
mA
Stresses exceeding those listed in the Maximum Ratings table may damage the device. If any of these limits are exceeded, device functionality
should not be assumed, damage may occur and reliability may be affected.
1. I
O
absolute maximum rating must be observed.
2. The package thermal impedance is calculated in accordance with JESD51−7.
3. 500 mW at 65°C; derate to 300 mW by 10 mW/ from 65°C to 85°C.
4. Tested to EIA/JESD22−A114−A.
5. Tested to EIA/JESD22−A115−A.
6. Tested to JESD22−C101−A.
7. Tested to EIA/JESD78.
RECOMMENDED OPERATING CONDITIONS
Symbol
V
CC
V
IN
, V
OUT
Supply Voltage
DC Input Voltage, Output Voltage (Ref. to GND)
V
CC
@ 3.0 V
t
r
, t
f
Input Rise and Fall Time (Note 1)
′AC
Devices except Schmitt Inputs
Input Rise and Fall Time (Note 2)
′ACT
Devices except Schmitt Inputs
Operating Ambient Temperature Range
Output Current − High
Output Current − Low
V
CC
@ 4.5 V
V
CC
@ 5.5 V
t
r
, t
f
T
A
I
OH
I
OL
V
CC
@ 4.5 V
V
CC
@ 5.5 V
Parameter
′AC
′ACT
Min
2.0
4.5
0
−
−
−
−
−
−40
−
−
Typ
5.0
5.0
−
150
40
25
10
8.0
25
−
−
Max
6.0
5.5
V
CC
−
−
−
−
ns/V
−
85
−24
24
°C
mA
mA
ns/V
V
V
Unit
Functional operation above the stresses listed in the Recommended Operating Ranges is not implied. Extended exposure to stresses beyond
the Recommended Operating Ranges limits may affect device reliability.
1. 1. V
in
from 30% to 70% V
CC
; see individual Data Sheets for devices that differ from the typical input rise and fall times.
2. 2. V
in
from 0.8 V to 2.0 V; see individual Data Sheets for devices that differ from the typical input rise and fall times.
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3
MC74AC257, MC74ACT257
DC CHARACTERISTICS
74AC
Symbol
Parameter
V
CC
(V)
T
A
= +25°C
Typ
V
IH
Minimum High Level
Input Voltage
Maximum Low Level
Input Voltage
Minimum High Level
Output Voltage
3.0
4.5
5.5
3.0
4.5
5.5
3.0
4.5
5.5
3.0
4.5
5.5
V
OL
Maximum Low Level
Output Voltage
3.0
4.5
5.5
3.0
4.5
5.5
I
IN
I
OZ
Maximum Input
Leakage Current
Maximum
3−State
Current
†Minimum Dynamic
Output Current
Maximum Quiescent
Supply Current
5.5
1.5
2.25
2.75
1.5
2.25
2.75
2.99
4.49
5.49
−
−
−
0.002
0.001
0.001
−
−
−
−
74AC
T
A
=
−40°C to
+85°C
Unit
Conditions
Guaranteed Limits
2.1
3.15
3.85
0.9
1.35
1.65
2.9
4.4
5.4
2.56
3.86
4.86
0.1
0.1
0.1
0.36
0.36
0.36
±0.1
2.1
3.15
3.85
0.9
1.35
1.65
2.9
4.4
5.4
2.46
3.76
4.76
0.1
0.1
0.1
0.44
0.44
0.44
±1.0
V
V
OUT
= 0.1 V
or V
CC
− 0.1 V
V
OUT
= 0.1 V
or V
CC
− 0.1 V
I
OUT
= −50
mA
V
*V
IN
= V
IL
or V
IH
−12 mA
I
OH
−24 mA
−24 mA
I
OUT
= 50
mA
V
*V
IN
= V
IL
or V
IH
12 mA
I
OL
24 mA
24 mA
V
I
= V
CC
, GND
V
I
(OE) = V
IL
, V
IH
V
I
= V
CC
, GND
V
O
= V
CC
, GND
V
OLD
= 1.65 V Max
V
OHD
= 3.85 V Min
V
IN
= V
CC
or GND
V
IL
V
V
OH
V
V
mA
5.5
5.5
5.5
5.5
−
−
−
−
±0.5
−
−
8.0
±5.0
75
−75
80
mA
mA
mA
mA
I
OLD
I
OHD
I
CC
*All outputs loaded; thresholds on input associated with output under test.
†Maximum test duration 2.0 ms, one output loaded at a time.
NOTE: I
IN
and I
CC
@ 3.0 V are guaranteed to be less than or equal to the respective limit @ 5.5 V V
CC
.
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MC74AC257, MC74ACT257
AC CHARACTERISTICS
(For Figures and Waveforms − See Section 3 of the ON Semiconductor FACT Data Book, DL138/D)
74AC
Symbol
Parameter
V
CC
*
(V)
Min
t
PLH
t
PHL
t
PLH
t
PHL
t
PZH
t
PZL
t
PHZ
t
PLZ
Propagation Delay
I
n
to Z
n
Propagation Delay
I
n
to Z
n
Propagation Delay
S to Z
n
Propagation Delay
S to Z
n
Output Enable Time
Output Enable Time
Output Disable Time
Output Disable Time
3.3
5.0
3.3
5.0
3.3
5.0
3.3
5.0
3.3
5.0
3.3
5.0
3.3
5.0
3.3
5.0
1.5
1.5
1.5
1.5
1.5
1.5
1.5
1.5
1.5
1.5
1.5
1.5
1.5
1.5
1.5
1.5
T
A
= +25°C
C
L
= 50 pF
Typ
5.0
4.0
6.0
4.5
7.0
5.0
7.5
5.5
6.5
5.0
5.5
5.0
5.5
5.0
5.5
5.0
Max
8.5
6.0
8.5
6.0
10.5
7.5
10.5
7.5
9.5
7.5
9.0
8.5
10.0
9.0
9.0
8.0
74AC
T
A
= −40°C
to +85°C
C
L
= 50 pF
Min
1.0
1.0
1.0
1.0
1.5
1.0
1.5
1.0
1.0
1.0
1.0
1.0
1.0
1.0
1.0
1.0
Max
9.0
7.0
9.0
7.0
11.5
8.5
11.5
8.5
10.5
8.5
10.0
9.5
11.0
10.0
10.0
9.0
ns
ns
ns
ns
ns
ns
ns
ns
3−5
3−5
3−6
3−6
3−7
3−8
3−7
3−8
Unit
Fig.
No.
*Voltage Range 3.3 V is 3.3 V
±0.3
V.
*Voltage Range 5.0 V is 5.0 V
±0.5
V.
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