CAUTION: Stresses above those listed in “Absolute Maximum Ratings” may cause permanent damage to the device. This is a stress only rating and operation of the
device at these or any other conditions above those indicated in the operational sections of this specification is not implied.
IMPORTANT NOTE: All parameters having Min/Max specifications are guaranteed. Typical values are for information purposes only. Unless otherwise noted, all tests
are at the specified temperature and are pulsed tests, therefore: T
J
= T
C
= T
A
DC Electrical Specifications
PARAMETER
AMPLIFIER SECTION (HOLD
= 5V)
Ib+
Ib-
A
VOL
V
OUT+
V
OUT-
I
SC
RESTORE SECTION
V
OS
, Comp
I
OUT
PSRR
Ib V
REF
V
H
HOLD
V
L
HOLD
I
IH
, Hold
I
IL
, Hold
I
S
V+ = +5V, Load = 1k; T
A
= +25°C
CONDITION
MIN
TYP
MAX
UNIT
DESCRIPTION
IN+ Input Bias Current
IN- Input Bias Current
Open Loop Gain
High Output Level
Low Output Level
Short Circuit Current
V
IN+
= 2.5V
V
IN-
= 1.3V
-7
-30
60
20
-1
µA
µA
dB
V
R
L
= 1k
IL = 0mA
3.5
5
100
mV
mA
Composite Input Offset Voltage
Restoring Current Available
Power Supply Rejection Ratio
V
REF
Input Bias Current
HOLD Logic Input Low
HOLD Logic Input High
HOLD Input Current @ Logic High
HOLD Input Current @ Logic Low
Supply Current
V
REF
= 0V to +2.5V
10
300
15
mV
µA
dB
V+ = 5V to 6V
V
REF
= +2.5V
70
-0.8
90
-0.5
-0.2
0.8
µA
V
V
2.0
V
HOLD
= 5V
V
HOLD
= 0V
V
HOLD
= 0V
-15
-5
17
20
30
5
23
µA
µA
mA
AC Electrical Specifications
PARAMETER
AMPLIFIER SECTION
SR
tr, tf
tpd
-3dB BW
V
S
= +5V, V
REF
= 0V
DC
, R
L
= 150, R
F
and R
G
= 475; A
V
= 2, T
A
= +25°C.
CONDITION
MIN
TYP
MAX
UNITS
DESCRIPTION
Slew Rate; 2V
P-P
, 20% to 80%
Output Rise and Fall Times
Propagation Delay, IN+ to Output
Small Signal; Unity Gain
Large Signal; Unity Gain
Small Signal; A
V
= +2
Large Signal; A
V
= +2
V
OUT
= 0.2Vp-p; 10% to 90%
V
OUT
= 0.2V; 10% to 10%
R
F
= 0; R
G
= inf.; C
L
= 0.6pF,
V
OUT
= 0.2V
P-P
R
F
= 0; R
G
= inf.; C
L
= 0.6pF,
V
OUT
= 2V
P-P
C
L
= 0.6pF, V
OUT
= 0.2V
P-P
C
L
= 0.6pF, V
OUT
= 2V
P-P
300
3.2
0.3
300
95
150
85
V/µs
ns
ns
MHz
MHz
MHz
MHz
FN6192 Rev 1.00
June 28, 2006
Page 2 of 10
ISL4089
AC Electrical Specifications
PARAMETER
0.1dB BW
V
S
= +5V, V
REF
= 0V
DC
, R
L
= 150, R
F
and R
G
= 475; A
V
= 2, T
A
= +25°C.
(Continued)
CONDITION
R
F
= 0; R
G
= inf.; C
L
= 0.6pF
V
OUT
= 0.2V
P-P
R
F
= 0; R
G
= inf.; C
L
= 0.6pF
V
OUT
= 2V
P-P
0.1dB Gain Flatness; A
V
= +2
C
L
= 0.6pF, V
OUT
= 0.2V
P-P
C
L
= 0.6pF, V
OUT
= 2V
P-P
dG
dP
RESTORE SECTION
T
HE
T
HD
NOTE:
1. If an input signal is applied before the supplies are powered up, the input current must be limited to these maximum values
Time to Enable Hold; 50% to 50%
Time to Disable Hold; 50% to 50%
HOLD input 0V to +5V
HOLD input 5V to 0V
40
20
ns
ns
Differential Gain Error
Differential Phase Error
NTC-7, Restore on sync tip
NTC-7, Restore on sync tip
MIN
TYP
70
60
80
50
0.03
0.05
MAX
UNITS
MHz
MHz
MHz
MHz
%
°
DESCRIPTION
0.1dB Gain Flatness; Unity Gain
Typical Performance Curves
V
S
=
+
5V, R
L
= 150 to GND, C
L
= 0.6pF, T
A
= 25°C, unless otherwise specified.
10
8
NORMALIZED GAIN (dB)
6
4
2
0
-2
-4
-6
-8
-10
1M
A
V
=4
R
F
= 475
R
G
= 158
10M
FREQUENCY (Hz)
100M
500M
V
OUT
= 0.2V
P-P
R
L
= 150
A
V
= 2
R
F
= R
G
= 475
A
V
= 1
R
F
= 0
10
8
NORMALIZED GAIN (dB)
6
4
2
0
-2
-4
-6
-8
-10
1M
A
V
= 4
R
F
= 475
R
G
= 158
10M
FREQUENCY (Hz)
100M
500M
A
V
= 2
R
F
= R
G
= 475
A
V
= 1
R
F
= 0
V
OUT
= 2V
P-P
R
L
= 150
FIGURE 1. SMALL SIGNAL GAIN vs FREQUENCY for
VARIOUS GAINS
10
8
NORMALIZED GAIN (dB)
6
4
2
0
-2
-4
-6
-8
-10
1M
A
V
= 2
C
L
= 0.6pF
A
V
= 2
C
L
= 22pF
V
OUT
= 2V
P-P
R
L
= 150
A
V
= 1
C
L
= 0.6pF to 22pF
FIGURE 2. LARGE SIGNAL GAIN vs FREQUENCY for
VARIOUS GAINS
10
8
NORMALIZED GAIN (dB)
6
4
2
0
-2
-4
-6
-8
R
F
= R
G
= 301
V
OUT
= 0.2V
P-P
R
L
= 150
AV = 2
R
F
= R
G
= 475
R
F
= R
G
= 1k
10M
FREQUENCY (Hz)
100M
500M
-10
1M
10M
FREQUENCY (Hz)
100M
500M
FIGURE 3. LARGE SIGNAL GAIN vs FREQUENCY vs C
L
FIGURE 4. SMALL SIGNAL GAIN vs R
F
, R
G
FN6192 Rev 1.00
June 28, 2006
Page 3 of 10
ISL4089
Typical Performance Curves
V
S
=
+
5V, R
L
= 150 to GND, C
L
= 0.6pF, T
A
= 25°C, unless otherwise specified.
0.1
0
NORMALIZED GAIN (dB)
-0.1
-0.2
-0.3
-0.4
-0.5
-0.6
-0.7
-0.8
1M
10M
100M
1G
V
OUT
= 2V
P-P
NORMALIZED PHASE (°)
A
V
= 2
R
F
= R
G
= 475
R
L
= 150
NORMALIZED GAIN
ERROR(%)
0.2
0.025
0.02
0.015
0.01
0.005
0
-0.005
-0.01
-0.015
-0.02
-0.025
0.01
0.08
0.06
0.04
0.02
0
-0.02
-0.04
-0.06
-0.08
-0.10
0
V
OUT
= 0.6V
P-P
(Continued)
V
OUT
= 0.2V
P-P
V
OUT
= 0.3V
P-P
R
L
= 150
A
V
= 2
f = 3.58MHz
R
F
= R
G
= 475
V
OUT
= 0.6V
P-P
V
OUT
= 0.3V
P-P
0.5
1.0
1.5
2.0
2.5
3.0
3.5
4.0
4.5
5.0
FREQUENCY (Hz)
V
OUT
DC (V)
FIGURE 5. 0.1dB GAIN FLATNESS
1.05
1.0
OUTPUT VOLTAGE (V)
0.95
0.9
0.85
0.8
0.75
0.7
0.65
TIME (20ns/DIV)
V
OUT
= 0.2V
P-P
R
F
= R
G
= 475
OUTPUT VOLTAGE (V)
C
G
= 0.5pF
4.0
3.5
3.0
2.5
2.0
1.5
1.0
0.5
0
FIGURE 6. DIFFERENTIAL GAIN - PHASE
V
OUT
= 2V
P-P
R
F
= R
G
= 475
C
G
= 0.5pF
TIME (20ns/DIV)
FIGURE 7. SMALL SIGNAL TRANSIENT RESPONSE; A
V
= 2
FIGURE 8. LARGE SIGNAL TRANSIENT RESPONSE; A
V
= 2
60
VOLTAGE NOISE (nV/Hz)
50
40
30
20
10
0
100
1k
10k
100k
FREQUENCY (Hz)
FIGURE 9. INPUT NOISE vs FREQUENCY
FN6192 Rev 1.00
June 28, 2006
Page 4 of 10
ISL4089
Typical Performance Curves
V
S
=
+
5V, R
L
= 150 to GND, C
L
= 0.6pF, T
A
= 25°C, unless otherwise specified.
1
POWER DISSIPATION (W)
JEDEC JESD51-7 HIGH EFFECTIVE THERMAL
CONDUCTIVITY TEST BOARD
909mW
J
8
/W
S O 0° C
1
=1
A
(Continued)
0.7
POWER DISSIPATION (W)
JEDEC JESD51-3 LOW EFFECTIVE THERMAL
CONDUCTIVITY TEST BOARD
0.8
0.6 625mW
J
0.5
0.4
0.3
0.2
0.1
0
0
8
/W
SO 0°C
6
A
=1
0.6
0.4
0.2
0
0
25
50
75 85 100
125
150
25
50
75 85 100
125
150
AMBIENT TEMPERATURE (°C)
AMBIENT TEMPERATURE (°C)
FIGURE 10. PACKAGE POWER DISSIPATION vs AMBIENT
TEMPERATURE
FIGURE 11. PACKAGE POWER DISSIPATION vs AMBIENT
TEMPERATURE
ISL4089
(8 LD SOIC)
1
2
3
4
5
6
7
8
PIN NAME
IN-
N+
V
REF
HOLD
GND
NIC
V
OUT
V+
EQUIVALENT
CIRCUIT
Circuit 1
Circuit 1
Circuit 1
Circuit 2
Circuit 4
Circuit 1
Circuit 3
Circuit 4
V+
DESCRIPTION
Video amplifier inverting input
Video amplifier non-inverting input
Restore amplifier V
REF
input
Hold/restore logic input. Logic “0” selects the restore state; logic “1” selects the hold state
京公网安备 11010802033920号
Copyright © 2005-2026 EEWORLD.com.cn, Inc. All rights reserved
电子工程世界
