DATASHEET
ISL6227
Dual Mobile-Friendly PWM Controller with DDR Option
The ISL6227 dual PWM controller delivers high efficiency
precision voltage regulation from two synchronous buck DC/DC
converters. It was designed especially to provide power
regulation for DDR memory, chipsets, graphics and other
system electronics in Notebook PCs. The ISL6227’s wide
input voltage range capability allows for voltage conversion
directly from AC/DC adaptor or Li-Ion battery pack.
Automatic mode transition of constant-frequency synchronous
rectification at heavy load, and hysteretic (HYS)
diode-emulation at light load, assure high efficiency over a wide
range of conditions. The HYS mode of operation can be
disabled separately on each PWM converter if
constant-frequency continuous-conduction operation is desired
for all load levels. Efficiency is further enhanced by using the
lower MOSFET r
DS(ON)
as the current sense element.
Voltage-feed-forward ramp modulation, current mode
control, and internal feedback compensation provide fast
response to input voltage and load transients. Input current
ripple is minimized by channel-to-channel PWM phase shift
of 0°, 90° or 180° (determined by input voltage and status of
the DDR pin).
The ISL6227 can control two independent output voltages
adjustable from 0.9V to 5.5V, or by activating the DDR pin,
transform into a complete DDR memory power supply
solution. In DDR mode, CH2 output voltage VTT tracks CH1
output voltage VDDQ. CH2 output can both source and sink
current, an essential power supply feature for DDR memory.
The reference voltage VREF required by DDR memory is
generated as well.
In dual power supply applications the ISL6227 monitors the
output voltage of both CH1 and CH2. An independent PGOOD
(power good) signal is asserted for each channel after the
soft-start sequence has completed, and the output voltage is
within PGOOD window. In DDR mode CH1 generates the only
PGOOD signal.
Built-in overvoltage protection prevents the output from going
above 115% of the set point by holding the lower MOSFET on
and the upper MOSFET off. When the output voltage re-enters
regulation, PGOOD will go HIGH and normal operation
automatically resumes. Once the soft-start sequence has
completed, undervoltage protection latches the offending
channel off if the output drops below 75% of its set point value.
Adjustable overcurrent protection (OCP) monitors the voltage
drop across the r
DS(ON)
of the lower MOSFET. If more precise
current-sensing is required, an external current sense resistor
may be used.
FN9094
Rev 7.00
May 4, 2009
Features
• Provides Regulated Output Voltage in the Range 0.9V to
5.5V
• Operates From an Input Battery Voltage Range of 5V to
28V or From 3.3V/5V System Rail
• Complete DDR1 and DDR2 Memory Power Solution with
VTT Tracking VDDQ/2 and a VDDQ/2 Buffered Reference
Output
• Flexible PWM or HYS Plus PWM Mode Selection with
HYS Diode Emulation at Light Loads for Higher System
Efficiency
• r
DS(ON)
Current Sensing
• Excellent Dynamic Response With Voltage Feed-Forward
and Current Mode Control Accommodating Wide Range
LC Filter Selections
• Undervoltage Lock-Out on VCC Pin
• Power-Good, Overcurrent, Overvoltage, Undervoltage
Protection for Both Channels
• Synchronized 300kHz PWM Operation in PWM Mode
• Pb-Free Available (RoHS compliant)
Applications
• Notebook PCs and Desknotes
• Tablet PCs/Slates
• Hand-Held Portable Instruments
Ordering Information
PART
NUMBER
ISL6227CA*
PART
MARKING
ISL 6227CA
TEMP.
RANGE (°C)
PACKAGE
PKG.
DWG. #
-10 to +100 28 Ld QSOP M28.15
ISL6227CAZ* ISL 6227CAZ -10 to +100 28 Ld QSOP M28.15
(Note)
(Pb-Free)
ISL6227IA*
ISL 6227IA
-40 to +100 28 Ld QSOP M28.15
-40 to +100 28 Ld QSOP M28.15
(Pb-Free)
L28.5x5
L28.5x5
ISL6227IAZ* ISL 6227IAZ
(Note)
ISL6227HRZ* ISL 6227HRZ -10 to +100 28 Ld QFN
(Note)
(Pb-Free)
ISL6227IRZ* ISL 6227IRZ
(Note)
-40 to +100 28 Ld QFN
(Pb-Free)
*Add “-T” suffix for tape and reel. Please refer to TB347 for details on
reel specifications.
NOTE: These Intersil Pb-free plastic packaged products employ
special Pb-free material sets, molding compounds/die attach
materials, and 100% matte tin plate plus anneal (e3 termination
finish, which is RoHS compliant and compatible with both SnPb and
Pb-free soldering operations). Intersil Pb-free products are MSL
classified at Pb-free peak reflow temperatures that meet or exceed
the Pb-free requirements of IPC/JEDEC J STD-020.
FN9094 Rev 7.00
May 4, 2009
Page 1 of 27
ISL6227
Absolute Maximum Ratings
Bias Voltage, V
CC
. . . . . . . . . . . . . . . . . . . . . . . GND - 0.3V to +6.5V
Input Voltage, V
IN
. . . . . . . . . . . . . . . . . . . . . . GND - 0.3V to +28.0V
PHASE, UGATE . . . . . . . . . . . . . . . . . . . GND -5V (Note 1) to 33.0V
BOOT, ISEN . . . . . . . . . . . . . . . . . . . . . . . . . . GND -0.3V to +33.0V
BOOT with Respect to PHASE . . . . . . . . . . . . . . . . . . . . . . . . + 6.5V
All Other Pins . . . . . . . . . . . . . . . . . . . . . . GND - 0.3V to V
CC
+ 0.3V
Thermal Information
Thermal Resistance (Typical)
JA
(°C/W)
JC
(°C/W)
Recommended Operating Conditions
Bias Voltage, V
CC
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . +5.0V
5%
Input Voltage, V
IN
. . . . . . . . . . . . . . . . . . . . . . . . . . .+5.0V to +28.0V
Ambient Temperature Range . . . . . . . . . . . . . . . . . -10°C to +100°C
Junction Temperature Range . . . . . . . . . . . . . . . . . -10°C to +125°C
80
N/A
QSOP Package (Note 2)
. . . . . . . . . . . . .
QFN Package (Notes 3, 4)
. . . . . . . . . . . .
36
6
Maximum Junction Temperature (Plastic Package). . . . . . . . +150°C
Maximum Storage Temperature Range . . . . . . . . . .-65°C to +150°C
Pb-Free Reflow Profile. . . . . . . . . . . . . . . . . . . . . . . . .see link below
http://www.intersil.com/pbfree/Pb-FreeReflow.asp
CAUTION: Do not operate at or near the maximum ratings listed for extended periods of time. Exposure to such conditions may adversely impact product reliability and
result in failures not covered by warranty.
NOTES:
1. 250ns transient. See Confining The Negative Phase Node Voltage Swing in Application Information Section
2.
JA
is measured with the component mounted on a high effective thermal conductivity test board in free air. See Tech Brief TB379 for details.
3.
JA
is measured in free air with the component mounted on a high effective thermal conductivity test board with “direct attach” features. See Tech
Brief TB379.
4. For
JC
, the “case temp” location is the center of the exposed metal pad on the package underside.
5. Limits established by characterization and are not production tested.
Electrical Specifications
Recommended Operating Conditions, Unless Otherwise Noted. Parameters with MIN and/or MAX limits are
100% tested at +25°C, unless otherwise specified. Temperature limits established by characterization and are
not production tested.
SYMBOL
TEST CONDITIONS
MIN
TYP
MAX
UNITS
PARAMETER
VCC SUPPLY
Bias Current
Shut-down Current
VCC UVLO
Rising VCC Threshold
Falling VCC Threshold
V
IN
Input Voltage Pin Current (Sink)
Shut-Down Current
OSCILLATOR
PWM1 Oscillator Frequency
I
CC
I
CCSN
LGATEx, UGATEx Open, VSENx forced above
regulation point, V
IN
> 5V
-
-
1.8
-
3.0
1
mA
µA
V
CCU
V
CCD
4.3
4
4.45
4.14
4.5
4.34
V
V
I
VIN
I
VINS
-
-
-
-
35
1
µA
µA
f
c
Commercial, ISL6227C
Industrial, ISL6227I
255
240
-
-
-
-
-
300
300
2
0.625
1
125
250
345
345
-
-
-
-
-
kHz
kHz
V
V
V
mV/V
mV/V
Ramp Amplitude, pk-pk
Ramp Amplitude, pk-pk
Ramp Offset
Ramp/V
IN
Gain
Ramp/V
IN
Gain
REFERENCE AND SOFT-START
Internal Reference Voltage
Reference Voltage Accuracy
V
R1
V
R2
V
ROFF
G
RB1
G
RB2
V
IN
= 16V (Note 5)
V
IN
= 5V (Note 5)
(Note 5)
V
IN
4.2V (Note 5)
V
IN
4.1V
(Note 5)
V
REF
-
-1.0
0.9
-
-
+1.0
V
%
FN9094 Rev 7.00
May 4, 2009
Page 3 of 27
ISL6227
Electrical Specifications
Recommended Operating Conditions, Unless Otherwise Noted. Parameters with MIN and/or MAX limits are
100% tested at +25°C, unless otherwise specified. Temperature limits established by characterization and are
not production tested.
(Continued)
SYMBOL
I
SOFT
V
ST
(Note 5)
TEST CONDITIONS
MIN
-
-
TYP
-4.5
1.5
MAX
-
-
UNITS
µA
V
PARAMETER
Soft-Start Current During Start-Up
Soft-Start Complete Threshold
PWM CONVERTERS
Load Regulation
VSEN Pin Bias Current
Minimum Duty Cycle
Maximum Duty Cycle
VOUT Pin Input Impedance
Undervoltage Shut-Down Level
Overvoltage Protection
GATE DRIVERS
Upper Drive Pull-Up Resistance
Upper Drive Pull-Down Resistance
Lower Drive Pull-Up Resistance
Lower Drive Pull-Down Resistance
0.0mA < I
VOUT1
< 5.0A; 5.0V < V
BATT
< 28.0V
I
VSEN
D
min
D
max
I
VOUT
V
UVL
V
OVP1
VOUT = 5V
Fraction of the set point; ~2µs noise filter
Fraction of the set point; ~2µs noise filter
(Note 5)
-2.0
-
-
-
-
70
110
-
80
4
87
134
75
115
+2.0
-
-
-
-
80
-
%
nA
%
%
k
%
%
R
2UGPUP
R
2UGPDN
R
2LGPUP
R
2LGPDN
V
CC
= 5V
V
CC
= 5V
V
CC
= 5V
V
CC
= 5V
-
-
-
-
4
2.3
4
1.1
8
4
8
3
POWER GOOD AND CONTROL FUNCTIONS
Power Good Lower Threshold
Power Good Higher Threshold
PGOODx Leakage Current
PGOODx Voltage Low
ISEN Sourcing Current
OCSET Sourcing Current Range
EN - Low (Off)
EN - High (On)
Continuous-Conduction-Mode(CCM)
Enforced (HYS Operation Inhibited)
Automatic CCM/HYS Operation
Enabled
DDR - Low (Off)
DDR - High (On)
DDR REF Output Voltage
DDR REF Output Current
V
DDREF
I
DDREF
DDR = 1, I
REF
= 0...10mA
DDR = 1 (Note 5)
VOUTX pulled low
VOUTX connected to the output
V
PG-
V
PG+
I
PGLKG
V
PGOOD
Fraction of the set point; ~3µs noise filter
Fraction of the set point; ~3µs noise filter.
V
PULLUP
= 5.5V
I
PGOOD
= -4mA
(Note 5)
84
110
-
-
-
2
-
2.0
-
0.9
-
3
0.99*
V
OC2
-
89
115
-
0.5
-
-
-
-
-
-
-
-
V
OC2
10
92
120
1
1
260
20
0.8
-
0.1
-
0.8
-
1.01*
V
OC2
12
%
%
µA
V
µA
µA
V
V
V
V
V
V
V
mA
FN9094 Rev 7.00
May 4, 2009
Page 4 of 27
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