PE29102
Document Category: Product Specification
UltraCMOS® High-speed FET Driver, 40 MHz
Features
• High- and low-side FET drivers
• Dead-time control
• Fast propagation delay, 9 ns
• Tri-state enable mode
• Sub-nanosecond rise and fall time
• 2A/4A peak source/sink current
• Package – flip chip
Applications
• Class D audio
• DC–DC / AC–DC converters
• Wireless charging
• Envelope tracking
• LiDAR
Product Description
The PE29102 is an integrated high-speed driver designed to control the gates of external power devices, such
as enhancement mode gallium nitride (GaN) FETs. The outputs of the PE29102 are capable of providing
switching transition speeds in the sub-nanosecond range for switching applications up to 40 MHz. The PE29102
is optimized for matched dead time and offers best-in-class propagation delay to improve system bandwidth.
High switching speeds result in smaller peripheral components and enable innovative designs for applications
such as class D audio and wireless charging. The PE29102 is available in a flip chip package.
The PE29102 is manufactured on Peregrine’s UltraCMOS process, a patented advanced form of silicon-on-
insulator (SOI) technology, offering the performance of GaAs with the economy and integration of conventional
CMOS.
©2017, pSemi Corporation. All rights reserved. • Headquarters: 9369 Carroll Park Drive, San Diego, CA, 92121
Product Specification
www.psemi.com
DOC-81227-6 – (08/2018)
PE29102
High-speed FET Driver
Figure 1 • PE29102 Functional Diagram
Absolute Maximum Ratings
Exceeding absolute maximum ratings listed in
Table 1
may cause permanent damage. Operation should be
restricted to the limits in
Table 2.
Operation between operating range maximum and absolute maximum for
extended periods may reduce reliability.
ESD Precautions
When handling this UltraCMOS device, observe the same precautions as with any other ESD-sensitive devices.
Although this device contains circuitry to protect it from damage due to ESD, precautions should be taken to
avoid exceeding the rating specified in
Table 1.
Latch-up Immunity
Unlike conventional CMOS devices, UltraCMOS devices are immune to latch-up.
Table 1 • Absolute Maximum Ratings for PE29102
Parameter/Condition
Low-side bias (LSB) to low-side source (LSS)
High-side bias (HSB) to high-side source (HSS)
Input signal
HSS to LSS
HSS to GND
LSS to GND
ESD voltage HBM
(*)
, all pins
Note: *
Human body model (JEDEC JS–001, Table 2A).
Min
–0.3
–0.3
–0.3
–100
-1
-1
Max
7
7
7
100
100
100
500
Unit
V
V
V
V
V
V
V
Page 2 of 14
www.psemi.com
DOC-81227-6 – (08/2018)
PE29102
High-speed FET Driver
Recommended Operating Conditions
Table 2
lists the recommended operating conditions for the PE29102. Devices should not be operated outside
the recommended operating conditions listed below.
Table 2 • Recommended Operating Conditions for PE29102
Parameter
Supply for driver front-end, V
DD
Supply for high-side driver, HSB
Supply for low-side driver, LSB
HIGH level input voltage, VIH
LOW level input voltage, VIL
HSS range
LSS range
Operating temperature
Junction temperature
Min
4.0
4.0
4.0
1.6
0
0
0
–40
–40
Typ
5.0
5.0
5.0
Max
6.0
6.0
6.0
6.0
0.6
60
60
+105
+125
Unit
V
V
V
V
V
V
V
°C
°C
Electrical Specifications
Table 3
provides the key electrical specifications @ +25 °C, V
DD
= 5V, 100 pF load, HSB and LSB bootstrap
diode included unless otherwise specified.
Table 3 • DC Characteristics
Parameter
DC Characteristics
V
DD
quiescent current
HSB quiescent current
LSB quiescent current
Total quiescent current
V
DD
quiescent current
HSB quiescent current
LSB quiescent current
Total quiescent current
V
DD
= 5V
V
DD
= 5V
V
DD
= 5V
V
DD
= 5V
V
DD
= 6V
V
DD
= 6V
V
DD
= 6V
V
DD
= 6V
1.3
2.7
2.7
6.7
1.6
3.6
3.6
9.0
11.6
9.0
mA
mA
mA
mA
mA
mA
mA
mA
Condition
Min
Typ
Max
Unit
Under Voltage Lockout
Under voltage release (rising)
Under voltage hysteresis
3.6
400
3.8
V
mV
Gate Drivers
HSG
PU
/LSG
PU
pull-up resistance
HSG
PD
/LSG
PD
pull-down resistance
HSG
PU
/LSG
PU
leakage current
HSB–HSG
PU
= 5V, LSB–LSG
PU
= 5V
1.9
1.3
10
Ω
Ω
µA
DOC-81227-6 – (08/2018)
www.psemi.com
Page 3 of 14
PE29102
High-speed FET Driver
Table 3 • DC Characteristics (Cont.)
Parameter
HSG
PD
/LSG
PD
leakage current
Condition
HSG
PD
–HSS = 5V, LSG
PD
–LSS = 5V
Min
Typ
10
Max
Unit
µA
Dead-time Control
Dead-time control voltages
80 kΩ resistor to GND
RDHL = 30 kΩ
Dead-time from HSG going low to
LSG going high
RDHL = 80.6 kΩ
RDHL = 150 kΩ
RDHL = 255 kΩ
RDLH = 30 kΩ
Dead-time from LSG going low to
HSG going high
RDLH = 80.6 kΩ
RDLH = 150 kΩ
RDLH = 255 kΩ
1.3
1.9
7.0
13.6
23.5
1.8
6.7
13.2
22.7
V
ns
ns
ns
ns
ns
ns
ns
ns
Switching Characteristics
LSG turn-off propagation delay
HSG rise time
LSG rise time
HSG fall time
LSG fall time
Minimum output pulse width
Max switching frequency @ 50% duty
RDHL = RDLH = 80 kΩ
cycle
40
At min dead time
10 - 90% with 100pF load
10 - 90% with 100pF load
90 - 10% with 100pF load
90 - 10% with 100pF load
9.1
0.9
0.9
0.8
0.9
2.8
5.0
ns
ns
ns
ns
ns
ns
MHz
Control Logic
Table 4
provides the control logic truth table for the PE29102.
Table 4 • Truth Table for PE29102
EN
L
L
H
H
IN
L
H
L
H
HSG
PU
–HSS
Hi–Z
H
Hi–Z
Hi–Z
HSG
PD
–HSS
L
Hi–Z
L
L
LSG
PU
–LSS
H
Hi–Z
Hi–Z
Hi–Z
LSG
PD
–LSS
Hi–Z
L
L
L
Page 4 of 14
www.psemi.com
DOC-81227-6 – (08/2018)
PE29102
High-speed FET Driver
Typical Performance Data
Figure 2
through
Figure 4
show the typical performance data @ +25 °C, V
DD
= 5V, load = 2.2
Ω
resistor in series
with 100 pF capacitor, HSB and LSB bootstrap diode included, unless otherwise specified.
Figure 2 • Total Quiescent Current (mA)
VDD = 4V
10
VDD = 5V
VDD = 6V
Total Quiescent Current (mA)
9
8
7
6
5
4
3
2
1
0
-40
25
105
Temperature (°C)
DOC-81227-6 – (08/2018)
www.psemi.com
Page 5 of 14
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