NCV8720
350mA, Very Low Dropout
Bias Rail CMOS Voltage
Regulator
The NCV8720 is a 350 mA VLDO equipped with NMOS pass
transistor and a separate bias supply voltage (V
BIAS
). The device
provides very stable, accurate output voltage with low noise suitable
for space constrained, noise sensitive applications. In order to
optimize performance for battery operated applications, the NCV8720
features low I
Q
consumption. The NCV8720 is offered in WDFN6
2 mm x 2 mm package, wettable flanks option available for Enhanced
Optical Inspection.
Features
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MARKING
DIAGRAM
WDFN6
CASE 511BR
1
XX M
T
•
•
•
•
•
•
•
•
•
•
•
•
Input Voltage Range: 0.8 V to 5.5 V
Bias Voltage Range: 2.4 V to 5.5 V
Fixed Output Voltage Device
Output Voltage Range: 0.8 V to 2.1 V
±2%
Accuracy over Temperature
Ultra−Low Dropout: 110 mV typically at 350 mA
Very Low Bias Input Current of Typ. 80
mA
Very Low Bias Input Current in Disable Mode: Typ. 0.5
mA
Low Noise, High PSRR
Built−In Soft−Start with Monotonic V
OUT
Rise
Stable with a 2.2
mF
Ceramic Capacitor
NCV Prefix for Automotive and Other Applications Requiring
Unique Site and Control Change Requirements; AEC−Q100
Qualified and PPAP Capable; Device Temperature Grade 1:
−40°C
to
+125°C Ambient Operating Temperature Range
•
These are Pb−Free Devices
Typical Applications
XX = Specific Device Code
M = Date Code
PIN CONNECTIONS
OUT
1
6
IN
NC
2
Thermal
Pad
5
GND
EN
3
4
BIAS
(Top VIew)
ORDERING INFORMATION
See detailed ordering, marking and shipping information on
page 9 of this data sheet.
•
Automotive, Consumer and Industrial Equipment Point of Load
•
•
•
•
Regulation
Battery−Powered Equipment
FPGA, DSP and Logic Power Supplies
Switching Power Supply Post Regulation
Cameras, DVRs, STB and Camcorders
V
BIAS
NCV8720
BIAS
V
IN
IN
EN
GND
OUT
2.2
mF
V
OUT
1.5 V @ 350 mA
V
EN
Figure 1. Typical Application Schematics
©
Semiconductor Components Industries, LLC, 2016
November, 2018
−
Rev. 3
1
Publication Order Number:
NCV8720/D
NCV8720
CURRENT
LIMIT
ENABLE
BLOCK
UVLO
IN
EN
BIAS
OUT
VOLTAGE
REFERENCE
+
−
THERMAL
LIMIT
GND
Figure 2. Simplified Schematic Block Diagram
PIN FUNCTION DESCRIPTION
Pin No.
1
2
3
4
5
6
Pad
Pin Name
OUT
N/C
EN
BIAS
GND
IN
Regulated Output Voltage pin
Not internally connected
Enable pin. Driving this pin high enables the regulator. Driving this pin low puts the regulator into shutdown mode.
Bias voltage supply for internal control circuits. This pin is monitored by internal Under-Voltage Lockout Circuit.
Ground pin
Input Voltage Supply pin
Should be soldered to the ground plane for increased thermal performance.
Description
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2
NCV8720
ABSOLUTE MAXIMUM RATINGS
Rating
Input Voltage (Note 1)
Output Voltage
Chip Enable and Bias Input
Output Short Circuit Duration
Maximum Junction Temperature
Operating Ambient Temperature Range
Storage Temperature
ESD Capability, Human Body Model (Note 2)
ESD Capability, Machine Model (Note 2)
Symbol
V
IN
V
OUT
V
EN,
V
BIAS
t
SC
T
J
T
A
T
STG
ESD
HBM
ESD
MM
Value
−0.3
to 6
−0.3
to (V
IN
+0.3)
≤
6
−0.3
to 6
unlimited
150
−40
to 125
−55
to 150
2000
200
Unit
V
V
V
s
°C
°C
°C
V
V
Stresses exceeding those listed in the Maximum Ratings table may damage the device. If any of these limits are exceeded, device functionality
should not be assumed, damage may occur and reliability may be affected.
1. Refer to ELECTRICAL CHARACTERISTICS and APPLICATION INFORMATION for Safe Operating Area.
2. This device series incorporates ESD protection (except OUT pin) and is tested by the following methods:
ESD Human Body Model tested per AEC−Q100−002
ESD Machine Model tested per AEC−Q100−003
Latchup Current Maximum Rating
±100
mA per AEC−Q100−004.
RECOMMENDED OPERATING CONDITIONS
Parameter
Input Voltage
Bias Voltage
Junction Temperature
Symbol
V
IN
V
BIAS
T
J
Min
(V
OUT
+ V
DO_IN
)
(V
OUT
+ 1.4)
≥
2.4
−40
Max
5.5
5.5
125
Unit
V
V
°C
Functional operation above the stresses listed in the Recommended Operating Ranges is not implied. Extended exposure to stresses beyond
the Recommended Operating Ranges limits may affect device reliability.
THERMAL CHARACTERISTICS
Rating
Thermal Characteristics, WDFN6 2 mm x 2 mm Thermal Resistance, Junction−to−Air (Note 3)
Symbol
R
qJA
Value
65
Unit
°C/W
3. This data was derived by thermal simulations based on the JEDEC JESD51 series standards methodology. Only a single device mounted
at the center of a high*K (2s2p) 3in x 3in multilayer board with 1−ounce internal planes and 2−ounce copper on top and bottom. Top copper
layer has a dedicated 125 sqmm copper area.
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NCV8720
ELECTRICAL CHARACTERISTICS
Over Operating Temperature Range (T
J
=
−40°C
to +125°C), V
BIAS
= (V
OUT
+ 1.4 V) or 2.5 V, whichever is greater; V
IN
≥
V
OUT
+ 0.5 V,
I
OUT
= 1 mA, V
EN
= 1.1 V, C
OUT
= 2.2
mF,
unless otherwise noted. Typical values are at T
J
= +25°C.
Parameter
Operating Input Voltage Range
Operating Bias Voltage Range
Output Voltage Range (Note 4)
Output
Voltage
Accuracy
Nominal
T
J
= +25°C
V
OUT
V
OUT
DV
OUT
/DV
IN
DV
OUT
/DV
BIAS
-2
5.0
16
–1.0
110
1.15
420
600
80
0.5
52
56
PSRR (V
IN
)
65
46
37
25
65
65
PSRR (V
BIAS
)
70
50
35
24
V
N
I
VIN_INRUSH
V
OUT
= 95% V
OUT(NOM)
,
I
OUT
= 350 mA,
C
OUT
= 2.2
mF
t
STR
V
EN(HI)
V
EN(LO)
V
EN
= 5.5 V
V
BIAS
rising
V
BIAS
falling
Shutdown, temperature increasing
Reset, temperature decreasing
I
EN
UVLO
T
SD
T
J
–40
1.1
0
0.3
1.6
0.2
+160
+140
+125
0.4
2.0
40
100 +
I
LOAD
Test Conditions
Symbol
V
IN
V
BIAS
Min
V
OUT
+
V
DO
_
IN
(V
OUT
+ 1.4)
≥
2.4
0.8
Typ
Max
5.5
5.5
2.1
Unit
V
V
V
%
±0.5
+2
V
+ 1.4 V
≤
V
BIAS
≤
5.5 V,
Over V
BIAS
,
V
IN
,
I
OUT
,
OUT
V
OUT
+ 0.5 V
≤
V
IN
≤
4.5 V,
T
J
= –40°C to +125°C
0mA
≤
I
OUT
≤
350 mA
V
IN
= (V
OUT
+ 0.5 V) to 4.5 V, I
OUT
= 1mA
V
BIAS
= (V
OUT
+ 1.4 V) or 2.5 V (which-
ever is greater) to 5.5 V, I
OUT
= 1 mA
V
IN
= V
OUT(NOM)
– 0.1 V,
(V
BIAS
– V
OUT(NOM)
) = 1.4 V,
I
OUT
= 350 mA
V
IN
= V
OUT(NOM)
+ 0.3 V, I
OUT
= 350 mA
V
OUT
= 0.9 x V
OUT(NOM)
I
OUT
= 0 mA to 350 mA
V
EN
≤
0.4 V, T
J
= -40°C to +85°C
f = 10 Hz
f = 100 Hz
V
IN
−
V
OUT
≥
0.5 V,
I
OUT
= 350 mA
f = 1 kHz
f = 10 kHz
f = 100 kHz
f = 1 MHz
f = 10 Hz
f = 100 Hz
%
mV/V
mV/V
mV/mA
V
IN
Line Regulation
V
BIAS
Line Regulation
Load Regulation
V
IN
Dropout Voltage (Note 5)
V
BIAS
Dropout Voltage (Note 6)
Output Current Limit
Bias Pin Current
Shutdown Current (I
GND
)
0 mA
≤
I
OUT
≤
350 mA (no load to full load)
DV
OUT
/DI
OUT
V
DO
_
IN
V
DO
_
BIAS
I
CL
I
BIAS
I
SHDN
200
1.4
1000
110
2.0
mV
V
mA
mA
mA
V
IN
Power-Supply Rejection Ratio
dB
V
BIAS
Power-Supply Rejection
Ratio
V
IN
– V
OUT
≥
0.5 V,
I
OUT
= 350 mA
f = 1 kHz
f = 10 kHz
f = 100 kHz
f = 1 MHz
dB
Output Noise Voltage
Inrush Current on V
IN
Startup Time
Enable Pin High (enabled)
Enable Pin Low (disabled)
Enable Pin Current
Undervoltage Lock-out
Hysteresis
Thermal Shutdown Temperature
Operating Junction Temperature
BW = 10 Hz to 100 kHz
mV
RMS
mA
ms
V
V
mA
V
V
°C
°C
°C
140
Product parametric performance is indicated in the Electrical Characteristics for the listed test conditions, unless otherwise noted. Product
performance may not be indicated by the Electrical Characteristics if operated under different conditions.
4. V
OUT
nominal value is factory programmable.
5. Measured for devices with V
OUT(NOM)
≥
1.2V.
6. V
BIAS
– V
OUT
with V
OUT
= V
OUT(NOM)
– 0.1V. Measured for devices with V
OUT(NOM)
≥
1.4 V.
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NCV8720
APPLICATIONS INFORMATION
.
VBAT
NCV8720
DC/DC
LX
FB
GND
EN
BIAS
IN
EN
Processor
I/O
I/O
To other circuits
IN
GND
OUT
LOAD
Figure 3. Typical Application: Low−Voltage Post−Regulator with ON/OFF functionality
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