74HC574; 74HCT574
Octal D-type flip-flop; positive edge-trigger; 3-state
Rev. 6 — 26 January 2015
Product data sheet
1. General description
The 74HC574; 74HCT574 is a high-speed Si-gate CMOS device and is pin compatible
with Low-power Schottky TTL. It is specified in compliance with JEDEC standard no. 7A.
The 74HC574; 74HCT574 are octal D-type flip-flops featuring separate D-type inputs for
each flip-flop and 3-state outputs for bus-oriented applications. A clock (CP) and an output
enable (OE) input are common to all flip-flops. The 8 flip-flops will store the state of their
individual D-inputs that meet the set-up and hold times requirements on the LOW-to-HIGH
CP transition. When OE is LOW the contents of the 8 flip-flops are available at the
outputs. When OE is HIGH, the outputs go to the high-impedance OFF-state. Operation of
the OE input does not affect the state of the flip-flops.
The 74HC574; 74HCT574 is functionally identical to:
•
74HC564: but has non-inverting outputs
•
74HC374; 74HCT374: but has a different pin arrangement
2. Features and benefits
3-state non-inverting outputs for bus oriented applications
8-bit positive, edge-triggered register
Common 3-state output enable input
ESD protection:
HBM JESD22-A114F exceeds 2 000 V
MM JESD22-A115-A exceeds 200 V
Specified from
40 C
to +85
C
and from
40 C
to +125
C
3. Ordering information
Table 1.
Ordering information
Temperature range
74HC574N
74HCT574N
74HC574D
74HCT574D
40 C
to +125
C
SO20
plastic small outline package; 20 leads;
body width 7.5 mm
SOT163-1
40 C
to +125
C
Name
DIP20
Description
plastic dual in-line package; 20 leads (300 mil)
Version
SOT146-1
Type number Package
NXP Semiconductors
74HC574; 74HCT574
Octal D-type flip-flop; positive edge-trigger; 3-state
Table 1.
Ordering information
…continued
Temperature range
Name
SSOP20
TSSOP20
Description
plastic shrink small outline package; 20 leads;
body width 5.3 mm
plastic thin shrink small outline package; 20 leads;
body width 4.4 mm
Version
SOT339-1
SOT360-1
Type number Package
74HC574DB
74HCT574DB
74HC574PW
74HCT574PW
40 C
to +125
C
40 C
to +125
C
4. Functional diagram
Fig 1.
Functional diagram
Fig 2.
Logic diagram
74HC_HCT574
All information provided in this document is subject to legal disclaimers.
© NXP Semiconductors N.V. 2015. All rights reserved.
Product data sheet
Rev. 6 — 26 January 2015
2 of 19
NXP Semiconductors
74HC574; 74HCT574
Octal D-type flip-flop; positive edge-trigger; 3-state
Fig 3.
Logic symbol
Fig 4.
IEC logic symbol
5. Pinning information
5.1 Pinning
Fig 5.
Pin configuration DIP20 and SO20
Fig 6.
Pin configuration SSOP20 and TSSOP20
74HC_HCT574
All information provided in this document is subject to legal disclaimers.
© NXP Semiconductors N.V. 2015. All rights reserved.
Product data sheet
Rev. 6 — 26 January 2015
3 of 19
NXP Semiconductors
74HC574; 74HCT574
Octal D-type flip-flop; positive edge-trigger; 3-state
5.2 Pin description
Table 2.
Symbol
OE
D[0:7]
GND
CP
Q[0:7]
V
CC
Pin description
Pin
1
2, 3, 4, 5, 6, 7, 8, 9
10
11
20
Description
3-state output enable input (active LOW)
data input
ground (0 V)
clock input (LOW-to-HIGH, edge triggered)
supply voltage
19, 18, 17, 16, 15, 14, 13, 12 3-state flip-flop output
6. Functional description
Table 3.
Function table
[1]
Input
OE
Load and read register
Load register and disable output
L
L
H
H
[1]
H = HIGH voltage level;
h = HIGH voltage level one setup time prior to the HIGH-to-LOW CP transition;
L = LOW voltage level;
l = LOW voltage level one setup time prior to the HIGH-to-LOW CP transition;
Z = high-impedance OFF-state;
= LOW-to-HIGH clock transition.
Operating mode
CP
Dn
l
h
l
h
Internal
flip-flop
L
H
L
H
Output
Qn
L
H
Z
Z
7. Limiting values
Table 4.
Limiting values
In accordance with the Absolute Maximum Rating System (IEC 60134). Voltages are referenced to GND (ground = 0 V).
Symbol
V
CC
I
IK
I
OK
I
O
I
CC
I
GND
T
stg
P
tot
Parameter
supply voltage
input clamping current
output clamping current
output current
supply current
ground current
storage temperature
total power dissipation
DIP20 package
SO20, SSOP20 and TSSOP20 packages
[1]
[2]
For DIP20 package: P
tot
derates linearly with 12 mW/K above 70
C.
For SO20: P
tot
derates linearly with 8 mW/K above 70
C.
For SSOP20 and TSSOP20 packages: P
tot
derates linearly with 5.5 mW/K above 60
C.
[1]
[2]
Conditions
V
I
<
0.5
V or V
I
> V
CC
+ 0.5 V
V
O
<
0.5
V or V
O
> V
CC
+ 0.5 V
V
O
=
0.5
V to (V
CC
+ 0.5 V)
Min
0.5
-
-
-
-
-
65
-
-
Max
+7
20
20
35
+70
70
+150
750
500
Unit
V
mA
mA
mA
mA
mA
C
mW
mW
74HC_HCT574
All information provided in this document is subject to legal disclaimers.
© NXP Semiconductors N.V. 2015. All rights reserved.
Product data sheet
Rev. 6 — 26 January 2015
4 of 19
NXP Semiconductors
74HC574; 74HCT574
Octal D-type flip-flop; positive edge-trigger; 3-state
8. Recommended operating conditions
Table 5.
Recommended operating conditions
Voltages are referenced to GND (ground = 0 V)
Symbol Parameter
V
CC
V
I
V
O
T
amb
t/V
supply voltage
input voltage
output voltage
ambient temperature
input transition rise and fall rate
V
CC
= 2.0 V
V
CC
= 4.5 V
V
CC
= 6.0 V
Conditions
Min
2.0
0
0
40
-
-
-
74HC574
Typ
5.0
-
-
+25
-
1.67
-
Max
6.0
V
CC
V
CC
+125
625
139
83
Min
4.5
0
0
40
-
-
-
74HCT574
Typ
5.0
-
-
+25
-
1.67
-
Max
5.5
V
CC
V
CC
+125
-
139
-
V
V
V
C
ns/V
ns/V
ns/V
Unit
9. Static characteristics
Table 6.
Static characteristics
At recommended operating conditions; voltages are referenced to GND (ground = 0 V).
Symbol Parameter
74HC574
V
IH
HIGH-level
input voltage
V
CC
= 2.0 V
V
CC
= 4.5 V
V
CC
= 6.0 V
V
IL
LOW-level
input voltage
V
CC
= 2.0 V
V
CC
= 4.5 V
V
CC
= 6.0 V
V
OH
HIGH-level
output voltage
V
I
= V
IH
or V
IL
I
O
=
20 A;
V
CC
= 2.0 V
I
O
=
20 A;
V
CC
= 4.5 V
I
O
=
20 A;
V
CC
= 6.0 V
I
O
=
6.0
mA; V
CC
= 4.5 V
I
O
=
7.8
mA; V
CC
= 6.0 V
V
OL
LOW-level
output voltage
V
I
= V
IH
or V
IL
I
O
= 20
A;
V
CC
= 2.0 V
I
O
= 20
A;
V
CC
= 4.5 V
I
O
= 20
A;
V
CC
= 6.0 V
I
O
= 6.0 mA; V
CC
= 4.5 V
I
O
= 7.8 mA; V
CC
= 6.0 V
I
I
I
OZ
input leakage
current
OFF-state
output current
V
I
= V
CC
or GND;
V
CC
= 6.0 V
V
I
= V
IH
or V
IL
;
V
O
= V
CC
or GND;
V
CC
= 6.0 V
-
-
-
-
-
-
-
0
0
0
0.15
0.16
-
-
0.1
0.1
0.1
0.26
0.26
0.1
0.5
-
-
-
-
-
-
-
0.1
0.1
0.1
0.33
0.33
1.0
5.0
-
-
-
-
-
-
-
0.1
0.1
0.1
0.4
0.4
1.0
10.0
V
V
V
V
V
A
A
1.9
4.4
5.9
3.98
5.48
2.0
4.5
6.0
4.32
5.81
-
-
-
-
-
1.9
4.4
5.9
3.84
5.34
-
-
-
-
-
1.9
4.4
5.9
3.7
5.2
-
-
-
-
-
V
V
V
V
V
1.5
3.15
4.2
-
-
-
1.2
2.4
3.2
0.8
2.1
2.8
-
-
-
0.5
1.35
1.8
1.5
3.15
4.2
-
-
-
-
-
-
0.5
1.35
1.8
1.5
3.15
4.2
-
-
-
-
-
-
0.5
1.35
1.8
V
V
V
V
V
V
Conditions
Min
25
C
Typ
Max
40 C
to +85
C 40 C
to +125
C
Unit
Min
Max
Min
Max
74HC_HCT574
All information provided in this document is subject to legal disclaimers.
© NXP Semiconductors N.V. 2015. All rights reserved.
Product data sheet
Rev. 6 — 26 January 2015
5 of 19
无线连接
京公网安备 11010802033920号
Copyright © 2005-2026 EEWORLD.com.cn, Inc. All rights reserved
电子工程世界
