74HCT534
5 V octal D-type flip-flop; positive-edge trigger; inverting;
3-state
Rev. 03 — 18 October 2004
Product data sheet
1. General description
The 74HCT534 is a high-speed Si-gate CMOS device and is pin compatible with low
power Schottky TTL (LSTTL). The 74HCT534 is specified in compliance with JEDEC
standard no. 7A.
The 74HCT534 is an octal D-type flip-flop featuring separate D-type inputs for each
flip-flop and inverting 3-state outputs for bus oriented applications. A clock (CP) and an
output enable (OE) input are common to all flip-flops.
The 8 flip-flops will store the state of their individual D-inputs that meet the set-up and hold
times requirements on the LOW-to-HIGH CP transition. When OE is LOW, the contents of
the 8 flip-flops are available at the outputs. When OE is HIGH, the outputs go to the
high-impedance OFF-state. Operation of the OE input does not affect the state of the
flip-flops.
The 74HCT534 is functionally identical to the 74HCT374, but has inverted outputs.
2. Features
s
3-state inverting outputs for bus oriented applications
s
8-bit positive-edge triggered register
s
Common 3-state output enable input.
3. Quick reference data
Table 1:
Quick reference data
GND = 0 V; T
amb
= 25
°
C; t
r
= t
f
= 6 ns.
Symbol
Parameter
Conditions
C
L
= 15 pF; V
CC
= 5 V
C
L
= 15 pF; V
CC
= 5 V
Min
-
-
-
C
L
= 50 pF; V
CC
= 4.5 V
[1] [2]
Typ
13
40
3.5
19
Max
-
-
-
-
Unit
ns
MHz
pF
pF
t
PHL
, t
PLH
propagation delay
CP to Qn
f
max
C
I
C
PD
[1]
maximum clock
frequency
input capacitance
power dissipation
capacitance per flip-flop
-
C
PD
is used to determine the dynamic power dissipation (P
D
in
µW).
P
D
= C
PD
×
V
CC2
×
f
i
×
N +
Σ(C
L
×
V
CC2
×
f
o
) where:
f
i
= input frequency in MHz;
f
o
= output frequency in MHz;
C
L
= output load capacitance in pF;
Philips Semiconductors
74HCT534
5 V octal D-type flip-flop; positive-edge trigger; inverting; 3-state
V
CC
= supply voltage in Volts;
N = number of inputs switching;
Σ(C
L
×
V
CC2
×
f
o
) = sum of the outputs.
[2]
The condition is V
I
= GND to V
CC
−
1.5 V.
4. Ordering information
Table 2:
Ordering information
Package
Temperature range Name
74HCT534N
74HCT534D
−40 °C
t0 +125
°C
−40 °C
t0 +125
°C
DIP20
SO20
Description
plastic dual in-line package; 20 leads (300 mil)
plastic small outline package; 20 leads; body
width 7.5 mm
Version
SOT146-1
SOT163-1
Type number
5. Functional diagram
3
4
7
8
13
14
17
18
D0
D1
D2
D3
D4
D5
D6
D7
FF1
to
FF8
3-STATE
OUTPUTS
Q0
Q1
Q2
Q3
Q4
Q5
Q6
Q7
2
5
6
9
12
15
16
19
11 CP
1 OE
mgm957
Fig 1. Functional diagram.
9397 750 13817
© Koninklijke Philips Electronics N.V. 2004. All rights reserved.
Product data sheet
Rev. 03 — 18 October 2004
2 of 15
Philips Semiconductors
74HCT534
5 V octal D-type flip-flop; positive-edge trigger; inverting; 3-state
1
11
3
4
7
8
13
14
17
18
CP
D0
D1
D2
D3
D4
D5
D6
D7
OE
1
mgm955
EN
C1
2
5
6
9
12
15
16
19
mgm956
11
Q0
Q1
Q2
Q3
Q4
Q5
Q6
Q7
2
5
6
9
12
15
16
19
13
14
17
18
3
4
7
8
1D
Fig 2. Logic symbol.
Fig 3. IEC logic symbol.
D0
D1
D2
D3
D4
D5
D6
D7
D
Q
D
Q
D
Q
D
Q
D
Q
D
Q
D
Q
D
Q
CP
FF
1
CP
CP
FF
2
CP
FF
3
CP
FF
4
CP
FF
5
CP
FF
6
CP
FF
7
CP
FF
8
OE
Q0
Q1
Q2
Q3
Q4
Q5
Q6
mgm958
Q7
Fig 4. Logic diagram.
9397 750 13817
© Koninklijke Philips Electronics N.V. 2004. All rights reserved.
Product data sheet
Rev. 03 — 18 October 2004
3 of 15
Philips Semiconductors
74HCT534
5 V octal D-type flip-flop; positive-edge trigger; inverting; 3-state
6. Pinning information
6.1 Pinning
OE
Q0
D0
D1
Q1
Q2
D2
D3
Q3
1
2
3
4
5
6
7
8
9
20 V
CC
19 Q7
18 D7
17 D6
16 Q6
15 Q5
14 D5
13 D4
12 Q4
11 CP
001aab843
534
GND 10
Fig 5. Pin configuration.
6.2 Pin description
Table 3:
Symbol
OE
Q0
D0
D1
Q1
Q2
D2
D3
Q3
GND
CP
Q4
D4
D5
Q5
Q6
D6
D7
Q7
V
CC
Pin description
Pin
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
Description
3-state output enable input (active LOW)
3-state output
data input
data input
3-state output
3-state output
data input
data input
3-state output
ground (0 V)
clock input (LOW-to-HIGH, edge-triggered)
3-state output
data input
data input
3-state output
3-state output
data input
data input
3-state output
supply voltage
9397 750 13817
© Koninklijke Philips Electronics N.V. 2004. All rights reserved.
Product data sheet
Rev. 03 — 18 October 2004
4 of 15
Philips Semiconductors
74HCT534
5 V octal D-type flip-flop; positive-edge trigger; inverting; 3-state
7. Functional description
7.1 Function table
Table 4:
Function table
OE
Load and read
register
Load register and
disable outputs
[1]
[1]
Operating mode
Input
CP
↑
↑
↑
↑
Dn
l
h
l
h
L
L
H
H
Internal
flip-flops
L
H
L
H
Output Qn
H
L
Z
Z
H = HIGH voltage level;
h = HIGH voltage level one set-up time prior to the LOW-to-HIGH CP transition;
L = LOW voltage level;
I = LOW voltage level one set-up time prior to the LOW-to-HIGH CP transition;
Z = high-impedance OFF-state;
↑
= LOW-to-HIGH clock transition.
8. Limiting values
Table 5:
Limiting values
In accordance with the Absolute Maximum Rating System (IEC 60134). Voltages are referenced to
GND (ground = 0 V).
Symbol
V
CC
I
IK
I
OK
I
O
I
CC
, I
GND
T
stg
P
tot
Parameter
supply voltage
input diode current
output diode current
output source or sink
current
V
CC
or GND current
storage temperature
power dissipation
DIP20 package
SO20 package
[1]
[2]
[1]
[2]
Conditions
V
I
<
−0.5
V or V
I
> V
CC
+ 0.5 V
V
O
<
−0.5
V or
V
O
> V
CC
+ 0.5 V
V
O
=
−0.5
V to V
CC
+ 0.5 V
Min
−0.5
-
-
-
-
−65
-
-
Max
+7
±20
±20
±35
±70
+150
750
500
Unit
V
mA
mA
mA
mA
°C
mW
mW
Above 70
°
C: P
tot
derates linearly with 12 mW/K.
Above 70
°
C: P
tot
derates linearly with 8 mW/K.
9. Recommended operating conditions
Table 6:
Symbol
V
CC
V
I
Recommended operating conditions
Parameter
supply voltage
input voltage
Conditions
Min
4.5
0
Typ
5.0
-
Max
5.5
V
CC
Unit
V
V
9397 750 13817
© Koninklijke Philips Electronics N.V. 2004. All rights reserved.
Product data sheet
Rev. 03 — 18 October 2004
5 of 15
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