74HC4520; 74HCT4520
Dual 4-bit synchronous binary counter
Rev. 3 — 4 December 2014
Product data sheet
1. General description
The 74HC4520; 74HCT4520 are dual 4-bit internally synchronous binary counters with
two clock inputs (nCP0 and nCP1). They have buffered outputs from all 4 bit positions
(nQ0 to nQ3) and an asynchronous master reset input (nMR). The counter advances on
the LOW-to-HIGH transition of nCP0 when nCP1 is HIGH. It also advances on the
HIGH-to-LOW transition of nCP1 when nCP0 is LOW. Either nCP0 or nCP1 may be used
as the clock input to the counter. The other clock input may be used as a clock enable
input. A HIGH on nMR, resets the counter (nQ0 to nQ3 = LOW) independent of nCP0 and
nCP1. Inputs include clamp diodes. It enables the use of current limiting resistors to
interface inputs to voltages in excess of V
CC
.
2. Features and benefits
Complies with JEDEC standard no. 7A
Input levels:
For 74HC4520: CMOS level
For 74HCT4520: TTL level
ESD protection:
HBM JESD22-A114F exceeds 2000 V
MM JESD22-A115-A exceeds 200 V
Multiple package options
Specified from
40 C
to +85
C
and
40 C
to +125
C
3. Applications
Multistage synchronous counting
Multistage asynchronous counting
Frequency dividers
NXP Semiconductors
74HC4520; 74HCT4520
Dual 4-bit synchronous binary counter
4. Ordering information
Table 1.
Ordering information
Package
Temperature
range
74HC4520N
74HCT4520N
74HC4520D
74HCT4520D
74HC4520DB
74HCT4520DB
74HC4520PW
40 C
to +125
C
TSSOP16
40 C
to +125
C
SSOP16
40 C
to +125
C
SO16
plastic small outline package; 16 leads;
body width 3.9 mm
plastic shrink small outline package; 16 leads;
body width 5.3 mm
plastic thin shrink small outline package; 16 leads;
body width 4.4 mm
SOT109-1
SOT338-1
SOT403-1
40 C
to +125
C
Name
DIP16
Description
plastic dual in-line package; 16 leads (300 mil)
Version
SOT38-4
Type number
5. Functional diagram
1Q0 3
1 1CP0
1Q1 4
2 1CP1
1Q2 5
1Q3 6
7 1MR
2Q0 11
9 2CP0
2Q1 12
10 2CP1
2Q2 13
2Q3 14
15 2MR
001aae698
Fig 1.
Functional diagram
74HC_HCT4520
All information provided in this document is subject to legal disclaimers.
© NXP Semiconductors N.V. 2014. All rights reserved.
Product data sheet
Rev. 3 — 4 December 2014
2 of 19
NXP Semiconductors
74HC4520; 74HCT4520
Dual 4-bit synchronous binary counter
1
nCP0
nCP1
nMR
1
nQ0
nQ1
nQ2
nQ
3
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
2
3
4
5
6
7
8
9
10
11
12
13
14
15
0
1
2
3
4
001aae707
Fig 2.
Timing diagram
Fig 3.
Logic diagram for one counter
74HC_HCT4520
All information provided in this document is subject to legal disclaimers.
© NXP Semiconductors N.V. 2014. All rights reserved.
Product data sheet
Rev. 3 — 4 December 2014
3 of 19
NXP Semiconductors
74HC4520; 74HCT4520
Dual 4-bit synchronous binary counter
6. Pinning information
6.1 Pinning
Fig 4.
Pin configuration DIP16
Fig 5.
Pin configuration SO16
Fig 6.
Pin configuration TSSOP16
and SSOP16
6.2 Pin description
Table 2.
Symbol
1CP0, 2CP0
1CP1, 2CP1
1Q0 to 1Q3
1MR, 2MR
GND
2Q0 to 2Q3
V
CC
Pin description
Pin
1, 9
2, 10
3, 4, 5, 6
7, 15
8
11, 12, 13, 14
16
Description
clock input (LOW-to-HIGH edge-triggered)
clock input (HIGH-to-LOW edge-triggered)
output
asynchronous master reset input (active HIGH)
ground (0 V)
output
supply voltage
74HC_HCT4520
All information provided in this document is subject to legal disclaimers.
© NXP Semiconductors N.V. 2014. All rights reserved.
Product data sheet
Rev. 3 — 4 December 2014
4 of 19
NXP Semiconductors
74HC4520; 74HCT4520
Dual 4-bit synchronous binary counter
7. Functional description
Table 3.
nCP0
L
X
H
X
[1]
Function table
[1]
nCP1
H
X
L
X
nMR
L
L
L
L
L
L
H
Mode
counter advances
counter advances
no change
no change
no change
no change
nQ0 to nQ3 = LOW
H = HIGH voltage level; L = LOW voltage level; X = don’t care;
= positive-going transition;
= negative-going transition.
8. Limiting values
Table 4.
Limiting values
In accordance with the Absolute Maximum Rating System (IEC 60134). Voltages are referenced to GND (ground = 0 V).
Symbol
V
CC
I
IK
I
OK
I
O
I
CC
I
GND
T
stg
P
tot
Parameter
supply voltage
input clamping current
output clamping current
output current
supply current
ground current
storage temperature
total power dissipation
DIP16 package
SO16 package
(T)SSOP16 package
[1]
For DIP16 packages: above 70
C
the value of P
tot
derates linearly at 12 mW/K.
For SO16 packages: above 70
C
the value of P
tot
derates linearly at 8 mW/K.
For (T)SSOP16 packages: above 60
C
the value of P
tot
derates linearly at 5.5 mW/K.
[1]
[1]
[1]
Conditions
V
I
<
0.5
V or V
I
> V
CC
+ 0.5 V
V
O
<
0.5
V or V
O
> V
CC
+ 0.5 V
V
O
=
0.5
V to V
CC
+ 0.5 V
Min
0.5
-
-
-
-
50
65
-
-
-
Max
+7.0
20
20
25
50
-
+150
750
500
500
Unit
V
mA
mA
mA
mA
mA
C
mW
mW
mW
74HC_HCT4520
All information provided in this document is subject to legal disclaimers.
© NXP Semiconductors N.V. 2014. All rights reserved.
Product data sheet
Rev. 3 — 4 December 2014
5 of 19
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