BF1216
Dual N-channel dual gate MOSFET
Rev. 01 — 29 April 2010
Product data sheet
1. Product profile
1.1 General description
The BF1216 is a combination of two dual gate MOSFET amplifiers with shared source
and gate2 leads.
The source and substrate are interconnected. Internal bias circuits enable DC stabilization
and very good cross modulation performance during AGC. Integrated diodes between the
gates and source protect against excessive input voltage surges. The transistor is
available as a SOT363 micro-miniature plastic package.
CAUTION
This device is sensitive to ElectroStatic Discharge (ESD). Therefore care should be taken
during transport and handling.
1.2 Features and benefits
Two low noise gain controlled amplifiers in a single package; both with a partly
integrated bias
Superior cross modulation performance during AGC
High forward transfer admittance
High forward transfer admittance to input capacitance ratio
1.3 Applications
Gain controlled low noise amplifiers for VHF and UHF applications running on a 5 V
supply voltage
digital and analog television tuners
professional communication equipment
NXP Semiconductors
BF1216
Dual N-channel dual gate MOSFET
1.4 Quick reference data
Table 1.
V
DS
I
D
P
tot
|y
fs
|
C
iss(G1)
C
rss
NF
Xmod
Quick reference data for amplifier A and B
Conditions
DC
DC
T
sp
≤
107
°C
f = 100 MHz; T
j
= 25
°C;
I
D
= 18 mA
f = 100 MHz
f = 400 MHz; Y
S
= Y
S(opt)
f = 800 MHz; Y
S
= Y
S(opt)
cross modulation
input level for k = 1 % at
40 dB AGC; f
w
= 50 MHz;
f
unw
= 60 MHz
[3]
[2]
[2]
[1]
Symbol Parameter
drain-source voltage
drain current
total power dissipation
forward transfer admittance
input capacitance at gate1
noise figure
Min
-
-
-
23
-
-
-
-
105
Typ
-
-
-
27
2.5
25
1.0
1.5
107
Max
6
30
180
38
-
-
-
-
-
Unit
V
mA
mW
mS
pF
fF
dB
dB
dBμV
reverse transfer capacitance f = 100 MHz
T
j
[1]
[2]
[3]
junction temperature
T
sp
is the temperature at the soldering point of the source lead.
Calculated from S-parameters.
Measured in
Figure 17
test circuit.
-
-
150
°C
2. Pinning information
Table 2.
Pin
1
2
3
4
5
6
Discrete pinning
Description
gate1 (amplifier A)
gate2
gate1 (amplifier B)
drain (amplifier B)
source
drain (amplifier A)
1
2
3
G1B
AMP B
sym119
Simplified outline
6
5
4
Graphic symbol
AMP A
G1A
DA
G2
S
DB
3. Ordering information
Table 3.
Ordering information
Package
Name
BF1216
-
Description
plastic surface-mounted package; 6 leads
Version
SOT363
Type number
BF1216_1
All information provided in this document is subject to legal disclaimers.
© NXP B.V. 2010. All rights reserved.
Product data sheet
Rev. 01 — 29 April 2010
2 of 17
NXP Semiconductors
BF1216
Dual N-channel dual gate MOSFET
4. Marking
Table 4.
BF1216
Marking
Marking
M5p
M5t
M5w
Description
made in Hong Kong
made in Malaysia
made in China
Type number
5. Limiting values
Table 5.
Limiting values
In accordance with the Absolute Maximum Rating System (IEC 60134).
Symbol
V
DS
I
D
I
G1
I
G2
P
tot
T
stg
T
j
[1]
Parameter
drain-source voltage
drain current
gate1 current
gate2 current
total power dissipation
storage temperature
junction temperature
Conditions
Min
-
Max
6
30
±10
±10
180
+150
150
Unit
V
mA
mA
mA
mW
°C
°C
Per MOSFET
DC
-
-
-
T
sp
≤
107
°C
[1]
-
−65
-
T
sp
is the temperature at the soldering point of the source lead.
250
P
tot
(mW)
200
001aac193
150
100
50
0
0
50
100
150
T
sp
(˚C)
200
Fig 1.
Power derating curve
BF1216_1
All information provided in this document is subject to legal disclaimers.
© NXP B.V. 2010. All rights reserved.
Product data sheet
Rev. 01 — 29 April 2010
3 of 17
NXP Semiconductors
BF1216
Dual N-channel dual gate MOSFET
6. Thermal characteristics
Table 6.
Symbol
R
th(j-sp)
Thermal characteristics
Parameter
thermal resistance from junction to solder point
Conditions
Typ
240
Unit
K/W
7. Static characteristics
Table 7.
Static characteristics
T
j
= 25
°
C.
Symbol
V
(BR)DSS
Parameter
drain-source breakdown voltage
Conditions
V
G1-S
= V
G2-S
= 0 V; I
D
= 10
μA
amplifier A
amplifier B
V
(BR)G1-SS
gate1-source breakdown voltage V
G2-S
= V
DS
= 0 V; I
G1-S
= 10 mA
V
(BR)G2-SS
gate2-source breakdown voltage V
G1-S
= V
DS
= 0 V; I
G2-S
= 10 mA
V
F(S-G1)
V
F(S-G2)
V
G1-S(th)
V
G2-S(th)
I
DS
forward source-gate1 voltage
forward source-gate2 voltage
gate1-source threshold voltage
gate2-source threshold voltage
drain-source current
V
G2-S
= V
DS
= 0 V; I
S-G1
= 10 mA
V
G1-S
= V
DS
= 0 V; I
S-G2
= 10 mA
V
DS
= 5 V; V
G2-S
= 4 V; I
D
= 100
μA
V
DS
= 5 V; V
G1-S
= 5 V; I
D
= 100
μA
V
G2-S
= 4 V
amplifier A; V
DS(A)
= 5 V; R
G1(A)
= 39 kΩ
amplifier B; V
DS(B)
= 5 V; R
G1(B)
= 39 kΩ
I
G1-S
gate1 cut-off current
V
G2-S
= 0 V; V
DS(A)
= V
DS(B)
= 0 V
amplifier A; V
G1-S(A)
= 5 V
amplifier B; V
G1-S(B)
= 5 V
I
G2-S
gate2 cut-off current
V
G2-S
= 4 V; V
DS(A)
= V
DS(B)
= 0 V;
V
G1-S(A)
= V
G1-S(B)
= 0 V
-
-
-
-
-
-
50
50
20
nA
nA
nA
[1]
Min Typ Max
Unit
Per MOSFET; unless otherwise specified
6
6
6
6
0.5
0.5
0.3
0.4
-
-
-
-
-
-
-
-
-
-
-
-
-
-
10
10
1.5
1.5
1.0
1.0
24
24
V
V
V
V
V
V
V
V
mA
mA
[1]
R
G1
connects gate1 to V
GG
= 5 V; see
Figure 17.
BF1216_1
All information provided in this document is subject to legal disclaimers.
© NXP B.V. 2010. All rights reserved.
Product data sheet
Rev. 01 — 29 April 2010
4 of 17
NXP Semiconductors
BF1216
Dual N-channel dual gate MOSFET
8. Dynamic characteristics
Table 8.
Dynamic characteristics for amplifier A and B
Common source; T
amb
= 25
°
C; V
G2-S
= 4 V; V
DS
= 5 V; I
D
= 19 mA.
Symbol Parameter
|y
fs
|
C
iss(G1)
C
iss(G2)
C
oss
C
rss
G
tr
forward transfer admittance
input capacitance at gate1
input capacitance at gate2
output capacitance
reverse transfer capacitance
transducer power gain
Conditions
f = 100 MHz; T
j
= 25
°C;
I
D
= 18 mA
f = 100 MHz
f = 100 MHz
f = 100 MHz
f = 100 MHz
amplifier A; B
S
= B
S(opt)
; B
L
= B
L(opt)
f = 200 MHz; G
S
= 2 mS; G
L
= 0.5 mS
f = 400 MHz; G
S
= 2 mS; G
L
= 1 mS
f = 800 MHz; G
S
= 3.3 mS; G
L
= 1 mS
amplifier B; B
S
= B
S(opt)
; B
L
= B
L(opt)
f = 200 MHz; G
S
= 2 mS; G
L
= 0.5 mS
f = 400 MHz; G
S
= 2 mS; G
L
= 1 mS
f = 800 MHz; G
S
= 3.3 mS; G
L
= 1 mS
NF
noise figure
f = 11 MHz; G
S
= 20 mS; B
S
= 0 S
f = 400 MHz; Y
S
= Y
S(opt)
f = 800 MHz; Y
S
= Y
S(opt)
Xmod
cross modulation
input level for k = 1 % at 40 dB AGC; f
w
= 50 MHz;
f
unw
= 60 MHz
at 0 dB AGC
at 10 dB AGC
at 20 dB AGC
at 40 dB AGC
[1]
[2]
Calculated from S-parameters.
Measured in
Figure 17
test circuit.
[2]
[1]
[1]
[1]
[1]
[1]
[1]
Min Typ Max Unit
23
-
-
-
-
-
-
-
-
-
-
-
-
-
27
2.5
2.4
0.8
25
34
30
26
34
30
26
-
1.0
1.5
38
-
-
-
-
-
-
-
-
-
-
5
-
-
mS
pF
pF
pF
fF
dB
dB
dB
dB
dB
dB
dB
dB
dB
90
-
-
104 -
100 -
104 -
dBμV
dBμV
dBμV
dBμV
105 107 -
BF1216_1
All information provided in this document is subject to legal disclaimers.
© NXP B.V. 2010. All rights reserved.
Product data sheet
Rev. 01 — 29 April 2010
5 of 17
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